Include in footprint only support for selected
data formats. It may make footprint lighter.
Signed-off-by: Karol Trzcinski <karolx.trzcinski@linux.intel.com>
It will be helpful during next step - conditional code
compilation depending on configuration
Signed-off-by: Karol Trzcinski <karolx.trzcinski@linux.intel.com>
Include in footprint only support for selected
data formats. It may make footprint lighter.
Signed-off-by: Karol Trzcinski <karolx.trzcinski@linux.intel.com>
Include in footprint only code needed to support selected
data formats. It may make footprint lighter.
Signed-off-by: Karol Trzcinski <karolx.trzcinski@linux.intel.com>
Include in footprint only support for selected
data formats. It may make footprint lighter.
Signed-off-by: Karol Trzcinski <karolx.trzcinski@linux.intel.com>
It will be helpful in next step -
- selective function compilation by
supported data type
Signed-off-by: Karol Trzcinski <karolx.trzcinski@linux.intel.com>
Compile support only for data types selected in configuration.
It may make footprint smaller.
Signed-off-by: Karol Trzcinski <karolx.trzcinski@linux.intel.com>
It will be helpful in next step - conditional code compilation
according to configuration
Signed-off-by: Karol Trzcinski <karolx.trzcinski@linux.intel.com>
Use introduced configuration option in mux component to make
firmware footprint smaller.
Signed-off-by: Karol Trzcinski <karolx.trzcinski@linux.intel.com>
It will be helpful during next step - conditional code
compilation depending on configuration
Signed-off-by: Karol Trzcinski <karolx.trzcinski@linux.intel.com>
It will be used to make footprint smaller by selective
compilation of supported data format in components
Signed-off-by: Karol Trzcinski <karolx.trzcinski@linux.intel.com>
In order to avoid dead locks in dmic_work I've replaced
spin_lock() with spin_try_lock(). In case when
spin_try_lock() fails we reschedule dmic work.
Signed-off-by: Bartosz Kokoszko <bartoszx.kokoszko@linux.intel.com>
Adds return to spin_try_lock() in order to retrieve status
from arch_try_lock() function.
Signed-off-by: Bartosz Kokoszko <bartoszx.kokoszko@linux.intel.com>
The test determinating the current SAI mode (M/S) was buggy.
As a consequence SAI generated bit clock and FS clock when the codec was
in master mode (which is the default configuration for SAI currently with
SOF). This bug didn't prevent the DAI to function and to have good sound.
Signed-off-by: Jerome Laclavere <jerome.laclavere@nxp.com>
Signed-off-by: Guido Roncarolo <guido.roncarolo@nxp.com>
Use of low power sequencer lowers power consumption, since
DSP may be completely turned off when calling waiti and then
powered on interrupt, booting via restore vector installed in
lpsram.
Signed-off-by: Marcin Maka <marcin.maka@linux.intel.com>
We need this in order to match the exact comment from the
similar file in the Linux kernel.
sof_ipc_effect_type was the old name of the component no longer
used now.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
It isn't necessary to do a dai_get this early for the ESAI; the SAI
doesn't even have one.
Calling dai_probe() after dai_get() is pointless since dai_probe() was
already called from a previous dai_get() with CREAT flag (in particular
the one which incremented sref from 0 to 1).
Signed-off-by: Paul Olaru <paul.olaru@nxp.com>
Use optimization configs that come from Kconfig in CMake
to set appropriate compiler flags.
Signed-off-by: Janusz Jankowski <janusz.jankowski@linux.intel.com>
SAI is one of the DAIs found on i.MX8 platforms. Introduce
sai_params used to pass configuration from topology via AP to DSP.
Only MCLK and TDM related params for now.
Because this is a new struct, increment only ABI MINOR version
which makes the SOF FW backward compatible with older kernel
versions.
Signed-off-by: Guido Roncarolo <guido.roncarolo@nxp.com>
To repair tracev_mux_with_ids macro.
Because with current macro definition
and enabled CONFIG_TRACEV macro code won't compile.
Signed-off-by: Karol Trzcinski <karolx.trzcinski@linux.intel.com>
Power control hw programming should go through the pm_runtime
interface. It provides more granular control over the power
gating of each single dsp core.
Signed-off-by: Marcin Maka <marcin.maka@linux.intel.com>
get() operation called for dsp core resource disables
power gating of that core so it is locked in d0 state.
This is a default power state when the core is running.
put() operation enables power gating of the core, so
that the core goes to d3 every time it enters idle
(waiti is called and there is no interrupt to handle).
This handler should be called before the waiti is called
if pm-runtime for the core is enabled (see pm_runtime_enable()).
Signed-off-by: Marcin Maka <marcin.maka@linux.intel.com>
There might be other flows defined in future, that would
need to reprogram hw registers only while preserving
the content of memory windows.
Signed-off-by: Marcin Maka <marcin.maka@linux.intel.com>
Access to vecbase, excsave2/3/4/5 is required for saving
the dsp core context while internal d0/d3 transitions
initiated by the low power sequencer.
Signed-off-by: Marcin Maka <marcin.maka@linux.intel.com>
This will prevent from compiler warnings when
local variables are used only in trace log and
trace is disabled.
Signed-off-by: Karol Trzcinski <karolx.trzcinski@linux.intel.com>
UNUSED macro should prevent compiler from throwing warnings
about unused wariables during conditional builds.
Usable for example in trace logs.
Signed-off-by: Karol Trzcinski <karolx.trzcinski@linux.intel.com>
It was needed to define empty implementation of error and verbose
macros in two places what is not compliant with DRY methodology.
It is done by moving trace defs around, outside #if CONFIG_TRACE block.
After changes it is defined in only one place.
Also trace_*_comp should be defined once bacause it may be
independent from CONFIG_TRACE values.
Signed-off-by: Karol Trzcinski <karolx.trzcinski@linux.intel.com>
Because those functions was hardly used in source code.
Moreover it is better practise to add short trace
description, at least variable name instead of trace
with only variable value.
Signed-off-by: Karol Trzcinski <karolx.trzcinski@linux.intel.com>
cavs specific set d0ix message is read directly from ipc
registers and does not use mailbox located in SRAM which is
the only safe way to send a message to the cAVS DSP when
the DSP is in a lower power state.
The message is translated to SOF_IPC_PM_PWR_GATING message.
Response always use the mailbox since there is no way to write
the *T registers back with the current bi-directional communication
implemented using a single *T register set.
Signed-off-by: Marcin Maka <marcin.maka@linux.intel.com>
A new message that may be used by the driver to configure
power gating and clock gating using platform specific method.
Signed-off-by: Marcin Maka <marcin.maka@linux.intel.com>
Returns current config on COMP_CMD_GET_DATA. It fixes the problem
with wrong demux configuration after suspend. Kernel doesn't cache
initial kcontrol config and overwrites it with configuration returned
from component.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Since SOF requires CLK_SSP to be defined and the SSP clock should be
separate from the actual CPU clock increasing the array size to 2 should
fix it.
This is a hack because i.MX doesn't actually have a SSP clock but SOF
unconditionally uses CLK_SSP macro.
Signed-off-by: Paul Olaru <paul.olaru@nxp.com>
The SAI doesn't use channel 0, but channels 14 and 15. The handshake
contains the correct channel number.
Signed-off-by: Paul Olaru <paul.olaru@nxp.com>
Old switch macro traces didn't have VA_ARG arguments.
It will be helpful during debugging components
to see correlated pipeline id after using with_ids macros.
Signed-off-by: Karol Trzcinski <karolx.trzcinski@linux.intel.com>
Trace verbose and trace error macros positions
is swapped to be more consistent with rest of files
Signed-off-by: Karol Trzcinski <karolx.trzcinski@linux.intel.com>
During compilation as library there was unused id_0
and id_1 in _log_message preprocessor function.
Solved by casting parameters to void type.
Signed-off-by: Karol Trzcinski <karolx.trzcinski@linux.intel.com>
It makes trace macros in component space much shorter
and simpler so trace module will be more reliable.
Thanks to usage one preprocessor macro in each type of
_comp traces, code is more flexible and consistent.
Signed-off-by: Karol Trzcinski <karolx.trzcinski@linux.intel.com>
Remove spinlock_init() in dw_dma_probe() function
in order to avoid memory leaks. spinlock_init() is
invoked in dmac_init() platform/*/lib/dma.c
files.
Signed-off-by: Bartosz Kokoszko <bartoszx.kokoszko@linux.intel.com>
_trace_error_atomic doesn't exist, so this commit replaces it with
what was probably intended in the first place.
Signed-off-by: Paul Olaru <paul.olaru@nxp.com>
src/include/sof/schedule/ll_schedule_domain.h: In function 'domain_init':
src/include/sof/spinlock.h:87:9: error: 'domain->lock' is a pointer; did you mean to use '->'?
(lock)->user = __LINE__; \
^~
src/include/sof/schedule/ll_schedule_domain.h:71:2: note: in expansion of macro 'spinlock_init'
spinlock_init(&domain->lock);
^~~~~~~~~~~~~
Plus specific errors related to the platform, like:
src/platform/imx8/lib/dma.c: In function 'edma_init':
src/include/sof/spinlock.h:87:9: error: 'dma[i].lock' is a pointer; did you mean to use '->'?
(lock)->user = __LINE__; \
^~
src/platform/imx8/lib/dma.c:54:3: note: in expansion of macro 'spinlock_init'
spinlock_init(&dma[i].lock);
^~~~~~~~~~~~~
Signed-off-by: Paul Olaru <paul.olaru@nxp.com>
Moves kpb task initialization from kpb_prepare()
to kpb_new() (kpb_prepare() can be invoked several times
for one kpb instance). Adds schedule_task_free() to
kpb_free() in order to avoid memory leaks.
Signed-off-by: Bartosz Kokoszko <bartoszx.kokoszko@linux.intel.com>
Moves dmic task initialization from dmic_set_config()
to dmic_probe() in order to avoid memory leaks - in theory
driver could send dmic_set_config() ipc many times without
releasing resources. Also adds schedule_task_free() in
dmic_remove().
Signed-off-by: Bartosz Kokoszko <bartoszx.kokoszko@linux.intel.com>
Added break statement after error, as it was before refactoring
this part of code in commit <89ef0af07612c0bcf1a85fec3871d0c31e60087b>
("ipc: Refactor ipc_comp_dai_config function").
While at it, also removed additional parenthesis around trace_ipc_error.
Signed-off-by: Karol Trzcinski <karolx.trzcinski@linux.intel.com>
This commit allows code such as:
if (ret < 0)
trace_error("error: %d", ret);
return ret;
to work properly.
Signed-off-by: Paul Olaru <paul.olaru@nxp.com>
If the assert semantics are changed to be the more usual ones, on
disabling asserts the calls that I changed would have also removed the
desirable side effects when the assertion itself passed (no memcpy_s
would have occurred, in particular). I have changed the usage of the
assert() macro so that the code becomes immune to such a change.
Signed-off-by: Paul Olaru <paul.olaru@nxp.com>
Memory allocated for p->pipe_task should be freed
in pipeline_free() in order to avoid memory leaks.
Signed-off-by: Bartosz Kokoszko <bartoszx.kokoszko@linux.intel.com>
Refactors code for underrun and overrun detection. We should report
an xrun only if DMA get data size or DMA copy fails. In other case
even 0 available copy bytes doesn't mean anything, because we are always
copying as much as possible. Buffer could potentially be filled up front.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Implements proper flow for underrun and overrun checking.
DW-DMA should verify whether the channel running on hardware
linked list is still enabled.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Implements proper overrun and underrun detection flow.
We should return error in case HDA-DMA link detects one.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
dtrace_event...() is protected by dmatb.addr verification
which may be assigned while other buffer attributes are
not set yet. It results in assert in case the initialization
is pre-empted by a code that attempts to log something.
Signed-off-by: Marcin Maka <marcin.maka@linux.intel.com>
Adds config option to enable system agent. It can be disabled
on the still unstable systems, which cannot guarantee that
agent will execute on time.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
FW sends stream position message to kernel for its version before
3.11. In kernel, no_stream_position will be set to 1 for FW version
after 3.10, and host_period_bytes will be set to 0 for other versions.
So in host_update_position, the condition is always true for hd->report_pos
>= dev->params.host_period_bytes for FW version before 3.11
Now check the condition dev->params.host_period_bytes != 0 according to
commit:b39b17ddf3e
Signed-off-by: Rander Wang <rander.wang@linux.intel.com>
Changes scheduler_init_edf and task_main_init function
definitions as sof structure is no longer needed. It was
only used to pass agent object to main idle task.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Removes disable and enable functions, because they
are no longer needed. Agent will now update its lat_check
time above passive level, so every long running task will
be preempted.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Refactors agent's functionality to really verify DSP
responsiveness. Instead of updating last_idle time
on passive level before entering waiti, let's change it
to last_check and update it on actual scheduler task
execution. Task is executed above passive level, so it
should preempt every other long running processing.
Since we don't have any additional precautions to guarantee
that low latency tick will happen exactly at the scheduled time,
let's define warning and panic thresholds to control stability
of the system.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Removes PLATFORM_LL_DEFAULT_TIMEOUT definition. It has been
replaced by CONFIG_SYSTICK_PERIOD.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Adds additional CONFIG_SYSTICK_PERIOD to Kconfig,
which is used to drive timer based low latency scheduler
and also will be used as a timeout check value for system agent.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Changes flow of dai_copy to call dma_copy even if there is no data
available. This way we make sure that all DMA needed procedures are
executed, since buffers pointers won't be changed anyway.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Change flow of components to not resize sink buffers.
We should just check the size of the allocated buffers
and let the topology define the maximum sizes.
Components can easily work with non aligned buffer sizes.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Removes buffer cache operations done based on the fact,
whether buffer is used by DMA or not. From now on DMAs have
their own dedicated buffers with dedicated copy functions,
so this code is no longer needed.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Currently DMAs are using buffers on pipelines connected to either
host or dai components. This causes many problems in firmware logic
e.g. we need to preload playback pipelines with data or we need
to manually override buffer sizes, if the buffer isn't complaint
with specific DMA requirements. Also it requires from topology
creators to know some hardware specific things on each platform
like that for timer based scheduling on cAVS platforms we need
to have 3 periods in buffers connected to dai components.
This patch allocates separate buffers for DMAs, which are made
complaint by using different DMA attributes first. We no longer
need to preload playback streams, because we can start DMA
right away and just let it transfer zeroes before any valid
data will come.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
DW-DMA has no specific alignments regarding buffer and copy sizes.
However setting it to 32 bytes breaks stream formats with period
sizes lower than 32 bytes, as linked list is being configured
incorrectly.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Implements copy functions from/to DMA buffer. They take care
of cache operations and also can perform custom processing
during copy. By default it will be usual buffer copy, but in the future
it can be replaced with pcm conversions, so we don't need volume
into the pipelines just for that operation.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Adds new DMA attribute DMA_ATTR_BUFFER_PERIOD_COUNT and implements
it for every DMA. This attribute says how many periods should DMA
buffer consist of.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Adds and initializes id, pipeline_id and caps fields in buffer struct.
This is the only data needed after buffer creation. It allows us to
remove the whole sof_ipc_buffer struct from the buffers.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
The ESAI is a hardware DAI on the i.MX platform. This commit brings the
initial support for the ESAI.
For now, the hardware FIFO watermark is hardcoded to 96 which means that
DMA transfers will be initiated when 96 of the 128 FIFO slots are empty.
IRQ handling is disabled (but possibly not needed anyway) and the clock
divider settings are hardcoded and correct for MCLK of 49152000 Hz,
48000 Hz sample rate, 2 channels, 32-bit samples (for the codec).
See https://www.nxp.com/docs/en/reference-manual/IMX8DQXPRM.pdf, pages
7435-7506 (ESAI).
Signed-off-by: Paul Olaru <paul.olaru@nxp.com>
Add tokens to topology for led use and led direction. Led use is true
for positive integers, false for 0. Led direction 0 corresponds to
playback and positive integers to capture.
Signed-off-by: Jaska Uimonen <jaska.uimonen@intel.com>
This improves the performance quite significantly -- pipeline_copy on
the simple ESAI pipeline (the cs42888 pipeline) took around 781us before
while with caching I got times of 15us at a minimum (a 50-fold
improvement).
Values:
-> 0x40000000-0x5FFFFFFF: 2 (bypass, contains ADMA registers)
-> 0x80000000-0x9FFFFFFF: 1 (write-through, write allocate). This
contains almost all of the code in 0x92400000-0x92BFFFFF and all the
heaps in 0x92C00000-0x933FFFFF.
-> Everything else has cache bypass (Dummy DMA needs to be able to use
host buffers from wherever)
Signed-off-by: Paul Olaru <paul.olaru@nxp.com>
The semantics of a DMA driver is to transfer data to/from RAM rather
than to/from the DSP cache. As such I need to flush the cache before
and after the copy (see comments inline).
Signed-off-by: Paul Olaru <paul.olaru@nxp.com>
Power gating for HPSRAM & LPSRAM on D3 entry enabled for all cAVS
platforms (cAVS 1.5/1.8/2.x) except SueCreek. Implementation shared
between cAVS 1.8/2.0/2.5 is located in cavs lib, cAVS 1.5 specific
implementation remains in ApolloLake platform directory.
Signed-off-by: Lech Betlej <lech.betlej@linux.intel.com>
cAVS power down sequence refactored by moving CannonLake (cAVS 1.8)
implementation to cavs lib as a base for cAVS 1.8/2.0/2.5 common
code. ApolloLake (cAVS 1.5) specific implementation remains as a
platform specific code.
Signed-off-by: Lech Betlej <lech.betlej@linux.intel.com>
The number of bytes copied at each ieration must
match half the total size copied as we have an
interrupt at HALF and MAJOR loop
Signed-off-by: Guido Roncarolo <guido.roncarolo@nxp.com>
Signed-off-by: Jerome Laclavere <jerome.laclavere@nxp.com>
burst_size represents the FIFO width in words, translate it
into bytes to have homogeneous quantities
Signed-off-by: Guido Roncarolo <guido.roncarolo@nxp.com>
This patch slightly modifies draining speed algorithm.
Instead of copying half the buffer each period we
copy two periods. This slightly decreases draining
speed but avoids XRUNs in rare cases.
Signed-off-by: Marcin Rajwa <marcin.rajwa@linux.intel.com>
Fixes race condition in low latency scheduler when multiple cores
are processing tasks on the same scheduling domain. Task's start
time is updated based on last_tick right after the task is finished.
Last_tick can be updated in the meantime by other core in the situation,
where it starts handling interrupt later, but finishes its tasks
earlier.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
The introduction of the DMA multi channel domain made it so the cascaded
interrupt handling fails to allocate memory from this heap. Increasing
the size of the system runtime heap will allow the registering of
cascaded interrupts (and in particular the EDMA interrupt within the DMA
scheduling domain) to continue.
On this platform we have 8MB of total memory. Allocating 24kB instead of
12kB for the system runtime heap does not cause any noticeable change
besides removing the memory allocation failures.
Signed-off-by: Paul Olaru <paul.olaru@nxp.com>
Merged hp buffer heap with normal buffer heap.
Since current buffer heap was actually using hp memory and it served
no purpose to have two heaps.
Removed extern capabilities and merged other capabiliteis to
buffer heap. Currently none of those buffer heaps supports extern.
Signed-off-by: Jakub Dabek <jakub.dabek@intel.com>
The earlier error message was hard to understand and could be
mistaken as internal fail. A redundant trace message about block
sizes is removed because the block sizes are set in each copy()
in current SRC version.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
This patch avoids wrong configuration for PCM format and audio
corruption in capture pipelines usage if the pipeline requires
format conversion.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
When new pipeline is created we need to also verify whether
given pipeline id is already taken.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Renames PLATFORM_HOST_DMA_TIMEOUT to HDA_DMA_TIMEOUT and
moves to hda-dma, where it belongs.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Renames PLATFORM_HOST_DMA_MASK to PLATFORM_DW_DMA_HOST_MASK
and moves to dw-dma header, where it belongs.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
In case of unsuccessful scheduler task init, the pipeline
task init should also fail.
Signed-off-by: Janusz Jankowski <janusz.jankowski@linux.intel.com>
Returns an error, when there is no DAI component
connected to the DAI index specified by DAI config
IPC.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
various interfaces e.g. SAI or ESAI have different
FIFO size: EDMA has to take into account this when
programming the iteration size
Signed-off-by: Guido Roncarolo <guido.roncarolo@nxp.com>
Signed-off-by: Jerome Laclavere <jerome.laclavere@nxp.com>
avoid accessing registers for EDMA channels that are not
started to prevent crash
Signed-off-by: Guido Roncarolo <guido.roncarolo@nxp.com>
Signed-off-by: Jerome Laclavere <jerome.laclavere@nxp.com>
Update memory.h to have similar capabilities to other platforms,
that were updated when dynamic DMA channels were introduced.
Previous values were not enough for some topologies.
Signed-off-by: Janusz Jankowski <janusz.jankowski@linux.intel.com>
Adds new start_position field based on which we assess whether
we should throw an xrun. It fixes rare cases of xruns on release
with timer scheduled pipelines.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Checks if DMA channel exists in dai_prepare. This way we will
avoid exception in case DAI config hasn't been called before.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
For DW-DMA without hardware linked list support we need
to manually reload linked list items after every interrupt.
It's very time-sensitive and even the slightest drift can
cause glitches, so this patch moves lli reload routine
to be called from DMA domain as an interrupt callback.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Adds irq_callback to dma_chan_data. It's called by the
DMA domain right after receiving an interrupt, so should
execute very time-sensitive operations.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
The SAI is a hardware DAI on the i.MX platform. This commit brings
the initial support for the SAI.
Current limitations:
-> Hardware FIFO watermark is hardcoded to HALF FIFO size
-> current codec only support stereo channels
-> slot size hardcoded to 32 bit
-> clock divider is set to 8
Signed-off-by: Guido Roncarolo <guido.roncarolo@nxp.com>
Signed-off-by: Jerome Laclavere <jerome.laclavere@nxp.com>
Initially I have hardcoded the specific values required for the ESAI.
That however is highly inflexible.
This commit refactors that to allow a more flexible declaration so that
other DMA clients can also get their proper interrupt numbers.
Only hardware which delivers its DMA interrupts via IRQ_STEER is
supported, however on this platform that is fine (all DMA channels
deliver their interrupts as shared interrupts via IRQ_STEER).
Signed-off-by: Paul Olaru <paul.olaru@nxp.com>
On the pipelines which use EDMA, the EDMA interrupts are the ones which
schedule all the copies and processing happening inside a pipeline.
This commit enables the EDMA controller to schedule copies on this
platform.
Signed-off-by: Paul Olaru <paul.olaru@nxp.com>
Fixes tasks initialization for connected pipelines.
If we play on pipeline, which is not the owner of
the scheduling component, then the pipeline_prepare()
is not called on pipe owning that component and tasks
stay unitialized.
Fixes: de7d4c95cf ("pipeline: allocate pipe_task only if needed")
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Add alignment option for memory requests.
Fix alloc definitions for UT.
Function definitions were using defines in their body
which blocked usage of const values in said defines.
Signed-off-by: Jakub Dabek <jakub.dabek@intel.com>
This is to optimize memory consumption from this driver. With 32
channels we would have needed a memory block >1024 bytes in size to
allocate the dma_chan_data array. However 16 channels (which means
allocating a smaller block) should be enough for everyone.
Signed-off-by: Paul Olaru <paul.olaru@nxp.com>
The dummy DMA is a software-based DMA which acts as a host DMA. This
one can be implemented in software alone because all host physical
address space (at least the RAM portion) is accessible directly from
the DSP on this platform.
The driver works by taking the physical addresses for both the source
and destination addresses from the elems. This works because no paging
is enabled on the DSP side, and because the page tables interpretation
allows these elements to actually have physical addresses on the host
side. Given these addresses, the copy itself is done synchronously on
the DSP within a memcpy_s call.
Signed-off-by: Paul Olaru <paul.olaru@nxp.com>
Enabling this config option changes the way the SG elems are generated,
such that the host addresses in the elems are actual, physical
addresses.
This is required by the Dummy DMA driver, which can only operate with
said physical addresses.
This commit enables the config option and fixes compile errors which
appeared after this enabling.
Signed-off-by: Paul Olaru <paul.olaru@nxp.com>
With new schedulers implementations we don't need to trigger
pipeline in atomic context anymore.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Switches from DMA multi channel domain to single channel
as the scheduling source for one of the low latency schedulers
for cAVS platforms.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Adds implementation of DMA single channel scheduling domain.
This domain allows to schedule all the tasks on all the cores
on single DMA channel interrupt. This way we have only one
interrupt source and we don't need to worry about handling
many interrupts. We always select the channel with the lowest
period. This domain cannot be used with the DMAs, which require
to manually reload the next data to be transferred e.g. DW-DMA
on BYT or HSW.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Some ll scheduling domains require to have interrupt cleared
right at the beginning of handler. Clear domain earlier to
fulfill that requirement.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Adds DMA channel period value to dma_chan_data.
We can now easily retrieve the period value of
DMA channel transfers.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Adds new NOTIFIER_ID_DMA_DOMAIN_CHANGE. This id will be used
by DMA single channel scheduling domain.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Fixes return value of platform_timer_set and arch_timer_set functions.
Change was introduced for cAVS platforms, which accidentally broke
these functions for other platforms. The intention of this functions
is to return value of set ticks, so the timer scheduler can check
for delays.
Fixes: 75188e2243 ("timer: rework timer_set() so it verifies requested ticks")
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
For the moment, the EDMA will only be used with one client -- the ESAI.
The IRQ number for both of the channels corresponding to the ESAI (as
well as the controller name) will be the same, and will map to interrupt
442 (which, according to the calculations required by IRQ_STEER, map to
interrupt 442 % 64 = 58 on controller 442 / 64 = 6).
In the future we should make this more flexible.
Signed-off-by: Paul Olaru <paul.olaru@nxp.com>
This is a hardware DMA controller on the i.MX platform. This one is
capable of doing mem-to-dev and dev-to-mem copies of any data.
This commit contains most of the initial implementation but a few things
related to IRQ handling (such as IRQ numbers).
Signed-off-by: Paul Olaru <paul.olaru@nxp.com>
DMA controllers on the i.MX8 platform provide separate interrupts per
channel which may fall on different IRQ_STEER interrupt lines. Due to
the current architecture of the IRQ_STEER driver, this means the
channels may have their interrupts fall on different interrupt
controllers.
This commit allows setting an interrupt controller name per interrupt.
Signed-off-by: Paul Olaru <paul.olaru@nxp.com>
These functions are 16-bit counterparts to the preexisting 32-bit
functions io_reg_update_bits and dma_chan_reg_update_bits and are
intended to be used for general (in the former case) and DMA (in the
latter) 16-bit registers.
Signed-off-by: Paul Olaru <paul.olaru@nxp.com>
With new schedulers implementation we don't need to reset
pipeline in atomic context anymore.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Fixes the problem with copying to internal buffer,
where we didn't take into an account circularity
of source buffer.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
We first initialize the interrupts (IRQ_STEER controller) before
initializing the DMA domain because the interrupt numbers/names in the
DMA controller will be queried in the domain initialization.
Also, in anticipation of future changes we move
platform_interrupt_init() as the first call before clock_init() and
scheduler_init_edf() as they might be using interrupts in the future.
Suggested-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Signed-off-by: Paul Olaru <paul.olaru@nxp.com>
Uses CONFIG_INTERRUPT_x options to conditionally build interrupt
drivers' code. These definitions should only be used in interrupt
drivers and platform interrupt headers. In case there is a need
to use additional interrupt level the appropriate kConfig option
should be selected. Otherwise the build will fail.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Removes interrupt numbers and names assignment to HDA DMAs.
These interrupts are unusable due to hardware restrictions.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Removes unmask parameter from interrupt structures and functions.
It's not been used for a long time now.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
ESAI is one of the DAIs found on i.MX8 platforms. Introduce esai_params
used to pass configuration from topology via AP to DSP.
Only MCLK and TDM related params for now.
Because this is a new struct, increment only ABI MINOR version
which makes the SOF FW backward compatible with older kernel versions.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Prevents dai_config while DAI is in active state.
It leads to undefined behavior and DSP exception
in some cases.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
New version of manifest introduced with TGL platform
uses SHA384 for component hash.
Signed-off-by: Janusz Jankowski <janusz.jankowski@linux.intel.com>
Registers low latency scheduler with DMA multi channel
domain as scheduling source. This way we can finally get rid
of scheduling code from DW-DMA driver and DAI component.
Functionally it works the same as the previous implementation,
but transfers scheduling layer to the right places.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Adds PLATFORM_DW_DMA_INDEX definition. This allows
to access this value from the generic API.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Renames DMA_AGGREGATED_IRQ to DW_DMA_AGGREGATED_IRQ
definition. This is more appropriate as it's not generic
DMA setting.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Implements DMA scheduling domain. It allows to initialize
another low latency scheduler and schedule on any DMA channel.
The functionality stays the same as the one already done in
DMA drivers e.g. DW-DMA.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Adds PLATFORM_MAX_DMA_CHAN definition to every platform.
This way generic API can retrieve this information.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Removes HDA_DMA_MAX_CHANS definition as it's not needed.
We can directly use the number of allocated channels.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Moves CAVS_PLATFORM_NUM_DMACS definition to specific platforms
and renames it to PLATFORM_NUM_DMACS. This way we can access
to the number of platform DMAs from generic code.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Adds scheduling_source field and dma_is_scheduling_source
function. It allows for easy identification whether particular
DMA channel is the source of pipeline scheduling.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Adds comp_is_scheduling_source function, which checks whether
component is the one used as a scheduling source for the pipeline.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Adds core to dma_chan_data structure. This way we can
easily identify which core currently owns the DMA channel.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Adds preload_task to pipeline. This task is only
allocated and initialized, when pipeline needs to be
preloaded with data e.g. render pipe scheduled on DMA irq.
It's always an EDF task, so we make sure it's get scheduled
no matter if interrupt was triggered or not.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Changes implementation of pipe_task allocation and initialization
to happen in prepare call instead of during pipeline creations.
It might be that the pipeline will never be used.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Changes copy method for host working in one shot mode.
Blocking copy replaces interrupt based copy. In an effort
of extracting DMA interrupt based scheduling from DMA
to scheduler we need to minimize number of irq sources
in our flows. This patch also changes the interrupt
based implementation of traces copying through DMA.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Adds interrupt operation and operation type to DMA API.
This is the first step in excluding DMA interrupt handling
to schedule layer.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Fixes stack dump procedure for exceptions happening in interrupt
handlers. Stack base and size haven't been set to the interrupt's
one in current task context, so when exception happened during
interrupt processing we've got SOF_IPC_PANIC_STACK cause instead
of the real one.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Removes host_pending from ipc structure, because it's no
longer needed. Scheduler will automatically throw an error,
when we'll try to run not completed task.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Changes ipc task implementation, so it accepts new messages from
host in a complete task callback. This way we will avoid the
situation, where host will send another message before we
truly complete current ipc task.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Change the waiti implementation to panic only if we're
lowering current interrupt level. In some rare cases
(like entering D3 for some platforms) we don't care,
because DSP will be disabled anyway.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Adds complete callback to task. Some EDF tasks will need to have
additional callback on task completion, which will be executed
in critical section along the setting task state to complete.
Doing it during regular execution is not enough, because it's done
on passive level and we want to avoid any race condition.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Changes priority of IPC and IDC tasks. They are always scheduled
as EDF tasks, where order of scheduling is based on deadline
and priority is meant for special tasks e.g. IDLE or ALMOST_IDLE.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Fix the core-isa headers for HSW and BDW.
Provide a virtual threadptr register in the memory map using a linker
area below the stack. This can then be referenced instead of the register
for ISAs that dont support threadptr.
This patch also includes initial vthreadptr support for HSW/BDW platforms.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Moves idc implementation to cavs drivers instead of keeping
it in generic xtensa arch directory. IDC is specific for
SMP cAVS platforms.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
We need to switch stacks before check for spurious interrupt,
because otherwise we will jump and try to restore stack pointer
from the wrong location.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Runs interrupt handlers for cascaded interrupts in non atomic
context. Otherwise we are blocking other cores during execution,
which is not needed, since we only need to protect integrity of
the list.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Runs interrupt handlers for cascaded interrupts in non atomic
context. Otherwise we are blocking other cores during execution,
which is not needed, since we only need to protect integrity of
the list.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
When triggering a pipeline, containing a mixer in the playback
direction, all input pipelines have to be considered. However, this
isn't applicable if the mixer is used in the capture direction. This
patch adds the missing check to mixer_trigger().
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
This patch provides a check for channel existence
before performing any action on it during reset
procedure.
Signed-off-by: Marcin Rajwa <marcin.rajwa@linux.intel.com>
Fixes freeing of dma channel. It's set during dai configuration,
so we should first check if it exists.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
PM enable and disable is an interface to control the power
management of a resource.
PM is_active is an interface to query the pm management status
of the resource.
Signed-off-by: Marcin Maka <marcin.maka@linux.intel.com>
A common structure should be define for all cAVS platforms
for data that will be used by common cAVS pm runtime routines.
Signed-off-by: Marcin Maka <marcin.maka@linux.intel.com>
Another platform specific platform_wait_for_interrupt handler
enables more platform level power optimizations when
entering sleep mode.
By default implemented as a call to the generic wait_for_interrupt
until the platforms start additing their specific settings there.
Signed-off-by: Marcin Maka <marcin.maka@linux.intel.com>
This header may be included by a platform specific, intermediate
wait() layer inserted between the lib and the architecture code.
Therefore the including unit should not be limited to lib only.
Signed-off-by: Marcin Maka <marcin.maka@linux.intel.com>
The 3rd DMAC that CHT has seems to be causing issues. Since it is not
needed lets make it optional so the platform can be usable.
Signed-off-by: Curtis Malainey <cujomalainey@google.com>
Low latency scheduler is low latency, so the tasks shouldn't
be preempted by other things. This doesn't change any flow,
because xtos sets highest possible irq level in interrupt
dispatcher anyway.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
These functions replace the raw io_reg_* functions for accessing the DMA
hardware registers.
Every DMA driver makes auxiliary functions for accessing the hardware
registers; this is an effort to make common functions for this purpose.
This commit adds the generic functions.
Signed-off-by: Paul Olaru <paul.olaru@nxp.com>
In case when we overwrite "old" data in buffer
(when buffer is full) we should align r_ptr
with w_ptr.
Signed-off-by: Bartosz Kokoszko <bartoszx.kokoszko@linux.intel.com>
This function is called too early for native timers to work. On the
other platform which uses native timers (Haswell) this function is also
empty.
Signed-off-by: Paul Olaru <paul.olaru@nxp.com>
Dynamic allocations of the stack with the default size
may impact the performance in case of frequently re-initiated
short tasks. This option may be useful in that case.
Signed-off-by: Marcin Maka <marcin.maka@linux.intel.com>
This patch fixes the incorrect check for
host_period_bytes. This value was incorrectly used
to store host request for stream position. After
we introduced dedicated parameter for this purpose
(no_stream_position) the check needs to be updated
accordingly. Therefore this patch adds a check
for no_stream_position rather than host_period_bytes
to decide if stream position shall be send.
Signed-off-by: Marcin Rajwa <marcin.rajwa@linux.intel.com>
This change is to align sof_ipc_stream_params with its
kernel equivalent. In this patch no_stream_position
parameter is added to relax host_period_bytes from
storing information about the need of stream position
update.
Signed-off-by: Marcin Rajwa <marcin.rajwa@linux.intel.com>
This patch checks if during scheduling we were
delayed.
If such situation happens we log error message.
Signed-off-by: Marcin Rajwa <marcin.rajwa@linux.intel.com>
This patch reworks cAVS timer_set() interface used
to write into timer's compare register.
This change takes care of ticks request which are
"past time". If such condition occur we set compare
register to current time so the latency is minimum.
Signed-off-by: Marcin Rajwa <marcin.rajwa@linux.intel.com>
Changes clock used by agent to PLATFORM_DEFAULT_CLOCK.
Previously used PLATFORM_WORKQ_CLOCK also has value of
PLATFORM_DEFAULT_CLOCK.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Refactors ll scheduler in order to incorporate the usage
of ll scheduling domain. Functionally it stays the same.
Now we use data shared in ll_schedule_domain instead
of allocating shared ll context.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Adds first ll scheduler domain, which is timer.
Timer domain implementation is functionally the same,
as the implementation already used in ll_schedule.
It will replace the original ll_schedule one.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Changes timer API to save interrupt handler argument
in ll scheduler shared context instead of timer struct.
This way we will be able to share the same timer structure
between all the cores.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
This patch introduces new structure called ll_schedule_domain.
It will be used to initialize ll scheduler with different
types of scheduling time domains. Right now it's only working
based on timer interrupts, but will be extended.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
In alloc_cont_blocks() function after allocation we should
check whether new first_free block has been already used.
If it was used, we should find first not used block.
fixes#1714
Signed-off-by: Bartosz Kokoszko <bartoszx.kokoszko@linux.intel.com>
Currently SRC returns error when 0 size input or output data is detected
and pipeline interpretes this as fatal xrun error. This could happen
for example when host dma has no time to fill in first iteration of
samples. So instead of error, return PPL_STATUS_PATH_STOP as SRC in the
middle of the pipeline should handle also occasional 0 size data.
Signed-off-by: Jaska Uimonen <jaska.uimonen@intel.com>
This header may be included by a platform specific, intermediate
wait() layer inserted between the lib and the architecture code.
Therefore the including unit should not be limited to lib only.
Signed-off-by: Marcin Maka <marcin.maka@linux.intel.com>
Integration specific tweaks for xtensa architecture should
use Kconfig options selected for required platforms, not the
platform headers.
Signed-off-by: Marcin Maka <marcin.maka@linux.intel.com>
Moves platform_trace_point macro from platform/platform.h
to platform/trace/trace.h. This way we don't need to
include platform header from generic sof/trace/trace.h.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
The context switching layer is a common mechanism for all
pre-emptive schedulers and should not depend on data types
defined for any specific one.
Signed-off-by: Marcin Maka <marcin.maka@linux.intel.com>
Refactors schedule code in order to allow dynamic scheduler
creation. We don't want to add every new scheduler to the static
array of scheduler_ops and also we don't want to have every
scheduler created on every platform. Maybe some of the platforms
won't need some of the future scheduler types.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Adds missing flag during draining task initialization.
It's needed at the moment, so the EDF scheduler can ignore
deadline for this task. Scheduling flags will be soon
refactored.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
This patch removes the IRQ disable during
pipeline_prepare() as there is no potential
race condition. Also, the disable of IRQs
result in long delays in queued interrupts.
Signed-off-by: Marcin Rajwa <marcin.rajwa@linux.intel.com>
This patch removes the IRQ disable during
pipeline_params() as there is no potential
race condition. Also, The disable of IRQs
result in long delays in queued interrupts.
Signed-off-by: Marcin Rajwa <marcin.rajwa@linux.intel.com>
Instead of always returning -EINVAL propagate the error code from
ipc_stream_pcm_params() that actually caused the failure.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Two variables in host_new() contain constant values and only obscure
the code. Remove them.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
There is usually no need in explicit "inline" qualifiers in C, in
most cases the compiler does a good job deciding which functions to
inline. Also remove a redundant variable and simplify a function.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
rzalloc() allocates 0-initialised RAM, there's no need to initialise
it to 0 immediately after allocation.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Current implementations of ll_sch_set_pdata() and ll_sch_get_pdata()
are unsafe, replace them with safe versions.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Static data is always zeroed in C, no need for an explicit
initialisation.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
This patch implements the new version of EDF scheduler.
This is the first basic implementation, which can be easily extended
in the future.
Previous implementation had two major flaws:
- Tasks could only be preempted based on the interrupt level on which
they have been scheduled, so it was limited based on the hardware.
- This led to the system not fully utilized, so we could never achieve
full EDF functionality.
The new implementation uses only one software interrupt and allows for
dynamic context switching between different tasks based on the deadline.
Also for some cases priority is taken into consideration e.g. for idle
and almost idle tasks, which don't have deadline at all and should be
executed only if the system is free. All other normal tasks should have
the same priority. Task chosen to be run is executed on passive level,
so automatically can be preempted by every interrupt. Every task has
its own private stack on which current context is saved and restored
if needed. Note that main firmware loop is task scheduled with
idle priority, so it will be executed only after every other task
is completed.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Increases HP Buffer Heap and Runtime System Heap sizes in order to
fit all the pipeline buffers.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Passes sof context structure to the schedulers during
scheduler initialization. It will be required by the new
EDF scheduler.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Karol Trzcinski