cavs: enable power gating for lp/hpsram on d3 entry

Power gating for HPSRAM & LPSRAM on D3 entry enabled for all cAVS
platforms (cAVS 1.5/1.8/2.x) except SueCreek. Implementation shared
between cAVS 1.8/2.0/2.5 is located in cavs lib, cAVS 1.5 specific
implementation remains in ApolloLake platform directory.

Signed-off-by: Lech Betlej <lech.betlej@linux.intel.com>

src/drivers/intel/cavs/ipc.c

@@ -120,7 +120,7 @@ static void ipc_irq_handler(void *arg)
 
 static enum task_state ipc_platform_do_cmd(void *data)
 {
-#if CAVS_VERSION < CAVS_VERSION_2_0
+#if !CONFIG_SUECREEK
 	struct ipc *ipc = data;
 #endif
 	struct sof_ipc_cmd_hdr *hdr;
@@ -131,7 +131,7 @@ static enum task_state ipc_platform_do_cmd(void *data)
 	ipc_cmd(hdr);
 
 	/* are we about to enter D3 ? */
-#if CAVS_VERSION < CAVS_VERSION_2_0
+#if !CONFIG_SUECREEK
 	if (ipc->pm_prepare_D3) {
 		/* no return - memory will be powered off and IPC sent */
 		platform_pm_runtime_power_off();
@@ -143,7 +143,7 @@ static enum task_state ipc_platform_do_cmd(void *data)
 
 static void ipc_platform_complete_cmd(void *data)
 {
-#if CAVS_VERSION >= CAVS_VERSION_2_0
+#if CONFIG_SUECREEK
 	struct ipc *ipc = data;
 #endif
 
@@ -162,7 +162,7 @@ static void ipc_platform_complete_cmd(void *data)
 	/* unmask Busy interrupt */
 	ipc_write(IPC_DIPCCTL, ipc_read(IPC_DIPCCTL) | IPC_DIPCCTL_IPCTBIE);
 
-#if CAVS_VERSION >= CAVS_VERSION_2_0
+#if CONFIG_SUECREEK
 	if (ipc->pm_prepare_D3) {
 		//TODO: add support for Icelake
 		while (1)

src/platform/apollolake/include/platform/power_down.h

@@ -1,13 +0,0 @@
-/* SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright(c) 2018 Intel Corporation. All rights reserved.
- *
- * Author: Lech Betlej <lech.betlej@linux.intel.com>
- */
-
-#ifndef __PLATFORM_POWER_DOWN_H__
-#define __PLATFORM_POWER_DOWN_H__
-
-#include <cavs/power_down.h>
-
-#endif /* __PLATFORM_POWER_DOWN_H__ */

src/platform/apollolake/lib/CMakeLists.txt

@@ -2,4 +2,5 @@
 
 add_local_sources(sof
 	clk.c
-	power_down.S)
+	power_down.S
+)

src/platform/cannonlake/include/platform/power_down.h

@@ -1,13 +0,0 @@
-/* SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright(c) 2018 Intel Corporation. All rights reserved.
- *
- * Author: Lech Betlej <lech.betlej@linux.intel.com>
- */
-
-#ifndef __PLATFORM_POWER_DOWN_H__
-#define __PLATFORM_POWER_DOWN_H__
-
-#include <cavs/power_down.h>
-
-#endif /* __PLATFORM_POWER_DOWN_H__ */

src/platform/icelake/include/platform/lib/pm_runtime.h

@@ -49,6 +49,11 @@ void platform_pm_runtime_disable(uint32_t context, uint32_t index);
 
 bool platform_pm_runtime_is_active(uint32_t context, uint32_t index);
 
+/**
+ * \brief Power gates platform specific hardware resources.
+ */
+void platform_pm_runtime_power_off(void);
+
 #endif /* __PLATFORM_LIB_PM_RUNTIME_H__ */
 
 #else

src/platform/intel/cavs/include/cavs/lib/power_down.h

@@ -5,10 +5,8 @@
  * Author: Lech Betlej <lech.betlej@linux.intel.com>
  */
 
-#ifdef __PLATFORM_POWER_DOWN_H__
-
-#ifndef __CAVS_POWER_DOWN_H__
-#define __CAVS_POWER_DOWN_H__
+#ifndef __CAVS_LIB_POWER_DOWN_H__
+#define __CAVS_LIB_POWER_DOWN_H__
 
 #include <stdbool.h>
 #include <stdint.h>
@@ -23,10 +21,4 @@
  */
 void power_down(bool disable_lpsram, uint32_t *hpsram_pwrgating_mask);
 
-#endif /* __CAVS_POWER_DOWN_H__ */
-
-#else
-
-#error "This file shouldn't be included from outside of platform/power_down.h"
-
-#endif /* __PLATFORM_POWER_DOWN_H__ */
+#endif /* __CAVS_LIB_POWER_DOWN_H__ */

src/platform/intel/cavs/lib/pm_runtime.c

@@ -34,9 +34,8 @@
 #define trace_power(format, ...)	\
 	trace_event(TRACE_CLASS_POWER, format, ##__VA_ARGS__)
 
-#if CONFIG_APOLLOLAKE || CONFIG_CANNONLAKE
-//TODO: add support or at least stub api for Icelake based on Cannonlake
-#include <platform/power_down.h>
+#if !CONFIG_SUECREEK
+#include <cavs/lib/power_down.h>
 #endif
 
 /** \brief Runtime power management data pointer. */
@@ -409,13 +408,10 @@ bool platform_pm_runtime_is_active(uint32_t context, uint32_t index)
 
 }
 
-#if CONFIG_APOLLOLAKE || CONFIG_CANNONLAKE
+#if !CONFIG_SUECREEK
 void platform_pm_runtime_power_off(void)
 {
 	uint32_t hpsram_mask[PLATFORM_HPSRAM_SEGMENTS], i;
-	//TODO: add LDO control for LP SRAM - set LDO BYPASS & LDO ON
-	//TODO: hpsram_mask to be used in the future for run-time
-	//power management of SRAM banks i.e use. HPSRAM_MASK() macro
 	/* power down entire HPSRAM */
 	for (i = 0; i < PLATFORM_HPSRAM_SEGMENTS; i++)
 		hpsram_mask[i] = HPSRAM_MASK(i);

src/platform/tigerlake/include/platform/lib/pm_runtime.h

@@ -49,6 +49,11 @@ void platform_pm_runtime_disable(uint32_t context, uint32_t index);
 
 bool platform_pm_runtime_is_active(uint32_t context, uint32_t index);
 
+/**
+ * \brief Power gates platform specific hardware resources.
+ */
+void platform_pm_runtime_power_off(void);
+
 #endif /* __PLATFORM_LIB_PM_RUNTIME_H__ */
 
 #else