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platform: cavs: make windows clear on init optional 

There might be other flows defined in future, that would
need to reprogram hw registers only while preserving
the content of memory windows.

Signed-off-by: Marcin Maka <marcin.maka@linux.intel.com>
This commit is contained in:
Marcin Maka 2019-10-25 15:56:51 +02:00 committed by Janusz Jankowski
parent e5d8a5c933
commit 9b6ad970af
4 changed files with 80 additions and 36 deletions
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19
src/platform/intel/cavs/include/cavs/mem_window.h Normal file
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@ -0,0 +1,19 @@
/* SPDX-License-Identifier: BSD-3-Clause
*
* Copyright(c) 2019 Intel Corporation. All rights reserved.
*
* Author: Marcin Maka <marcin.maka@linux.intel.com>
*/
#ifndef __CAVS_MEM_WINDOW_H__
#define __CAVS_MEM_WINDOW_H__
#include <sof/bit.h>
#include <stdint.h>
/** \brief Zero memory window during initialization */
#define MEM_WND_INIT_CLEAR BIT(0)
void platform_memory_windows_init(uint32_t flags);
#endif /*__CAVS_MEM_WND_H__ */

4
src/platform/intel/cavs/lib/CMakeLists.txt
View File

@ -8,3 +8,7 @@ add_local_sources(sof
pm_memory.c
power_down.S
)
if(CONFIG_MEM_WND)
add_local_sources(sof mem_window.c)
endif()

55
src/platform/intel/cavs/lib/mem_window.c Normal file
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@ -0,0 +1,55 @@
// SPDX-License-Identifier: BSD-3-Clause
//
// Copyright(c) 2019 Intel Corporation. All rights reserved.
//
// Author: Marcin Maka <marcin.maka@linux.intel.com>
/**
* \file platform/intel/cavs/mem_window.c
* \brief Memory windows programming and initialization
* \author Marcin Maka <marcin.maka@linux.intel.com>
*/
#include <cavs/mem_window.h>
#include <sof/lib/alloc.h>
#include <sof/lib/io.h>
#include <sof/lib/shim.h>
static inline void memory_window_init(uint32_t index,
uint32_t base, uint32_t size,
uint32_t zero_base, uint32_t zero_size,
uint32_t wnd_flags, uint32_t init_flags)
{
io_reg_write(DMWLO(index), size | 0x7);
io_reg_write(DMWBA(index), base | wnd_flags);
if (init_flags & MEM_WND_INIT_CLEAR) {
bzero((void *)zero_base, zero_size);
dcache_writeback_region((void *)zero_base, zero_size);
}
}
void platform_memory_windows_init(uint32_t flags)
{
/* window0, for fw status & outbox/uplink mbox */
memory_window_init(0, HP_SRAM_WIN0_BASE, HP_SRAM_WIN0_SIZE,
HP_SRAM_WIN0_BASE + SRAM_REG_FW_END,
HP_SRAM_WIN0_SIZE - SRAM_REG_FW_END,
DMWBA_READONLY | DMWBA_ENABLE, flags);
/* window1, for inbox/downlink mbox */
memory_window_init(1, HP_SRAM_WIN1_BASE, HP_SRAM_WIN1_SIZE,
HP_SRAM_WIN1_BASE, HP_SRAM_WIN1_SIZE,
DMWBA_ENABLE, flags);
/* window2, for debug */
memory_window_init(2, HP_SRAM_WIN2_BASE, HP_SRAM_WIN2_SIZE,
HP_SRAM_WIN2_BASE, HP_SRAM_WIN2_SIZE,
DMWBA_ENABLE, flags);
/* window3, for trace
* zeroed by trace initialization
*/
memory_window_init(3, HP_SRAM_WIN3_BASE, HP_SRAM_WIN3_SIZE,
HP_SRAM_WIN3_BASE, HP_SRAM_WIN3_SIZE,
DMWBA_READONLY | DMWBA_ENABLE, 0);
}

38
src/platform/intel/cavs/platform.c
View File

@ -8,6 +8,7 @@
// Janusz Jankowski <janusz.jankowski@linux.intel.com>
#include <cavs/version.h>
#include <cavs/mem_window.h>
#include <sof/common.h>
#include <sof/debug/debug.h>
#include <sof/drivers/dw-dma.h>
@ -290,41 +291,6 @@ int platform_boot_complete(uint32_t boot_message)
#endif
#if CONFIG_MEM_WND
static void platform_memory_windows_init(void)
{
/* window0, for fw status & outbox/uplink mbox */
io_reg_write(DMWLO(0), HP_SRAM_WIN0_SIZE | 0x7);
io_reg_write(DMWBA(0), HP_SRAM_WIN0_BASE
| DMWBA_READONLY | DMWBA_ENABLE);
bzero((void *)(HP_SRAM_WIN0_BASE + SRAM_REG_FW_END),
HP_SRAM_WIN0_SIZE - SRAM_REG_FW_END);
dcache_writeback_region((void *)(HP_SRAM_WIN0_BASE + SRAM_REG_FW_END),
HP_SRAM_WIN0_SIZE - SRAM_REG_FW_END);
/* window1, for inbox/downlink mbox */
io_reg_write(DMWLO(1), HP_SRAM_WIN1_SIZE | 0x7);
io_reg_write(DMWBA(1), HP_SRAM_WIN1_BASE
| DMWBA_ENABLE);
bzero((void *)HP_SRAM_WIN1_BASE, HP_SRAM_WIN1_SIZE);
dcache_writeback_region((void *)HP_SRAM_WIN1_BASE, HP_SRAM_WIN1_SIZE);
/* window2, for debug */
io_reg_write(DMWLO(2), HP_SRAM_WIN2_SIZE | 0x7);
io_reg_write(DMWBA(2), HP_SRAM_WIN2_BASE
| DMWBA_ENABLE);
bzero((void *)HP_SRAM_WIN2_BASE, HP_SRAM_WIN2_SIZE);
dcache_writeback_region((void *)HP_SRAM_WIN2_BASE, HP_SRAM_WIN2_SIZE);
/* window3, for trace
* zeroed by trace initialization
*/
io_reg_write(DMWLO(3), HP_SRAM_WIN3_SIZE | 0x7);
io_reg_write(DMWBA(3), HP_SRAM_WIN3_BASE
| DMWBA_READONLY | DMWBA_ENABLE);
}
#endif
#if CAVS_VERSION >= CAVS_VERSION_1_8
/* init HW */
static void platform_init_hw(void)
@ -367,7 +333,7 @@ int platform_init(struct sof *sof)
#if CONFIG_MEM_WND
trace_point(TRACE_BOOT_PLATFORM_MBOX);
platform_memory_windows_init();
platform_memory_windows_init(MEM_WND_INIT_CLEAR);
#endif
/* init timers, clocks and schedulers */