zephyr/soc/intel/intel_adsp/ace
Tomasz Leman 5cf2cb6a37 soc: intel_adsp: ace: Use DT macros instead of hardcoded values
Replace hardcoded register addresses and values in
asm_memory_management.h with Devicetree (DT) macros for LPSRAM
power-down operations. This change ensures that register addresses and
bank counts are dynamically obtained from the Devicetree, improving code
portability and reducing the risk of errors due to manual updates.

- Removed hardcoded LSPGCTL address definitions.
- Updated m_ace_lpsram_power_down_entire macro to use DT_NODELABEL to
  fetch LPSRAM bank count and control register address
- Adjusted bit field extraction logic to align with the updated register
  information from the Devicetree.

This commit aligns with the ongoing effort to utilize Devicetree for
hardware abstraction and to facilitate easier maintenance and updates to
the codebase.

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
2024-11-16 14:03:50 -05:00
..
include dts: xtensa: intel: Add hsbcap register node for ADSP ACE platforms 2024-11-16 14:03:50 -05:00
CMakeLists.txt
Kconfig
Kconfig.defconfig.ace15_mtpm
Kconfig.defconfig.ace20_lnl
Kconfig.defconfig.ace30
Kconfig.defconfig.series
Kconfig.soc
_soc_inthandlers.h
ace-link.ld
asm_memory_management.h soc: intel_adsp: ace: Use DT macros instead of hardcoded values 2024-11-16 14:03:50 -05:00
boot.c
comm_widget.c
comm_widget.h
comm_widget_messages.c
irq.c
linker.ld
mmu_ace30.c
multiprocessing.c
pmc_interface.h
power.c soc: intel_adsp: ace: Update power_down to use new HPSRAM power-down macro 2024-11-16 14:03:50 -05:00
power_down.S soc: intel_adsp: ace: Update power_down to use new HPSRAM power-down macro 2024-11-16 14:03:50 -05:00
sram.c
timestamp.c