Tomasz Leman 5cf2cb6a37 soc: intel_adsp: ace: Use DT macros instead of hardcoded values ... Replace hardcoded register addresses and values in asm_memory_management.h with Devicetree (DT) macros for LPSRAM power-down operations. This change ensures that register addresses and bank counts are dynamically obtained from the Devicetree, improving code portability and reducing the risk of errors due to manual updates. - Removed hardcoded LSPGCTL address definitions. - Updated m_ace_lpsram_power_down_entire macro to use DT_NODELABEL to fetch LPSRAM bank count and control register address - Adjusted bit field extraction logic to align with the updated register information from the Devicetree. This commit aligns with the ongoing effort to utilize Devicetree for hardware abstraction and to facilitate easier maintenance and updates to the codebase. Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>		2024-11-16 14:03:50 -05:00
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ace	soc: intel_adsp: ace: Use DT macros instead of hardcoded values	2024-11-16 14:03:50 -05:00
cavs	Revert parts of "soc: intel: move init code from SYS_INIT to hooks"	2024-09-23 18:13:17 -04:00
common	zephyr: bulk update to DT_NODE_HAS_STATUS_OKAY	2024-10-03 17:06:52 +01:00
tools	soc: intel_adsp: tools: cavstool.py: add RPL and ADL-N support	2024-10-23 11:31:35 +02:00
CMakeLists.txt	…
Kconfig	intel_adsp: Add board definitions for adsp simulator	2024-08-28 16:35:55 -04:00
Kconfig.defconfig	soc: intel_adsp: DCACHE_LINE_SIZE was not defined	2024-08-20 19:43:37 -04:00
Kconfig.soc	…
soc.yml	soc: intel: renamed soc from ace30_ptl to ace30	2024-09-24 10:10:37 +02:00