Tomasz Leman 5cf2cb6a37 soc: intel_adsp: ace: Use DT macros instead of hardcoded values ... Replace hardcoded register addresses and values in asm_memory_management.h with Devicetree (DT) macros for LPSRAM power-down operations. This change ensures that register addresses and bank counts are dynamically obtained from the Devicetree, improving code portability and reducing the risk of errors due to manual updates. - Removed hardcoded LSPGCTL address definitions. - Updated m_ace_lpsram_power_down_entire macro to use DT_NODELABEL to fetch LPSRAM bank count and control register address - Adjusted bit field extraction logic to align with the updated register information from the Devicetree. This commit aligns with the ongoing effort to utilize Devicetree for hardware abstraction and to facilitate easier maintenance and updates to the codebase. Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>		2024-11-16 14:03:50 -05:00
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alder_lake	soc: x86: add gpio acpi resource enumeration	2024-04-22 06:50:38 -07:00
apollo_lake	drivers/timer/apic_tsc: use ICR as a fallback timeout event source	2024-05-29 08:40:43 +02:00
atom	…
common	soc: x86: add gpio acpi resource enumeration	2024-04-22 06:50:38 -07:00
elkhart_lake	…
intel_adsp	soc: intel_adsp: ace: Use DT macros instead of hardcoded values	2024-11-16 14:03:50 -05:00
intel_ish	soc: intel_ish: remove duplicate hook	2024-09-21 11:29:06 +02:00
intel_niosv	arch: riscv: imply XIP config pushed to SoC level	2024-08-31 06:47:52 -04:00
intel_socfpga	SOC: Updated MAX IRQ num supported by Aglex5	2024-09-05 17:03:05 -04:00
intel_socfpga_std	soc: intel: move init code from SYS_INIT to hooks	2024-09-20 13:15:31 +02:00
lakemont	…
raptor_lake	soc: x86: add gpio acpi resource enumeration	2024-04-22 06:50:38 -07:00