58 lines
1.3 KiB
C
58 lines
1.3 KiB
C
/* Copyright(c) 2021 Intel Corporation. All rights reserved.
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <stddef.h>
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#include <stdint.h>
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#include <zephyr/devicetree.h>
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#include <zephyr/kernel.h>
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#include <zephyr/init.h>
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#include <soc.h>
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#include <zephyr/cache.h>
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#include <adsp_shim.h>
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#include <adsp_memory.h>
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#include <cpu_init.h>
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#include "manifest.h"
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#ifdef CONFIG_PM
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#ifdef CONFIG_ADSP_IMR_CONTEXT_SAVE
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#define STRINGIFY_MACRO(x) Z_STRINGIFY(x)
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#define IMRSTACK STRINGIFY_MACRO(IMR_BOOT_LDR_MANIFEST_BASE)
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__asm__(".section .imr.boot_entry_d3_restore, \"x\"\n\t"
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".align 4\n\t"
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".global boot_entry_d3_restore\n\t"
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"boot_entry_d3_restore:\n\t"
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" movi a0, 0x4002f\n\t"
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" wsr a0, PS\n\t"
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" movi a0, 0\n\t"
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" wsr a0, WINDOWBASE\n\t"
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" movi a0, 1\n\t"
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" wsr a0, WINDOWSTART\n\t"
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" rsync\n\t"
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" movi a1, " IMRSTACK"\n\t"
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" call4 boot_d3_restore\n\t");
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__imr void boot_d3_restore(void)
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{
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cpu_early_init();
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#ifdef CONFIG_ADSP_DISABLE_L2CACHE_AT_BOOT
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ADSP_L2PCFG_REG = 0;
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#endif
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extern void hp_sram_init(uint32_t memory_size);
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hp_sram_init(L2_SRAM_SIZE);
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extern void lp_sram_init(void);
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lp_sram_init();
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extern void pm_state_imr_restore(void);
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pm_state_imr_restore();
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}
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#endif /* CONFIG_ADSP_IMR_CONTEXT_SAVE */
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#endif /* CONFIG_PM */
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