Commit Graph

4564 Commits

Author SHA1 Message Date
huyuan3x cc7bf1a506 doc: Update Using Windows as Guest VM on ACRN
Signed-off-by: huyuan3x <yuanx1.hu@intel.com>
2019-11-08 08:42:34 -08:00
wenlingz f4d6af02b2 doc:modfiy ubuntu build on 18.04
Signed-off-by: wenlingz <wenling.zhang@intel.com>
2019-11-08 08:29:18 -08:00
lirui34 958ea0f11b doc: Stop using kconfig to make a customized efi.
Also fix some quick setup script issues.

Signed-off-by: lirui34 <ruix.li@intel.com>
2019-11-08 08:28:46 -08:00
Wei Liu 7b0cafa84f acrn-config: generate dmar info for board.c
1. Parse DRHD_INFO section from board config xml, and generate dmar
structure information to board.c
2. Copy macro of DRHD_INFO from board config xml to $(board)_acpi_platform.h

Tracked-On: #3854
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
2019-11-08 16:43:08 +08:00
Wei Liu ad9f424ce5 acrn-config: generate proper msr_index value for CLOS
Since msr_index relys on the MSR_IA32_L2_QOS_MASKn(n:max to 3)
macro which defined in hv source code, generate array that CLOS number
more than 4 means need define more than 4 macro.
This patch solve such issue by using MSR_IA32_L2/L3_MASK_BASE with the
msr index offset.

Tracked-On: #3854
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
2019-11-08 16:43:08 +08:00
Wei Liu 6d9ff40183 acrn-config: update DRHD_INFO section for board xml
The DRHD_INFO section should be updated with the refinement patches for
parsing DMAR table.

Tracked-On: #3854
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
2019-11-08 16:43:08 +08:00
Wei Liu 4658259be7 acrn-config: refine DRHD structure initialization
1. Initialize DRHDn_DEVSCOPEn_TYPE/DRHDn_DEVSCOPEn_ID for each devscope;
2. Remove DRHDn_IOAPIC_ID macro;
2. Refine the value format from base 10 to 16.

Tracked-On: #3854
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
2019-11-08 16:43:08 +08:00
Wei Liu 8fcfea1386 acrn-config: refinement for parsing DMAR table
Previous DRHD and device scope number are hard coded to 4, this patch removes
the limitation and parse the real drhd count/devscope count dynamically.

Tracked-On: #3854
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
2019-11-08 16:43:08 +08:00
Wei Liu f10c937b40 acrn-config: correct value of DRHDx_IGNORE macro
The DRHDx_IGNORE should be defined to true when DRHD device BDF equal to
the given CONFIG_GPU_SBDF.

Tracked-On: #3854
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
2019-11-08 16:43:08 +08:00
Binbin Wu dea2e25f41 dm: hw: fix the license of cmos_io.c
Fix the license of cmos_io.c to BSD-3-Clause

Tracked-On: #4032
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
2019-11-08 16:42:54 +08:00
Victor Sun 3411f00b5b HV: fix misra violation on platform clos array
MISRA C requires specified bounds for arrays declaration, previous declaration
of platform_clos_array in board.h does not meet the requirement.

Tracked-On: #3987

Signed-off-by: Victor Sun <victor.sun@intel.com>
2019-11-08 16:40:14 +08:00
Victor Sun c77d275e9d HV: clean up DMAR MACROs for sample platform acpi info
Remove redundant DMAR MACROs for given platform_acpi_info files because
CONFIG_ACPI_PARSE_ENABLED is enabled for all boards by default. The DMAR
info for nuc7i7dnb is kept as reference in the case that ACPI_PARSE_ENABLED
is not set in Kconfig.

As DMAR info is not provided for apl-mrb, the platform_acpi_info.h under
apl-mrb config folder is meaningless, so also remove this file and let
hypervisor parse ACPI for apl-mrb;

Tracked-On: #3977

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-11-08 16:40:14 +08:00
Victor Sun 9e92f3cdf5 HV: move dmar info definition to board.c
The DMAR info is board specific so move the structure definition to board.c.
As a configruation file, the whole board.c could be generated by acrn-config
tool for each board.

Please note we only provide DMAR info MACROs for nuc7i7dnb board. For other
boards, ACPI_PARSE_ENABLED must be set to y in Kconfig to let hypervisor parse
DMAR info, or use acrn-config tool to generate DMAR info MACROs if user won't
enable ACPI parse code for FuSa consideration.

The patch also moves the function of get_dmar_info() to vtd.c, so dmar_info.c
could be removed.

Tracked-On: #3977

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-11-08 16:40:14 +08:00
Victor Sun 589be88cf6 HV: link CONFIG_MAX_IOMMU_NUM and MAX_DRHDS to DRHD_COUNT
The value of CONFIG_MAX_IOMMU and MAX_DRHDS are identical to DRHD_COUNT
which defined in platform ACPI table, so remove CONFIG_MAX_IOMMU_NUM
from Kconfig and link these three MACROs together.

Tracked-On: #3977

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-11-08 16:40:14 +08:00
Conghui Chen 75f512ce8c hv: rename vuart operations
fifo_reset -> reset_fifo
vuart_fifo_init -> init_fifo
vuart_setup - > setup_vuart
vuart_init -> init_vuart
vuart_deinit -> deinit_vuart
vuart_lock_init -> init_vuart_lock
vuart_lock -> obtain_vuart_lock
vuart_unlock -> release_vuart_lock
vuart_deinit_connect -> vuart_deinit_connection

Tracked-On: #4017
Signed-off-by: Conghui Chen <conghui.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-11-08 09:01:01 +08:00
Deb Taylor 96edee5e03 Doc: update conf.py file to include v1.4
Signed-off-by: Deb Taylor <deb.taylor@intel.com>
2019-11-07 19:17:25 -05:00
David B. Kinder 7b9f2f643e doc: clean up waag-secure-boot doc
Cleaned up the presentation and formatting problems from the conversion
to ReST, along with English grammar and spelling edits.

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2019-11-07 18:33:00 -05:00
Deb Taylor 1902cfd174 Doc: Minor grammatical edits on various files.
Signed-off-by: Deb Taylor <deb.taylor@intel.com>
2019-11-07 18:30:17 -05:00
lirui34 ad9b96579f doc: instruction of enabling the laag secure boot
Add tutorial about how to enable the laag secure boot.

Signed-off-by: lirui34 <ruix.li@intel.com>
2019-11-07 14:10:51 -05:00
Yonghua Huang d3cf6a55f2 doc: add hld-security guest secure boot description
1. add guest secure boot with OVMF.
  2. delete obsolete content.
  3. SOS -> Service VM and UOS -> User VM.

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2019-11-07 14:09:46 -05:00
Li, Fei1 c3b4518357 doc: update timer hld
Add two new APIs interfaces design

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-11-07 14:08:39 -05:00
Li, Fei1 8a99a66bd5 doc: update memory management hld
1. Some security features are added into ACRN HV memory management.
2. Dynamic memory allocation is removed. Instead, static memory page allocation is added.
3. The guest to host mapping is not static any more for Service OS after it begins running
since the Service OS support PCI BAR re-pregramming now.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-11-07 14:08:39 -05:00
Deb Taylor f59932e3db Added entry for waag-secure-boot tutorial (added in #3883)
Signed-off-by: Deb Taylor <deb.taylor@intel.com>
2019-11-07 13:26:27 -05:00
lkanx 95f485db51 doc:update acrn_configuration_tool
Signed-off-by: lkanx <lix.kan@intel.com>
2019-11-07 07:08:24 -05:00
Yuan Liu 434a746ccb doc: add waag secure boot enabling
Signed-off-by: Yuan Liu <yuan1.liu@intel.com>
2019-11-07 07:05:29 -05:00
Deb Taylor e68326dbe5 Clean up language in the acrn_quick_setup script.
Signed-off-by: Deb Taylor <deb.taylor@intel.com>
2019-11-07 06:50:51 -05:00
Kaige Fu 20c1ad1b3a HV: correct the formatting flag of hypcall_id
hypcall_id has a type of uint64_t and should use 'llx' as
formatting flag instead of '%d'. Otherwise, we will get a
confusing error log when not-allowed hypercall occurs.

Without this patch:
[96707209us][cpu=1][sev=3][seq=2386]:hypercall -2147483548 is only allowed from SOS_VM!

With this patch:
[84613395us][cpu=1][sev=3][seq=2136]:hypercall 0x80000064 is only allowed from SOS_VM!

So, we can figure out which not-allowed hypercall has been triggered more conveniently.

BTW, this patch adds hypcall_id which triggered from non-ring0 into error log.

Tracked-On: #4012
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
2019-11-07 15:01:21 +08:00
Li Fei1 af886fee8c efi-stub: reserve unconfigure high memory
Now ACRN support more and more platforms. However, the default configuration only
support board which memory is less than 16 GB. If a board memory is large than
16 GB, the developer needs to configure the memory configuration according to his
board. Otherwise, the boot will fail. This's because UEFI BIOS will use the high
memory as possible.
This patch try to allocate the memory as eraly as possible. So that the BIOS will
not access this region.

Tracked-On: #4007
Signed-off-by: Li Fei1 <fei1.li@intel.com>
2019-11-07 08:47:02 +08:00
Li Fei1 8189d1f01c hv: mmu: fliter e820 which is over top address space
Now the default board memory size is 16 GB. However, ACRN support more and more boards
which may have memory size large than 16 GB. This patch try to filter e820 table which
is over top address space.

Tracked-On: #4007
Signed-off-by: Li Fei1 <fei1.li@intel.com>
2019-11-07 08:47:02 +08:00
Li Fei1 620a1c5215 hv: mmu: rename e820 to hv_e820
Now the e820 structure store ACRN HV memory layout, not the physical memory layout.
Rename e820 to hv_hv_e820 to show this explicitly.

Tracked-On: #4007
Signed-off-by: Li Fei1 <fei1.li@intel.com>
2019-11-07 08:47:02 +08:00
Jason Chen CJ 33eea943a1 doc: schedule_vcpu was removed
schedule_vcpu should be replaced by launch_vcpu

Tracked-On: #3963
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2019-11-06 17:05:00 -05:00
lirui34 f835fdef05 doc: Remove apl gsg and merge contents into rt gsg
Change APL getting started guide to KBL getting started guide;
Merge some of the contents into preempt-rt getting started guide;
Move the modified kbl getting started guide to the behind of the configuration tutorials;
Fix issues for acrn_quick_setup.sh script.

Signed-off-by: lirui34 <ruix.li@intel.com>
2019-11-05 15:09:49 -05:00
Gao Junhao 90cf27aa5f dm: remove cfc/cf8 pio handler
The acrn vhm driver will convert all PCI configure space access to
PCI_CFG type, so the pci_emul_cfgaddr and pci_emul_cfgdata will nerver
be invoked. Remove these useless functions.

Tracked-On: #3999
Signed-off-by: Gao Junhao <junhao.gao@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
2019-11-05 16:07:38 +08:00
Yonghua Huang 8227804b09 hv:Unmap AP trampoline region from service VM's EPT
AP trampoline code should be accessible
 to hypervisor only, this patch is to unmap
 this region from service VM's EPT for security
 reason.

Tracked-On: #3992
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-11-05 15:14:13 +08:00
Yonghua Huang d74497eb17 hv:refine modify_or_del_pte/pde/pdpte()function
1. Print warning message instead of ASSERT when
     the caller try to modify the attribute for
     memory region that is not present.
  2. To avoid above warning  message for memory region
     below 1M,its attribute may be updated by Service
     VM when updating MTTR setting.

Tracked-On: #3992
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-11-05 15:14:13 +08:00
Yonghua Huang 6ae2d9f22b hv: refine 'get_direct_boot_ap_trampoline()'
Currently, memory with size of 'CONFIG_LOW_RAM_SIZE' will be
  allocated when 'get_direct_boot_ap_trampoline()' is called.

  This patch refine the implementation of of above function, it
  returns the base address of trampoline buffer when called, and
  the memory is allocated when vboot module is initialized.

Tracked-On: #3992
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
2019-11-05 15:14:13 +08:00
Tonny Tzeng fd8b9c58ee doc: remove redundant copy of ovmf.fd firmware
Remove redundant copy of ovmf.fd firmware as the lunach script now
instructs the DM to user the OVMF.fd firmware directly from the rootfs.

Tracked-On: #3972
Signed-off-by: Tonny Tzeng <tonny.tzeng@intel.com>
2019-11-04 08:58:23 -05:00
Tonny Tzeng bd23e50642 doc: remove the guest cpu number option '-c' from the document
This commit updates the DM parameters reference document to reflect
the removal of the guest cpu number option '-c' implementation.

Tracked-On: #3989
Signed-off-by: Tonny Tzeng <tonny.tzeng@intel.com>
2019-11-04 08:56:15 -05:00
Yang, Yu-chu 086ec45725 doc: OVMF high level description
Add OVMF HLD and boot flow graph

Signed-off-by: Yang, Yu-chu <yu-chu.yang@intel.com>
2019-11-04 08:55:25 -05:00
wenlingz 18d5dd2fe9 Revert "OVMF release v1.4"
This reverts commit 84e5a8e894.
2019-11-04 11:15:00 +08:00
Kaige Fu c22f899a5e HV: Fix poweroff issue of hard RTVM
We should use INIT signal to notify the vcpu threads when
powering off the hard RTVM. To achive this, we should set
the vcpu->thread_obj.notify_mode as SCHED_NOTIFY_INIT.

Patch (27163df9 hv: sched: add sleep/wake for thread object)
tries to set the notify_mode according `is_lapic_pt_enabled(vcpu)`
in function prepare_vcpu. But at this point, the is_lapic_pt_enabled(vcpu)
will always return false. Consequently, it will set notify_mode
as SCHED_NOTIFY_IPI. Then leads to the failure of powering off
hard RTVM.

This patch fixes it by:
  - Initialize the notify_mode as SCHED_NOTIFY_IPI in prepare_vcpu.
  - Set notify_mode as SCHED_NOTIFY_INIT after guest is trying to
    enable x2apic mode of passthru lapic.

Tracked-On: #3975
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
Reviewed-by: Yan, Like <like.yan@intel.com>
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
2019-11-04 10:28:16 +08:00
Li, Fei1 9d26dab6d6 hv: mmio: add a lock to protect mmio_node access
After adding PCI BAR remap support, mmio_node may unregister when there's others
access it. This patch add a lock to protect mmio_node access.

Tracked-On: #3475
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-11-01 14:44:11 +08:00
Li, Fei1 21cb120bcc hv: vpci: add a global PCI lock for each VM
Concurrent access on PCI device may happened if UOS try to access PCI configuration
space on different vCPUs through IO port. This patch just adds a global PCI lock for
each VM to prevent the concurrent access.

Tracked-On: #3475
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-11-01 14:44:11 +08:00
Li, Fei1 f711d3a639 hv: vpci: define PCI CONFIG_ADDRESS Register as its physical layout
Refine PCI CONFIG_ADDRESS Register definition as its physical layout.
In this case, we could read/write PCI CONFIG_ADDRESS Register atomically.

Tracked-On: #3475
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-11-01 14:44:11 +08:00
wenlingz c8fa8e15f8 Modify KBL-NUC/SDC for default build
Tracked-On: #3968
Signed-off-by: wenlingz <wenling.zhang@intel.com>
2019-11-01 09:06:45 +08:00
Yin Fengwei 98fa9a81cd Doc: Update system power management doc
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
2019-10-31 18:54:51 -04:00
Yin Fengwei 3a4af4b096 doc: Update hv power management doc
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
2019-10-31 18:52:20 -04:00
Jason Chen CJ b2ef980260 document: update HLD for hypervisor overview
updated this chapter based on latest master
some part still need update:
- vSBL need be replaced by OVMF after removed all vSBL stuff

Tracked-On: #3882
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2019-10-31 18:44:27 -04:00
Jason Chen CJ 700d54e817 document: update HLD for cpu virtualization
updated this chapter based on latest master

Tracked-On: #3882
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2019-10-31 18:41:31 -04:00
Li, Fei1 6f310d1ab2 hv: mmio: move EPT operation out of register_mmio_emulation_handler
register_mmio_emulation_handler should only register handler for mmio emulation.

Tracked-On: #3475
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-10-31 11:46:10 +08:00