hv: mmu: rename e820 to hv_e820

Now the e820 structure store ACRN HV memory layout, not the physical memory layout.
Rename e820 to hv_hv_e820 to show this explicitly.

Tracked-On: #4007
Signed-off-by: Li Fei1 <fei1.li@intel.com>
This commit is contained in:
Li Fei1 2019-11-06 17:51:30 +08:00 committed by wenlingz
parent 33eea943a1
commit 620a1c5215
4 changed files with 48 additions and 45 deletions

View File

@ -17,33 +17,36 @@
* and hide HV memory from SOS_VM...
*/
static uint32_t e820_entries_count;
static struct e820_entry e820[E820_MAX_ENTRIES];
static struct e820_mem_params e820_mem;
static uint32_t hv_e820_entries_nr;
/* Describe the memory layout the hypervisor uses */
static struct e820_entry hv_e820[E820_MAX_ENTRIES];
/* Describe the top/bottom/size of the physical memory the hypervisor manages */
static struct mem_range hv_mem_range;
#define ACRN_DBG_E820 6U
static void obtain_e820_mem_info(void)
static void obtain_mem_range_info(void)
{
uint32_t i;
struct e820_entry *entry;
e820_mem.mem_bottom = UINT64_MAX;
e820_mem.mem_top = 0x0UL;
e820_mem.total_mem_size = 0UL;
hv_mem_range.mem_bottom = UINT64_MAX;
hv_mem_range.mem_top = 0x0UL;
hv_mem_range.total_mem_size = 0UL;
for (i = 0U; i < e820_entries_count; i++) {
entry = &e820[i];
if (e820_mem.mem_bottom > entry->baseaddr) {
e820_mem.mem_bottom = entry->baseaddr;
for (i = 0U; i < hv_e820_entries_nr; i++) {
entry = &hv_e820[i];
if (hv_mem_range.mem_bottom > entry->baseaddr) {
hv_mem_range.mem_bottom = entry->baseaddr;
}
if ((entry->baseaddr + entry->length) > e820_mem.mem_top) {
e820_mem.mem_top = entry->baseaddr + entry->length;
if ((entry->baseaddr + entry->length) > hv_mem_range.mem_top) {
hv_mem_range.mem_top = entry->baseaddr + entry->length;
}
if (entry->type == E820_TYPE_RAM) {
e820_mem.total_mem_size += entry->length;
hv_mem_range.total_mem_size += entry->length;
}
}
}
@ -59,8 +62,8 @@ uint64_t e820_alloc_low_memory(uint32_t size_arg)
/* We want memory in page boundary and integral multiple of pages */
size = (((size + PAGE_SIZE) - 1U) >> PAGE_SHIFT) << PAGE_SHIFT;
for (i = 0U; i < e820_entries_count; i++) {
entry = &e820[i];
for (i = 0U; i < hv_e820_entries_nr; i++) {
entry = &hv_e820[i];
uint64_t start, end, length;
start = round_page_up(entry->baseaddr);
@ -76,7 +79,7 @@ uint64_t e820_alloc_low_memory(uint32_t size_arg)
/* found exact size of e820 entry */
if (length == size) {
entry->type = E820_TYPE_RESERVED;
e820_mem.total_mem_size -= size;
hv_mem_range.total_mem_size -= size;
ret = start;
break;
}
@ -85,15 +88,15 @@ uint64_t e820_alloc_low_memory(uint32_t size_arg)
* found entry with available memory larger than requested
* allocate memory from the end of this entry at page boundary
*/
new_entry = &e820[e820_entries_count];
new_entry = &hv_e820[hv_e820_entries_nr];
new_entry->type = E820_TYPE_RESERVED;
new_entry->baseaddr = end - size;
new_entry->length = (entry->baseaddr + entry->length) - new_entry->baseaddr;
/* Shrink the existing entry and total available memory */
entry->length -= new_entry->length;
e820_mem.total_mem_size -= new_entry->length;
e820_entries_count++;
hv_mem_range.total_mem_size -= new_entry->length;
hv_e820_entries_nr++;
ret = new_entry->baseaddr;
break;
@ -124,19 +127,19 @@ void init_e820(void)
hpa = (uint64_t)mbi->mi_mmap_addr;
struct multiboot_mmap *mmap = (struct multiboot_mmap *)hpa;
e820_entries_count = mbi->mi_mmap_length / sizeof(struct multiboot_mmap);
if (e820_entries_count > E820_MAX_ENTRIES) {
pr_err("Too many E820 entries %d\n", e820_entries_count);
e820_entries_count = E820_MAX_ENTRIES;
hv_e820_entries_nr = mbi->mi_mmap_length / sizeof(struct multiboot_mmap);
if (hv_e820_entries_nr > E820_MAX_ENTRIES) {
pr_err("Too many E820 entries %d\n", hv_e820_entries_nr);
hv_e820_entries_nr = E820_MAX_ENTRIES;
}
dev_dbg(ACRN_DBG_E820, "mmap length 0x%x addr 0x%x entries %d\n",
mbi->mi_mmap_length, mbi->mi_mmap_addr, e820_entries_count);
mbi->mi_mmap_length, mbi->mi_mmap_addr, hv_e820_entries_nr);
for (i = 0U; i < e820_entries_count; i++) {
e820[i].baseaddr = mmap[i].baseaddr;
e820[i].length = mmap[i].length;
e820[i].type = mmap[i].type;
for (i = 0U; i < hv_e820_entries_nr; i++) {
hv_e820[i].baseaddr = mmap[i].baseaddr;
hv_e820[i].length = mmap[i].length;
hv_e820[i].type = mmap[i].type;
dev_dbg(ACRN_DBG_E820, "mmap table: %d type: 0x%x\n", i, mmap[i].type);
dev_dbg(ACRN_DBG_E820, "Base: 0x%016llx length: 0x%016llx",
@ -144,7 +147,7 @@ void init_e820(void)
}
}
obtain_e820_mem_info();
obtain_mem_range_info();
} else {
panic("no multiboot info found");
}
@ -152,15 +155,15 @@ void init_e820(void)
uint32_t get_e820_entries_count(void)
{
return e820_entries_count;
return hv_e820_entries_nr;
}
const struct e820_entry *get_e820_entry(void)
{
return e820;
return hv_e820;
}
const struct e820_mem_params *get_e820_mem_info(void)
const struct mem_range *get_mem_range_info(void)
{
return &e820_mem;
return &hv_mem_range;
}

View File

@ -287,7 +287,7 @@ static void create_sos_vm_e820(struct acrn_vm *vm)
uint64_t hv_start_pa = hva2hpa((void *)(get_hv_image_base()));
uint64_t hv_end_pa = hv_start_pa + CONFIG_HV_RAM_SIZE;
uint32_t entries_count = get_e820_entries_count();
const struct e820_mem_params *p_e820_mem_info = get_e820_mem_info();
const struct mem_range *p_mem_range_info = get_mem_range_info();
struct acrn_vm_config *sos_vm_config = get_vm_config(vm->vm_id);
(void)memcpy_s((void *)sos_ve820, entries_count * sizeof(struct e820_entry),
@ -297,7 +297,7 @@ static void create_sos_vm_e820(struct acrn_vm *vm)
vm->e820_entries = sos_ve820;
/* filter out hv memory from e820 table */
filter_mem_from_sos_e820(vm, hv_start_pa, hv_end_pa);
sos_vm_config->memory.size = p_e820_mem_info->total_mem_size - CONFIG_HV_RAM_SIZE;
sos_vm_config->memory.size = p_mem_range_info->total_mem_size - CONFIG_HV_RAM_SIZE;
/* filter out prelaunched vm memory from e820 table */
for (vm_id = 0U; vm_id < CONFIG_MAX_VM_NUM; vm_id++) {
@ -332,18 +332,18 @@ static void prepare_sos_vm_memmap(struct acrn_vm *vm)
const struct e820_entry *entry;
uint32_t entries_count = vm->e820_entry_num;
const struct e820_entry *p_e820 = vm->e820_entries;
const struct e820_mem_params *p_e820_mem_info = get_e820_mem_info();
const struct mem_range *p_mem_range_info = get_mem_range_info();
pr_dbg("sos_vm: bottom memory - 0x%llx, top memory - 0x%llx\n",
p_e820_mem_info->mem_bottom, p_e820_mem_info->mem_top);
p_mem_range_info->mem_bottom, p_mem_range_info->mem_top);
if (p_e820_mem_info->mem_top > EPT_ADDRESS_SPACE(CONFIG_SOS_RAM_SIZE)) {
if (p_mem_range_info->mem_top > EPT_ADDRESS_SPACE(CONFIG_SOS_RAM_SIZE)) {
panic("Please configure SOS_VM_ADDRESS_SPACE correctly!\n");
}
/* create real ept map for all ranges with UC */
ept_add_mr(vm, pml4_page, p_e820_mem_info->mem_bottom, p_e820_mem_info->mem_bottom,
(p_e820_mem_info->mem_top - p_e820_mem_info->mem_bottom), attr_uc);
ept_add_mr(vm, pml4_page, p_mem_range_info->mem_bottom, p_mem_range_info->mem_bottom,
(p_mem_range_info->mem_top - p_mem_range_info->mem_bottom), attr_uc);
/* update ram entries to WB attr */
for (i = 0U; i < entries_count; i++) {

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@ -220,12 +220,12 @@ void init_paging(void)
const struct e820_entry *entry;
uint32_t entries_count = get_e820_entries_count();
const struct e820_entry *p_e820 = get_e820_entry();
const struct e820_mem_params *p_e820_mem_info = get_e820_mem_info();
const struct mem_range *p_mem_range_info = get_mem_range_info();
pr_dbg("HV MMU Initialization");
/* align to 2MB */
high64_max_ram = round_pde_up(p_e820_mem_info->mem_top);
high64_max_ram = round_pde_up(p_mem_range_info->mem_top);
if ((high64_max_ram > (CONFIG_PLATFORM_RAM_SIZE + PLATFORM_LO_MMIO_SIZE)) ||
(high64_max_ram < (1UL << 32U))) {
printf("ERROR!!! high64_max_ram: 0x%llx, top address space: 0x%llx\n",

View File

@ -28,7 +28,7 @@ struct e820_entry {
uint32_t type;
} __packed;
struct e820_mem_params {
struct mem_range {
uint64_t mem_bottom;
uint64_t mem_top;
uint64_t total_mem_size;
@ -47,6 +47,6 @@ uint32_t get_e820_entries_count(void);
const struct e820_entry *get_e820_entry(void);
/* get the e820 total memory info */
const struct e820_mem_params *get_e820_mem_info(void);
const struct mem_range *get_mem_range_info(void);
#endif