Different handling of TIMER3 for cAVS platforms.
Now we are operating on irq masks on core level,
not on the timer level. It gives us opportunity
to implement multicore work queue.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Removes clock microseconds handling for scheduling
and work queue. In case of some clocks it is causing
too much of a drift in cycles. We still pass every
delay in microseconds, but handle it as milliseconds.
Microseconds are needed to get delays less then 1 ms.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Adds possibility for interrupt handler to decide,
whether it wants to manually handle unmasking irq
or have it done automatically.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
It is caused by the change of removing dai waiting after stop.
dma should not be stopped in dai_comp_trigger if HW LLI is not
enable. At this time DMA is still working and it can't be stopped
DMA engine would stop the channel automatically after each transfer.
So just query channel status to stop dma on BYT
Signed-off-by: Pan Xiuli <xiuli.pan@linux.intel.com>
Signed-off-by: Rander Wang <rander.wang@linux.intel.com>
We need to writeback clock data, because it's used
in work queue. Also we need to writeback bss in order
to share static pointers with slave cores.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Removed dma/dsp race condition that happened within preload phase.
Min buffer size set to entire buffer to avoid dma and dsp
pointers misalignmen in case the period size is not multiple
of the hda dma burst size.
Signed-off-by: Marcin Maka <marcin.maka@linux.intel.com>
Removes wait on stop, as it's not needed.
Also this change fixes problems with sending IPC as
wait function lowers interrupt level, while IPCs are
now executed on irq task level.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
This patch implements delay before SSP stop
to make sure, that for transmitting the FIFO is empty
and for receiving the FIFO provides the real status.
Also it clears transmit underrun.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Added icelake platform to platforms.
Updated rimage to support icelake.
Updated autoconf and automake files.
Signed-off-by: Janusz Jankowski <janusz.jankowski@linux.intel.com>
Split files into appropriate folders.
Added makefiles to not break build.
Fixed checkpatch errors in dw-dma and baytrail/ssp.
Signed-off-by: Janusz Jankowski <janusz.jankowski@linux.intel.com>
This patch adds the missing handling of null pointers for the case
if memory allocation would fail.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
Apl wallclk freq is 19.2 which gives about 10.5% inaccuracy
when timeouts are computed in usec. This temporary w/a
uses ticks/msec to compute msec timeouts.
Signed-off-by: Marcin Maka <marcin.maka@linux.intel.com>
There are no buffer completion int's, so work queue timers are
used by hda-dma in cyclic mode.
Buffer segment completion programming removed.
W/A to observed work queue timer inaccuracy applied.
Signed-off-by: Marcin Maka <marcin.maka@linux.intel.com>
In order to get one bclk delay between frame sync and
data I only set FSRT flag in sspsp register. There is
no need to set SSPSP_STRDLY bits.
Signed-off-by: Bartosz Kokoszko <bartoszx.kokoszko@linux.intel.com>
Changes flow of dw-dma interrupt registration and unregistration:
Now it is possible for slave cores to register for dw-dma handler.
Also registration happens before start and not on FW load
during probing. This way we are not wasting runtime heap memory
and also it will allow us to dynamically change execution core
for certain pipelines.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
I've added tdm support in ssp. Tdm mode has
padding at the end of each slot. Tdm mode is
enabled by tdm_per_slot_padding flag in
sof_ipc_dai_ssp_params struct.
Signed-off-by: Bartosz Kokoszko <bartoszx.kokoszko@linux.intel.com>
The only difference between DSP_A and DSP_B modes
is FSRT bit in sspsp register and start delay
set to 1 in DSP_A mode.
Signed-off-by: Bartosz Kokoszko <bartoszx.kokoszko@linux.intel.com>
APL/CNL:
If DSP Gateway Minimum Buffer Size (DGMBS) is not aligned to 32 bytes they occur
glitches in output signal (the buffer will be overwritten during work). It can
be observed during playback in following configuration:
- 8Khz 16bits 1 channel
- 24kHz 16bits 1 channel
Signed-off-by: Kamil Kulesza <kamil.kulesza@linux.intel.com>
Stops DMA unconditionally on xrun without waiting.
Data flush is not needed as pipeline will go through
prepare and restart anyway. Waiting here during xrun
recovery with multiple tasks running causes interrupt
stack overflow. Waiti instruction lowers irq level to
0, which allows to run multiple scheduled tasks in the
same time on the same irq level and ends in DSP panic.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
When we use different clock sources for different SSPs, we need to
make sure the mdivc register is not overwritten by IPC
configuration. Move to read-modify-write mode (assuming a zero-value
on reset)
Tested on GeminiLake with SSP2 derived from 19.2MHz XTAL and SSP1
derived from 24.576 MHz PLL.
Note that the topology needs to ensure compatibility between the
different settings, in the future we'll need a true clock driver which
will check for incompatibilities.
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
This patch fixes the mistake in uapi/ipc.h text comments that falsely
claims that 24 bit data is supported. The supported PCM formats are
16 and 32 bits only. A check is added to DMIC set config function
to return error if anything else is requested.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
Changes settings of GPDMA linked lists transfers
to use done bit to let the DMA know, that the next
data block is ready to be sent/received. This way
we are sure, that there will be no additional data
transferred between receiving interrupt and disabling
GPDMA channel.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
dai_get function only need type and index, make index filed unified to
dai_index to avoid misleading in sof_ipc_dai_config and sof_ipc_dai_config.
Signed-off-by: Pan Xiuli <xiuli.pan@linux.intel.com>
On starting GPDMA we should use current link list item.
That way every start will continue from the right buffer,
not causing data corruption due to writing to the same
period as Host DMA.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Host DMA should wait for buffer full after starting render
to avoid empty samples at the beginning. Temporary solution
until DMA unified flow will be implemented.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Moves inclusion of PLATFORM_INCDIR before SOF_INCDIR.
This temporarily fixes wrong inclusion of core-isa.h from
xtensa-root directory during build with gcc. It's the best
solution for now, because that unwanted header comes from
Xtensa Newlib C library, which will take much more time to change.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
This patch enables the 1, 2, and 4ch topologies usage with S32_LE and
S16_LE sample formats. The DMA burst length is also changed to maximum
(8) to fully utilize the DMIC FIFO.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
This patch adds initial empty implementation of runtime power management.
It is based on linux kernel implementation and will be developed
in the future.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
The loud DC thump sound plus the impulse like noises in the beginning of
capture can be mitigated with the gain ramp and muted filters start.
The gain ramp rate and CIC and FIR unmute delays parameters can be
adjusted from dmic.h header file.
Note: The logarithmic ramp length is now hardwired to 300 us for the 1 ms
update rate via macro LOGRAMP_GM in dmic.c. A larger value will shorten the
ramp. It will be replaced later by topology passed ramp characteristic.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
Depending on HW configuration for two PDM controllers or less the
IPM bit field value calculation need to be done like for HW version 1.
The new style IPM bit field value calculation is used for three or four
PDM controllers.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
This aligns the HW versions 1 and 2 code and avoids a build error about
unused variables.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
The IPM bit field should be set to the number of used stereo controllers.
This patch fixes the issue that pdm[0] got counted twice.
Signed-off-by: Sathish K. Kuttan <sathish.k.kuttan@intel.com>
Comment out SDO tristating which gets in the way of test tools and
clarify comment for ETDS.
I2S and DSP modes seem to generate correct waveforms. Tested with one
Up2 board in master mode and one MinnowBoard Turbot in slave, with the
SDO/SDI lines samples with Logic Pro.
Only CBM_CFM mode was tested.
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Now that these modes work, fix the polarity to align with
ALSA/ASoC expectations
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
For some reason SSCR3 fixes prevent DSP_A and DSP_B from working:
DMAs don't start and an IPC error is eventually thrown.
Fall back to reset value (recommended in data sheet), this fix
lets DMA go on in DSP_a and DSP_B modes.
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
The existing code does not provide support for the full flexibility of
the hardaware: MCLK and BCLK can be independentely divided from Xtal
or Audio cardinal clock. Add the ability to support different sources
and dividers.
The M/N dividers remain bypassed since they introduce an irregular
duty-cycle for the BCLK, which isn't desirable if the BCLK is used as
a reference by an external device. With this patch MCLK can be
divided by at most a factor of 8 which is reasonable for all
(additional factors are possible but haven't been tested)
The MCLK1 output was tested on a GeminiLake hardware, confirming that
the register configuration set according to the spec do result in an
observable clock.
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
clk_id was never used so remove all the related code.
However since we need an identifier for the mclk
reclaim it with a name change.
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
This patch adds the num_channels_busy member to the dma structure
which will be helpful in determining DMAC to be allocated
to users based on the number of channels draining. This is help
provide a primitive level of QoS and prevent DMAC overuse.
Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
This patch updates the platform DMAC definitions to include information
about the supported dev types, copy directions and capabilities.
It also replaces the copy_dir enum with a bitmask and adds
the copy capabilities and dev type bitmasks.
Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
merge commit 72e63a467f ("apl-ssp: change and wrap status
transition into ssp_stop")
Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
Signed-off-by: Rander Wang <rander.wang@linux.intel.com>
merge commit 36f23c6cc3 ("apl-ssp: fix padding bit issues in
I2S/LEFT_J mode") and refine it on Broadwell.
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Rander Wang <rander.wang@linux.intel.com>
This patch makes the following changes to configure DMIC from ipc params:
1. remove redundant hdr member item from struct sof_ipc_dai_dmic_params
2. Rename number_of_pdm_controllers member in the above structure
to num_pdm_active to be more representative of the active pdm count.
3. Add an "id" member to struct sof_ipc_dai_dmic_pdm_ctrl
4. Remove hardcoded config params from DMIC set_config function
and use ipc params instead.
Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
This patch adds the trace information to BYT and APL platforms type
SSP drivers. The traced value helps to determine the configured serial
bus format.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
This patch ensures that modes matching request returns immediately if
the results length would exceed the allocated length. The caller function
will issue an error in such case.
Also the possibility of using array pdm[] in the IPM helper function
as uninitialized is avoided by initializing it with zeros.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
Interrupt clear will clear all interrupt bit. If two channel is enabled
and when pause/resume one of stream, the two interrupts may happen at
same time and one of them will be wrongly cleared.
Signed-off-by: Pan Xiuli <xiuli.pan@linux.intel.com>
Actually I did not have full confidence about this patch.
if someone can help do more test, that would be better.
before this, do not accept this patch.
Incorrect TFT/RFT will cause DMA IRQ happened too frequently.
the interval will be less than 1ms, which will cause XRUN easily.
The old code will has this issue in TDM4-s32le test.
Signed-off-by: Wu Zhigang <zhigang.wu@linux.intel.com>
Acked-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
This patch adds the DMIC audio capture driver for SOF DAI component use.
The DMIC feature allows to directly attach one to (typically) four PDM
digital microphones into Intel SoC without a separate codec IC. This is
supported by APL and most successor platforms.
Corresponding patches are needed for kernel driver and topology to enable
this feature.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
These code is for CNL for it is not supported that two HW IPs share
one irq pin. Now it is resolved in new algorithm, so delete it.
Signed-off-by: Rander Wang <rander.wang@linux.intel.com>
This fix the regression(line missed when copying) introduced by
commit 0d6e17ed99ea 'byt-ssp: change and wrap status transition
into ssp_stop'.
Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
Tested-by: Zhang Keqiao <keqiao.zhang@linux.intel.com>
This will remove manual status change, wrap them into ssp_stop(),
where the status transition is protect by spin_lock.
Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
This will remove manual status change, wrap them into ssp_stop(),
where the status transition is protect by spin_lock.
Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
Missed those definitions in previous patch, fix.
Suggested-by: Keyon Jie <yang.jie@linux.intel.com>
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Don't hard-code MCLK source on ApolloLake, use settings provided over
IPC to select 24.576 MHz PLL or 19.2 MHz XTAL oscillator.
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
The current code doesn't work for I2S/LEFT_J when the slot width and
number of valid bits don't match (e.g. 24 bit data in 32-bit slot).
In I2S/LEFT_J mode, the padding is not at the end of the frame but
at the end of each slot, and is evenly distributed between the two
left and right phases.
Fix by using DMYSTOP for I2S/LEFT_J, and only program SSPSP2 for DSP_A
and DSP_B modes
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
This field doesn't mean anything for DMIC or HDaudio, move it
where it makes sense (I2S/TDM modes)
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
sample_valid_bits remains in main structure for now since it is
handled with a generic dai token.
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Making this dynamic doesn't really save much memory and makes the
code more complex for no good reason
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Rename fields to follow topology definitions
Add placeholder for new fields for quirks and associated pdata
No functionality change
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Let's remove reef to avoid confusion/legacy.
no functionality change but the name of generated files
will change so targets and install scripts will need
to be updated
There should be only one occurrence of "Reef" left in
rimage/file_format.h, left as is for backwards compatibility.
This may be changed separately at a later point.
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Resume pause will re-start DMA, which will cause the DMA status diff
from buffer COMP. Add a release function to recover the status mainily
for LLI now.
This patch fixes pause/resume noise issues.
Tested-by: Keyon Jie <yang.jie@linux.intel.com>
Signed-off-by: Pan Xiuli <xiuli.pan@linux.intel.com>
Add a new component API for performing atomic stream state change
operations. This leave the cmd API for non atomic usage.
This patch also does some renaming to use _trigger() instead of _cmd().
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Tested-By: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
This patch adds a new trace feature to send any error states/values
after the trace messages to mbox and modifes users of trace_value()
to use trace_error_value().
Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
This patch reverts hardcoding TFT and RFT values to 8.
They are now properly calculated below.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
We change ssp settings in order to properly transmit and receive data:
1. Use frame end padding instead of dummy stop bits.
This way alignment bits will be transmitted at the end of whole frame instead of every slot.
2. Disable receive without transmit mode.
3. Do not change the source for MCLK.
4. DSP_A format shouldn't have start delay.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
At the end of the DMA, we need to set the channel status into
parapre, otherwise next dma start will fail.
This will fix CNL pause resume issues.
Signed-off-by: Pan Xiuli <xiuli.pan@linux.intel.com>
DMA trace itself uses DMA copying which will cause some DMA copying
related traces are called recursively.
So use tracev to avoid this.
Signed-off-by: Yan Wang <yan.wang@linux.intel.com>
Previously TFT and RFT are set to 0s which means we are using
threshold level 1, where interrupt asserts for every valid bits
of each slot(e.g. for s16_le capture, interrupts assert for
each 16 bits), but DMAC will treat it as notification of one
full sample(e.g. 32 bits for s16_le stereo) and read those all
bits, this will lead to capture with double speed at format
s16_le stereo.
Here add handle for FIFO trigger Threshold level, set them to
bytes for each full sample(active_slots * valid_bits / 8), and
the issue is fixed.
Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
At the end of the DMA, we need to set the channel status into
parapre, otherwise next dma start will fail.
This will fix APL pause resume issues.
Signed-off-by: Pan Xiuli <xiuli.pan@linux.intel.com>
--
Test with:
Mininow max rt5651 and GP-MRB nocodec
SOF master: 728f1ff3e3
SOF-Tool master: 5b5bbe31e6https://github.com/plbossart/sound/tree/topic/sof-v4.14:
fe5e29155127a717ba5ae454b4bdde99afa67723
Clean up SSPSP bits to make SSP output follow ALSA ASoC definition
of all I2S/DSP_A/DSP_B/LEFT_J modes.
Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
detected with sonarcloud: fix pointer test and avoid
redundant evaluation of lli as always true.
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
The src_width and dest_width are configured already in Bytes,
here fix it, otherwise 24/32 bit copying with hda-dma may have
problem.
Reported-by: Zhigang Wu <zhigang.wu@linux.intel.com>
Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
The directions configured in sg_elem are actually dma transfer type,
not playback/capture direction, here correct them.
Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
DW-DMA is more optimal using 32bit data size when transferring between
memories. Set configuration to always use 32 bit mode for non peripheral
copies from memory to memory.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
All GPDMA share the same irq on cannonlake, this is different with
appololake.The change is:probe GPDMA array when initilized, set the
array to the irq function; check the interrupt status of GPDMA array
in irq function, process the correct GPDMA that produces interrupt.
Signed-off-by: Rander Wang <rander.wang@intel.com>
Add a host and link DMA driver for Intel HDA DMA gateway.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
Fix the dma not stop issue for using Hardware Link List mode.
Only enable it for APL/CNL at the moment.
Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
Let clients know if they can expect a callback from DMA.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
Allow clients to request a particular DMA channel if supported by the DMA
driver and it's available. If requested channel is not supported by DMAC
then return another channel. If requested channel is not free then we
return an error.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
For hardware link list mode, we also need to configure address
and config registers for the first link list, here fix it.
Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
On Apollolake, the interrupt number for different channels of
the same controller are different, here add implementation of
it: register interrupt handler for each channel, and don't
need check channel in its specific handler anymore.
Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
Apollolake and Cannonlake have some register differences in DW-DMA HW.
Add macros to support those differences.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Haswell and Broadwell have some differences with some DMA registers.
Add macros for these bits.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
For memory to memory copy(burst_elems initialized to be 0),
we set msize to default value 3, that is 2 ^ 3 = 8 items for
each burst transaction.
For DMA copying which related to peripheral device(source or
destination), we will use the configured burst_elems, which
usually means the number of data items, e.g. slot number for
SSP dai fifos.
Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
The DMA linked list descriptors must be written back from cache so that
the DMA engine can read them.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Clean-up register configurations for SSCR0..5, SSPSP, SFIFOTT
The results are ok in I2S and LEFT_J 24 bits
Tested with RT5645 and DA7212
TODO:
1. fix 16 bit issue (right channel lost)
2. test DSP modes
3. connect SSP and DMA watermarks
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Cosmetic change, for some reason the register definition was not
sequential as in the data sheet
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Make sure all macro parameters are protected with parentheses to avoid
unintended expansion issues
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
The dma_sg_elem might be used uninitialized if the callback
function forget to do that.
Here adding initialization to fix that.
Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
SSP 0,1,2 on CHT share the same physical IRQ as SSP 3,4,5 respectively.
Fix this so that all SSPs IRQs are supported.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Tomasz Lauda