Commit Graph

309 Commits

Author SHA1 Message Date
Maurice Ma f68a5dce1b Add FSP HOB print function
This patch will display FSP HOBs. It will help the debug when FSP
produce incomplete HOBs.

Signed-off-by: Maurice Ma <maurice.ma@intel.com>
2021-02-02 19:48:39 -08:00
jinjhuli 87cdd8ebb2 [EHL] Update FSP header and Fix build error
1. Update Beta4 FSP header.
2. Temporary fix build error while pending FSP,
vbt and ucode to be upstream.
3. Fix Fadt syntax error.

Signed-off-by: jinjhuli <jin.jhu.lim@intel.com>
2021-02-01 19:26:20 -07:00
Talamudupula e6d73eb55b [TGL] Use common GpioLib
Point TGL project to use common GpioLib and fix build errors.
GpioPlatformLib instance for TGL platform is also provided
as a reference for other platforms. Also remove TGL specific
Gpio Library related files.

Usage:

    To configure Gpio pins provided by GPIO CFG DATA:
        ConfigureGpio(Gpio_Cfg_Data_Tag, 0, NULL);

    To configure Gpio pins provided by GPIO_INIT_CONFIG array:
        ConfigureGpio(0, Num_entries, Ptr_to_Array);

Signed-off-by: Talamudupula <stalamudupula@gmail.com>
2021-02-01 19:24:26 -07:00
leanshen cf6663c996 Add silicon common IgdOpRegion library
This adds a common IgdOpRegion library for the same APIs on TGL
and EHL platforms. Plan to include older platforms support in the v2
patch.

Signed-off-by: Lean Sheng <lean.sheng.tan@intel.com>
2021-01-28 08:56:27 -08:00
Ong Kok Tong d988a8cc81 [EHL] ECLITE support
Enable ECLITE support in SBL EHL

Signed-off-by: Ong Kok Tong <kok.tong.ong@intel.com>
2021-01-27 08:01:37 -07:00
Praveen Hp b982bb3df8 [CFL] Fix audio record issue
This patches fixes the audio record issue using onboard 3mm jack.

TEST= booted to windows on both CFL-S & CFL-H board and verified
      Audio playback and record is working using onboard 3mm jack.

Signed-off-by: Praveen Hp <praveen.hodagatta.pranesh@intel.com>
2021-01-27 07:57:41 -07:00
Praveen Hp 89bb7b2b5b [CFL] Add TPM2 ACPI table
similar to CML, CFL also uses both IOB2 & IOB3 ports to pass the info
and generate an SMI. where as common code ACPI implementation uses
only IOB2, hence TPM2 ACPI tables are ported from CML platforms.
This patch fixes physical presence query and TPM clear issue on windows.

TEST: boot to windows on CFL-H platform and verified TPM physical
      presence and TPM clear command is successfull.

Signed-off-by: Praveen Hp <praveen.hodagatta.pranesh@intel.com>
2021-01-27 07:56:22 -07:00
leanshen a9b4a48ed3 [EHL] Update Fadt from v5 to v6.1
Update EHL ACPI FADT (FACP) from acpi v5.0 to v6.1.

Signed-off-by: LeanSheng <lean.sheng.tan@intel.com>
2021-01-26 21:43:58 -07:00
Guo Dong c1025b99fd [TGL] Enlarge Payload region Size
Since image form Linux build is a little bigger,
so enlarge the payload region size to fix linux build.

Signed-off-by: Guo Dong <guo.dong@intel.com>
2021-01-26 21:19:38 -07:00
jinjhuli db12787c8c [EHL] Fix Jenkins build and stitch error
1. Fix jenkins build causes by some binaries
2. Fix Stitchifwi script

Signed-off-by: jinjhuli <jin.jhu.lim@intel.com>
2021-01-26 21:17:43 -07:00
jinjhuli b8cc3a43ae [EHL] Fix S4 issue in Windows
Fixes an issue where S4 is not working in
Windows when a PCIE card is attached.

Signed-off-by: jinjhuli <jin.jhu.lim@intel.com>
2021-01-26 21:15:19 -07:00
jinjhuli 1faaabcd54
[EHL] Set SPI flash EISS and LE (#983)
Set SPI flash EISS and LE in EHL.

Signed-off-by: jinjhuli <jin.jhu.lim@intel.com>
2021-01-25 17:23:04 -08:00
Guo Dong 1ca2058a95 [TGL] Add TCC GPIO support
Add SBL configuration data for TCC GPIO.
Update TCC GPIO UPD and ACPI NVS data based
on SBL configuration data.

Signed-off-by: Guo Dong <guo.dong@intel.com>
2021-01-25 09:29:30 -07:00
Guo Dong 5782673871 [TGL] Fix linux stitch using StitchIfwi.py
This patch will fix the linux stitch error
using StitchIfwi.py

Signed-off-by: Guo Dong <guo.dong@intel.com>
2021-01-24 21:26:40 -07:00
jinjhuli 09f7f879d8 [EHL] Fix EHL Build issue
Fix build issue that cause by missing
HASH_USAGE and ACPI register

Signed-off-by: jinjhuli <jin.jhu.lim@intel.com>
2021-01-23 07:42:06 -08:00
Maurice Ma b520f9561c Enable Azure Pipeline build for TGL
This patch enabled auto build for TGL Azure Pipelines.
Only Windows build is enabled. GCC build has IASL issue.

Signed-off-by: Maurice Ma <maurice.ma@intel.com>
2021-01-22 10:01:37 -08:00
James Gutbub a018d21694 [TGL] Add TCC mode DLT files
To ease the process of configuring CFG settings to
enable TCC mode, 2 additional DLT files have been
added for TGL-U DDR4 & LPDDR4 boards that can be
copied over the default files (or updated in the
BoardConfig.py) to set TCC mode settings. There
are 2 expectations currently (subject to change
later on):

1. UEFI PLD will be used
2. NVMe media is used for capsule update location

Also, remove TGL-H DLT file since it is not used
currently and update BoardConfig.py accordingly.

Signed-off-by: James Gutbub <james.gutbub@intel.com>
2021-01-21 18:02:12 -07:00
Aiden Park ba39f788cf [BoardConfig] Support Inherited BoardConfig
This will allow inherited BoardConfig from the existing one
in the same BoardPkg. It will be useful when a new BoardConfig
has very minimum difference from the existing one.

See Platform/QemuBoardPkg/BoardConfigOverride.py as a reference.

Signed-off-by: Aiden Park <aiden.park@intel.com>
2021-01-21 08:27:42 -07:00
jinjhuli 0d91f28053 [EHL] Initial platform package baseline for EHL platform support
Build command
python BuildLoader.py build ehl

Stitch command
python Platform/ElkhartlakeBoardPkg/Script/StitchLoader.py
-i <EXISTING_IFWI_IMAGE>
-o <SBL_IFWI_IMAGE>
-s Outputs/ehl/SlimBootloader.bin

Signed-off-by: jinjhuli <jin.jhu.lim@intel.com>
2021-01-19 22:04:24 -08:00
Guo Dong 78cce60ce8 Enhance PreOS support
SBL support to load PreOS and normal OS in a single boot option.
This patch tries to standardize the PreOS support.
The PreOS could be TrustyOS, PreOsChecker or others.
As long as PreOS flag is set in boot option, SBL will load and
boot PreOS before normal OS. If the preOS has specific requirement,
it could be addressed using PreOS image type.

Signed-off-by: Guo Dong <guo.dong@intel.com>
2021-01-15 21:29:43 -07:00
Jim Pelner b233392924 Corrected invalid octal constant declarations TGL ASL
Corrected declaration of _PSD methods (ApPsd.asl) and _TPC, _PTC,
_TSS and _TSD methods (ApTst.asl) under index 10. Indexes 8 and 9
were declared 08 and 09, respectively, which represent invalid
"octal" constants. These were not flagged as errors in the currently
supported ASL compiler, but these the ACPI specification clearly
indicates these were invalid, and they would actually flag an error
when the recommended ASL compiler is updated to a newer version.

Signed-off-by: Jim Pelner <jim.pelner@intel.com>
2021-01-15 14:10:01 -07:00
Subash Lakkimsetti 1f0b99cf3b Update get_openssl_path to return absoulte path
Tools as MEU used for signing and generating key manifests
expects to pass abosulte openssl paths. Updating
get_openssl_path to return paths for linux cases.

Signed-off-by: Subash Lakkimsetti <subash.lakkimsetti@intel.com>
2021-01-15 13:24:07 -07:00
Praveen Hp b111c8f75e [CFL]Fix payload selection GPIO issue
WHL CRB board is configured to boot different payload based on GPIO pin
status, which is not working currenly.
this patch ensures to boot to Osloader payload when PayloadSelGpioData=1
otherwise boot to UEFI payload.

TEST= Boot test on WHL CRB and verified board able to switch between
OSloader & UEFI payload based on DIP switch R4H1B_4 status.

Signed-off-by: Praveen Hp <praveen.hodagatta.pranesh@intel.com>
2021-01-12 14:41:06 -08:00
Sachin Agrawal e3cedba233 Handle TPMStartup error during S3 resume
As per TCG spec, if a Tpm2Startup(TPM_SU_STATE) fails during
S3 resume, a host reset should be done.

When BootGuard is enabled, ACM will notify of this failure via Bit46 in
BootGuardBootStatus register.


Signed-off-by: Sachin Agrawal <sachin.agrawal@intel.com>
2021-01-11 12:43:11 -08:00
Guo Dong 12067aac3f [TGL] Add missing binary files
Added missing SPD config files.
And removed TsnMacAddr.bin requirement from build.

Signed-off-by: Guo Dong <guo.dong@intel.com>
2021-01-11 12:41:33 -08:00
jinjhuli 94aa044b1a [TGL] Initial platform package baseline for TGL platform support
- Build command
  python BuildLoader.py build tgl

- Stitch command
  python Platform/TigerlakeBoardPkg/Script/StitchLoader.py
  -i <EXISTING_IFWI_IMAGE>
  -o <SBL_IFWI_IMAGE>
  -s Outputs/tgl/SlimBootloader.bin

Signed-off-by: jinjhuli <jin.jhu.lim@intel.com>
2021-01-11 08:37:11 -07:00
Maurice Ma a2725951ad Removed deprecated python imp module usage
Python 3.4 and above have deprecated imp module in favor of
importlib.  This patch removed imp module usage from SBL, and
used importlib instead.

Signed-off-by: Maurice Ma <maurice.ma@intel.com>
2021-01-06 11:16:59 -08:00
Praveen bf3f3d2e06
[CFL]: Fix onboard display issue on CFL-S & CFL-H (#922)
As per board design the DDI ports are routed as per below,

CFL-S:
DDI1-->PORTB-->LSPCON-->HDMI
DDI2-->PORTC-->DP
CFL-H:
DDI1-->PORTB-->DP1
DDI2-->PORTC-->DP2
DDI3-->PORTC-->LSPCON-->HDMI

Hence add separate VBT binaries accordingly.

-Set HPD of DDI port F to disable as default since it's not used by
 H/S/U processor line.

TEST: verified onboard display's ports booting to UEFI shell & Yocto.

Signed-off-by: Praveen Hp <praveen.hodagatta.pranesh@intel.com>
2020-12-11 17:40:09 -08:00
Maurice Ma c4de1ca3e0 [CFL] Fix DEBUG FSP build error
Current CFL SBL build with DEBUG FSP will fail due to size issue.
This patch fixed this issue by adjusting size properly when DEBUG
FSP is used.

Signed-off-by: Maurice Ma <maurice.ma@intel.com>
2020-12-07 22:39:03 -08:00
James Gutbub ae99635490
Resolve raw partition boot loading (#899)
The calculation on where to start reading the
remainder of the boot image from is not being
calculated properly, the aligned header size
is given in bytes instead of in terms of block
size. This patch updates the calculation
accordingly.

Also, if SwPart is set as 255 then the LBA given
will be used as an absolute LBA instead of used
relative to the SwPart's starting LBA.

Signed-off-by: James Gutbub <james.gutbub@intel.com>
2020-11-10 22:26:26 -08:00
Raghava Gudla 1914cab2a6 [CFL] Fix BOM ID detection for Upx platform.
This patch addressed an issue while detecting the
BOM ID for Upx platform which is causing the MRC
to fail.

Signed-off-by: Raghava Gudla <raghava.gudla@intel.com>
2020-10-29 20:48:48 -07:00
Sai Talamudupula 7f37f16720 Support YAML and drop DSC for GpioConvert tool
GpioConvert Tool converts Gpio config data between following
sets of formats:

[.h, .csv, .txt] ---> [.yaml, .dlt] and vice-versa

.dsc related conversion is deprecated starting from this commit.

Signed-off-by: Sai Talamudupula <sai.kiran.talamudupula@intel.com>
2020-10-21 12:10:03 -07:00
Maurice Ma 0b63ef7ac6 [APL] Fix compiler intrinsics link error for NOOPT build
This patch fixed link error for APL NOOPT build due to compiler
intrinsics functions. However, due to APL hardware requirements,
it is not feasible to fit NOOPT build into real flash. This
patch will not fix the NOOPT build error caused by code size issue.

For example, the following error might still occur for APL NOOPT
build:
  Invalid the required fv image size 0xe3b0 exceeds the set fv image
  size 0x6000
The APL SOC requires Stage1A to fit into 32KB. Since FSP-T will take
8KB, it only gives 24KB for SBL Stage1A code. NOOPT build will create
about 56KB for Stage1A, and it is impossible to fit into the layout.

Signed-off-by: Maurice Ma <maurice.ma@intel.com>
2020-10-14 10:02:36 -07:00
jinjhuli d1b404fbac Rename cnl file to cml & cmlv
Rename file with "cnl" to "cml" & "cmlv".
Rename include file's name in related file.

Signed-off-by: jinjhuli <jin.jhu.lim@intel.com>
2020-10-13 08:07:29 -07:00
Maurice Ma 9a4407018d [QEMU] Fix NOOPT build failure
This patch fixed NOOPT build failure for QEMU.
It fixed #871.

Signed-off-by: Maurice Ma <maurice.ma@intel.com>
2020-10-12 13:00:44 -07:00
jinjhuli f87c9a7d2c [CMLV] Code clean-up
Removed empty lines, unused defines, comments,
empty files and empty #ifdef with clean-up tool.

Signed-off-by: jinjhuli <jin.jhu.lim@intel.com>
2020-10-09 15:18:44 -07:00
jinjhuli 76728a2e3c [CML] Code clean-up
Removed empty lines, unused defines, comments,
empty files and empty #ifdef with clean-up tool.

Signed-off-by: jinjhuli <jin.jhu.lim@intel.com>
2020-10-09 15:17:23 -07:00
Raghava Gudla 3ec4e03a74 Expand HECI service to add more API's
This patch expanded HECI service to include send, receive and
reset interface functions. This helps in making firmwareupdatelib.c
and PSDlib common across platforms.

Signed-off-by: Raghava Gudla <raghava.gudla@intel.com>
2020-10-08 15:40:00 -07:00
Aiden Park 89a0f3491f Move ME_BIOS_PAYLOAD to silicon specific directory
The structure of ME_BIOS_PAYLOAD varies on silicons. So, it's moved to
silicon directory and common structures are in MeBiosPayloadDataCommon.h.
- MeBiosPayloadDataCommon.h in CommonSocPkg
- MeBiosPayloadData.h in the specific silicon package

Additionally, DEBUG_VERBOSE message level is used for HeciCore.

Signed-off-by: Aiden Park <aiden.park@intel.com>
2020-10-06 13:21:31 -07:00
Aiden Park 40ded551cd [APL] Use the common HeciLib and Apollolake MeChipsetLib
This allows APL target to use the common HECI library.
The APL target uses the common HeciLib from CommonSocPkg,
and overrides MeChipsetLib for Apollake specific APIs.

Signed-off-by: Aiden Park <aiden.park@intel.com>
2020-10-06 13:21:31 -07:00
Aiden Park bbecda8c27 [CFL] Use the common HECI library
This allows CFL target to use the common HECI library as it is.
The CFL target uses both HeciLib and MeChipsetLib from CommonSocPkg,
and the unnecessary files are cleaned-up.

Signed-off-by: Aiden Park <aiden.park@intel.com>
2020-10-06 13:21:31 -07:00
jinjhuli b1f6cd0f55 [CML] Fix travis build fail in linux system
Fix payload size to 0x00028000.

Signed-off-by: jinjhuli <jin.jhu.lim@intel.com>
2020-09-21 07:47:29 -07:00
Raghava Gudla 418e31ad38 [CFL] Added support for mutiple VBT
This patch did the following

1) Added common routines LocateVbtByImageId to look for VBT image using
   ImageId provided by configuration data and GetVbtAddress.
2) GetVbtAddress routine will provide abstaction for all platforms
   irrespective of multiple VBT or single VBT used by the platform.
3) LocateVbtByImageId routine is moved from platform local function to
   common package.
4) VbtImageId configuration option defined in QEMU platform config is
   moved to common configuration in CfgData_Common.yaml
5) ApolloLake VBT ID selection is now done using configuration data.
6) Added latest VBT binary for CFL, WHL is using existing VBT.

Signed-off-by: Raghava Gudla <raghava.gudla@intel.com>
2020-09-18 17:41:12 -07:00
James Gutbub e6935143a4 Clarify SATA and USB HwPart usage
The SATA and USB HwPart usage for BootOption
config data varies from the other block device
types. This patch adds clarification to explain
the meaning of HwPart for these 2 media types
respectively.

Signed-off-by: James Gutbub <james.gutbub@intel.com>
2020-09-18 17:35:59 -07:00
jinjhuli f088f629c8 [CML] Fix travis build fail
1. Fix payload size.
2. Fix microcode clone command.

Signed-off-by: jinjhuli <jin.jhu.lim@intel.com>
2020-09-18 06:42:02 -07:00
jinjhuli 278789bc8c [CML] Initial baseline for CML platform support
- Build command
  python BuildLoader.py build cml

- Stitch command
  python Platform/CometlakeBoardPkg/Script/StitchLoader.py
  -i <EXISTING_IFWI_IMAGE>
  -o <SBL_IFWI_IMAGE>
  -s Outputs/cml/SlimBootloader.bin

Signed-off-by: jinjhuli <jin.jhu.lim@intel.com>
2020-09-15 09:18:02 -07:00
jinjhuli e5673c48a4 [CMLV] Initial baseline for CMLV platform support
- Build command
  python BuildLoader.py build cmlv

- Stitch command
  python Platform/CometlakevBoardPkg/Script/StitchLoader.py
  -i <EXISTING_IFWI_IMAGE>
  -o <SBL_IFWI_IMAGE>
  -s Outputs/cmlv/SlimBootloader.bin

Signed-off-by: jinjhuli <jin.jhu.lim@intel.com>
2020-09-15 09:17:48 -07:00
Maurice Ma 5f5cbaebaa Represent data in required format in ConfigEditor
Current ConfigEditor relies on the original input data format in YAML
to determine how to represent data in GUI. For example, if the data
value is HEX in YAML, then the data will be displayed in HEX format.
This patch switched to use the specified format type to reformat the
value string so that the display is always consistent with the required
format type.

It fixed #844.

Signed-off-by: Maurice Ma <maurice.ma@intel.com>
2020-09-15 07:33:14 -07:00
Praveen Hp 5c781d29b1 [CFL][MR1 rel] Revise up SBL minor verison to 1
update VERINFO_BUILD_DATE to actual build date instead of hardcoded
value.

Signed-off-by: Praveen Hp <praveen.hodagatta.pranesh@intel.com>
2020-09-09 21:42:55 -07:00
Praveen Hp ddffeb3bde [CFL] Use Latest FSP and microcode release
This patch adds following chnages,

- Revise FSP github commit id to use latest FSP 7.0.74.20 and
  also rename FSP.fd to Fsp.fd to fix GCC build error.
- Add latest Microcode Release Tag.

- starting from FSP 7.0.65.50 FSP shares same stack with Bootloader
  to run FSP-M, hence adjust stack using  FSP_M_STACK_TOP variable in
  BoardConfig.py file.

Test: Build and Boot test on CFL,WHL platforms and verified successfull
      boot till yocto OS.

Signed-off-by: Praveen Hp <praveen.hodagatta.pranesh@intel.com>
2020-09-04 10:01:11 -07:00