[TGL] Add TCC GPIO support
Add SBL configuration data for TCC GPIO. Update TCC GPIO UPD and ACPI NVS data based on SBL configuration data. Signed-off-by: Guo Dong <guo.dong@intel.com>
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5782673871
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@ -31,6 +31,9 @@ MEMORY_CFG_DATA.DmaControlGuarantee | 1
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CAPSULE_INFO_CFG_DATA.DevType | 6
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FEATURES_CFG_DATA.Features.Tcc | 1
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SILICON_CFG_DATA.EnableTimedGpio0 | 1
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SILICON_CFG_DATA.EnableTimedGpio1 | 1
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#
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# To enable payload selection the below options need to uncommented.
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# This GPIO maps to pins 3/4 on 4-pin jumper J9J5 which is closest
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@ -25,6 +25,9 @@ GEN_CFG_DATA.PayloadId | 'UEFI'
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CAPSULE_INFO_CFG_DATA.DevType | 6
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FEATURES_CFG_DATA.Features.Tcc | 1
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SILICON_CFG_DATA.EnableTimedGpio0 | 1
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SILICON_CFG_DATA.EnableTimedGpio1 | 1
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#
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# To enable payload selection the below options need to uncommented.
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# This GPIO maps to pins 3/4 on 4-pin jumper J9J5 which is closest
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@ -220,6 +220,30 @@
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Enable/disable Multiple Virtual Channel for PCIE Root Ports. 0- disable, 1- enable. One bit for each port, bit0 for port1, bit1 for port2, and so on.
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length : 0x04
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value : { 0x01, 0x01, 0x01, 0x01 }
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- XdciEnable :
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name : xDCI controller
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type : Combo
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option : $EN_DIS
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help : >
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Enable/disable to xDCI controller. 0- Disable; 1- Enable.
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length : 0x01
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value : 0x1
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- EnableTimedGpio0 :
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name : Timed GPIO 0
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type : Combo
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option : $EN_DIS
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help : >
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Enable/disable Timed GPIO0 0- Disable; 1- Enable.
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length : 0x01
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value : 0x0
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- EnableTimedGpio1 :
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name : Timed GPIO 1
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type : Combo
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option : $EN_DIS
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help : >
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Enable/disable Timed GPIO1 0- Disable; 1- Enable.
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length : 0x01
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value : 0x0
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- ConfigTdpLevel :
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name : Configuration for boot TDP selection
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type : EditNum, HEX, (0x00, 0xFF)
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@ -228,6 +252,6 @@
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length : 0x01
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value : 0x02
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- Dummy :
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length : 0x0
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length : 0x1
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value : 0x0
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@ -1653,7 +1653,6 @@ UpdateFspConfig (
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FspsConfig->PortUsb30Enable[1] = 0x1;
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FspsConfig->PortUsb30Enable[2] = 0x1;
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FspsConfig->PortUsb30Enable[3] = 0x1;
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FspsConfig->XdciEnable = 0x1;
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if (IsPchH ()) {
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FspsConfig->PortUsb20Enable[1] = 0x1;
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@ -1724,6 +1723,9 @@ UpdateFspConfig (
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if (SiCfgData != NULL) {
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FspsConfig->ConfigTdpLevel = SiCfgData->ConfigTdpLevel;
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FspsConfig->EnableTimedGpio0 = SiCfgData->EnableTimedGpio0;
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FspsConfig->EnableTimedGpio1 = SiCfgData->EnableTimedGpio1;
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FspsConfig->XdciEnable = SiCfgData->XdciEnable;
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}
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Status = TccModePostMemConfig (FspsUpd);
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@ -2653,6 +2655,9 @@ PlatformUpdateAcpiGnvs (
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PchNvs->SWMC = GetPchHdaMaxSndwLinkNum();
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Length = GetPchMaxPciePortNum ();
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PchNvs->EnableTimedGpio0 = FspsConfig->EnableTimedGpio0;
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PchNvs->EnableTimedGpio1 = FspsConfig->EnableTimedGpio1;
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PchMaxPciePortNum = GetPchMaxPciePortNum ();
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for (Index = 0; Index < PchMaxPciePortNum; Index++) {
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PchNvs->LtrEnable[Index] = FspsConfig->PcieRpLtrEnable[Index];
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