[EHL] Set SPI flash EISS and LE (#983)
Set SPI flash EISS and LE in EHL. Signed-off-by: jinjhuli <jin.jhu.lim@intel.com>
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@ -75,6 +75,7 @@
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#include <TccConfigSubRegion.h>
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#include <Library/MeExtMeasurementLib.h>
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#include <Library/GpioLib.h>
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#include <Register/RegsSpi.h>
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UINT8 mTccRtd3Support;
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@ -459,7 +460,22 @@ BuildOsConfigDataHob (
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return EFI_SUCCESS;
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}
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/**
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Set SPI flash EISS and LE
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**/
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VOID
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ProgramSecuritySetting (
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VOID
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)
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{
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UINTN SpiBaseAddress;
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SpiBaseAddress = GetDeviceAddr (OsBootDeviceSpi, 0);
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SpiBaseAddress = TO_MM_PCI_ADDRESS (SpiBaseAddress);
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// Set the BIOS Lock Enable and EISS bits
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MmioOr8 (SpiBaseAddress + R_SPI_BCR, (UINT8) (B_SPI_BCR_BLE | B_SPI_BCR_EISS));
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}
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/**
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Add a Smbios type string into a buffer
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@ -789,6 +805,14 @@ BoardInit (
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AppendS3Info ((VOID *)&mS3SaveReg);
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}
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}
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if ((GetBootMode() != BOOT_ON_FLASH_UPDATE) && (GetPayloadId() != 0)) {
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ProgramSecuritySetting ();
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}
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break;
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case ReadyToBoot:
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if ((GetBootMode() != BOOT_ON_FLASH_UPDATE) && (GetPayloadId() == 0)) {
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ProgramSecuritySetting ();
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}
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break;
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case EndOfFirmware:
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break;
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@ -42,7 +42,6 @@
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#define R_SPI_CFG_BAR0 0x10
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// Flash Descriptpr Master section
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#define B_FLASH_FMBA 0x0080 ///< Flash Master Base Address
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#define R_FLMSTR1_BIOS 0x00 //Flash Master Host CPU/BIOS
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