Commit Graph

623 Commits

Author SHA1 Message Date
Mingqiang Chi 09ff94fc49 hv:Change structure boot_cpu_data to static
-- Change boot_cpu_data to static, only used in cpu_caps.c,
-- Add get_cpu_info() api, it will call this api instead of
   boot_cpu_data except cpu_caps.c

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2019-01-07 11:23:22 +08:00
Mingqiang Chi 7c4dd0d277 hv:Move pm state structure to pm.h
-- move structure 'cpu_state_info' from cpu_caps.h to host_pm.h
-- add get_cpu_pm_state_info() api

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2019-01-07 11:23:22 +08:00
Zide Chen a4b166d5e8 hv: add missing MSRs to unsupported_msrs[]
SMRR (System-Management Range Register) is disabled from vMTRR,
so treat IA32_SMRR_PHYSBASE and IA32_SMRR_PHYSMASK as unsupported.

IA32_SMBASE is available only when IA32_VMX_MISC[15] is set.

IA32_FIXED_CTR0/1/2 are available only when CPUID.0AH:EDX[4:0] is non-zero.

Intel Processor Trace feature has been disabled and the associated MSRs
need to be in unsupported_msr[] as well.

Tracked-On: #1867
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-04 16:05:50 +08:00
Chaohong guo 971eb84c20 HV: add const qualifier for functions' argments in vlapic.c
If a argment is not changed in function, MISRA recommends to add const
qualifier for that argement.

Tracked-On: #861
Signed-off-by: Chaohong guo <chaohong.guo@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-02 16:22:11 +08:00
Li, Fei1 860c444c55 hv: coding style: add `const` qualifier for some function
Add `const` qualifier for lookup_address and find_vcpuid_entry.

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-01-02 09:35:00 +08:00
Li, Fei1 6f0edfc38d hv: coding style: use the defined data type __packed
1) Use __attribute__((packed)) instead of #pragma pack(1)
2) Use the defined data type __packed instead of __attribute__((packed))

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-01-02 09:35:00 +08:00
Yan, Like 1dfd05cdac hv: fix mis-usage of "PAGE_SHIFT"
Replace PAGE_SHIFT with MSI_ADDR_DEST_SHIFT in ptirq_build_physical_msi(), since it's not correct in semantics.

Tracked-On: #2209
Signed-off-by: Yan, Like <like.yan@intel.com>
2018-12-28 23:46:49 +08:00
Mingqiang Chi 5c6fe01c87 hv:Change pcpu_active_bitmap to static
-- Change pcpu_active_bitmap to static, only used in
   cpu.c
-- add get_pcpu_active_bitmap()

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-28 23:26:31 +08:00
Mingqiang Chi 682824de6d hv:Change phys_cpu_num to static
-- change phys_cpu_num to static
-- add get_pcpu_nums() and is_pcpu_active() APIs
-- replace phys_cpu_num with get_pcpu_nums() except cpu.c

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-28 23:26:31 +08:00
Shuo A Liu 952943c3ea hv: decouple IO completion polling from idle thread
IO completion polling will access vcpu and vm structs. If doing it in
idle thread, there might be some race issues between vm destroying and
idle thread. They are running on different cores.
Got suggestion from Fengwei, decouple the polling action from idle
thread and just do it in vcpu thread, then we can guarantee idle thread
in really idle status.

Tracked-On: #1821
Signed-off-by: Shuo A Liu <shuo.a.liu@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
2018-12-27 12:35:40 +08:00
Shuo A Liu e8ac97671f hv: use asm_pause() to replace inline ASM to satisfy MISRAC
pause_cpu() --> asm_pause()
hlt_cpu() --> asm_hlt()
inline ASM pause --> asm_pause()

Tracked-On: #1821
Signed-off-by: Shuo A Liu <shuo.a.liu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-27 12:35:40 +08:00
Binbin Wu 21aa1907fd hv: vcpuid: cpuid leaf 07h has subleaf
Two changes:

1. cpuid leaf 07h has subleaf:
According to SDM 3-194 Vol.2A, Table 3-8, cpuid leaf 07h has sub-leaves.
cpuid.07.eax reports the maximum input for sub-leaves.
Since there is no definition for subleaf > 0 in SDM, hv only supports subleaf 0.

2. In currently hv code, cpuid leaf function 14h is disabled,
CPUID.07H:EBX.INTEL_PROCESSOR_TRACE should be disabled as well.

Tracked-On: #2198
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Li, Fei1 <fei1.li@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2018-12-27 09:05:12 +08:00
Shiqing Gao b3c199d043 hv: mmio_read: add `const` qualifier
This patch fixes the MISRA-C violations related to mmio_read**
 * add `const` qualifier in implementation of mmio_read**
   `const` qualifier shall be added

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Reviewed-by: Li, Fei1 <fei1.li@intel.com>
2018-12-26 10:57:41 +08:00
Yonghua Huang 3998c97756 HV: [v2] bugfix in 'hv_access_memory_region_update()'
- bugfix:the actual 'size' of memory region that
    to be updated is incorrect.

  - replace CONFIG_UEFI_STUB with DMAR_PARSE_ENABLED
    when update memory pages for ACPI_RECLAIM region,
    as DMAR_PARSE_ENABLED may be enabled on non-EFI
    platform.

V2 update:
    wrap roundup to 2M and rounddown to 2M inline
    functions.

Tracked-On: #2056
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-12-25 22:06:02 +08:00
Yonghua Huang ea672c5b07 hv: update coding style for tampoline.c
- add API get trampoline_start16_paddr() instead
    of exporting this global variable.
  - other minor update.

Tracked-On: #2095
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-25 13:25:14 +08:00
Sainath Grandhi ef03385f42 hv: Write Buffer Flush - VT-d
This patch does the following changes
According to VT-d spec Section 6.8 "Write Buffer Flushing" DRAM write buffers
are flushed implicitly upon Remapping Hardware Caches Invalidation even on
platforms that set RWBF to 1 in capability register. So removed write buffer
flushing as current ACRN issues cache invalidation commands in all cases.

Tracked-On: #1855
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
2018-12-24 22:18:30 +08:00
Li, Fei1 cf47f6cff8 hv: coding style: refine the remaining functions to one exit point
Refine the remaining functions in the head file to one exit point

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-12-21 19:39:56 +08:00
Li, Fei1 36dcb0f605 hv: lib: refine inline assembly use in bitmap operation
Try to minimize the C code in inline assembly function. Now only
construct data structure and return a value is permitted.

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-12-21 19:39:56 +08:00
Li, Fei1 738f2536fe hv: coding style: refine cpu related function to one exit
2) Fix procedure has more than one exit point.

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-12-21 13:34:01 +08:00
Jason Chen CJ ff0703dd40 scheduler: make scheduling based on struct sched_object
use struct sched_object as the main interface of scheduling, then
make scheduler as an independent module to vcpu:
- add struct sched_object as one field in struct vcpu
- define sched_object.thread for switch_to thread
- define sched_object.prepare_switch_out/in for prepare_switch before
  switch_to
- move context_switch_out/context_switch_in into vcpu.c as
  vcpu.sched_obj.prepare_switch_out/in
- make default_idle as global idle.thread for idle_thread
- make vcpu_thread as vcpu.sched_obj.thread for each vcpu thread
- simplify switch_to based on sched_object

Tracked-On: #1842
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <edide.dong@intel.com>
2018-12-21 10:34:15 +08:00
Jason Chen CJ 6d67364881 scheduler: refine runqueue related functions
add struct sched_object, and use it as input param instead of vcpu for
below functions:
- add_to_cpu_runqueue renamed from add_vcpu_to_runqueue
- remove_from_cpu_runqueue renamed from remove_vcpu_from_runqueue
- get_next_sched_obj added to get next sched object

Tracked-On: #1842
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <edide.dong@intel.com>
2018-12-21 10:34:15 +08:00
Tw 80b392a854 hv:vtd: fix MISRA-C violations on pointer param should be declared pointer to const
This patch fix MISRA-C violations in arch/x86/vtd.c
on pointer param should be declared pointer to const.

Tracked-On: #861
Signed-off-by: Tw <wei.tan@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-21 10:32:53 +08:00
Arindam Roy bec21d147b Patch for modularising ioapic.[c/h] and related files.
This adds few functions to access the daata structures
defined inside ioapic.c. Removes the same data structures
from ioapic.h
Also this modifies some of the names of existing APIs to
conform to the ioapic module name.
Modified gsi_table identifier to gs_table_data, to avoid
a MISRA C Violation.

Tracked-On: #1842
Signed-off-by: Arindam Roy <arindam.roy@intel.com>
2018-12-21 09:58:25 +08:00
Li, Fei1 1dca17cd29 hv: coding style: refine initialize_trusty to one exit
1) Move data copy out of initialize_trusty
2) Fix procedure has more than one exit point

Tracked-On: #2120
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-12-20 21:53:51 +08:00
Li, Fei1 5f0c093e57 hv: coding style: remove no real declaration for external variable
There is no no real declaration for these external variables. So just
remove them.

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-12-20 20:20:08 +08:00
Mingqiang Chi 81a9de6067 hv:fix MISRA-C violations in create_vm
-- fix "more than one exit point" and "goto detected" violations
-- change prepare_vm0_memmap to void type
-- Add free_vm_id when create vm failed

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-20 18:47:57 +08:00
Li, Fei1 f27aa70fb5 hv: coding style: refine page related
1) Fix procedure has more than one exit point.
2) Add some brackets to make logical conjunctions more readable.

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-20 15:44:08 +08:00
Binbin Wu 71a80d2d60 hv: assign: change ptirq vpin source type from enum to macro
This patch fixes the MISRA-C violations on implicit type conversion.
For ptirq vpin source type, there is no need to define a enum.
Remove enum ptirq_vpin_source.
Define two macro:
- PTDEV_VPIN_IOAPIC
- PTDEV_VPIN_PIC

Tracked-On: #861
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-20 13:43:47 +08:00
Yan, Like 530388db30 hv: irq: fix MISRA-C violations in irq.c and idt.h
This commit fixed following violations:
- Procedure has more than one exit point: free_irq_vector/request_irq/dispatch_interrupt
- goto detected: dispatch_interrupt
- Pointer param should be declared pointer to const: fixup_idt
- basic type declaration used: fixup_idt

Tracked-On: #861
Signed-off-by: Yan, Like <like.yan@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-20 09:09:31 +08:00
Kaige Fu 2fefff34a7 HV: x86: fix "Global variable should be declared const"
Gloabal variable should be declared constant wherever possible to avoid unintentional
modification.

Tracked-On: #861
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-19 13:06:34 +08:00
Zide Chen d133f95d97 hv: fix MISRA-C violations "Pointer param should be declared pointer to const."
MIRSA-C requires the const qualifier should be applied to pointer parameters
that address data not subject to change in rule 120D.

Tracked-On #861
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-19 13:03:03 +08:00
Minggui Cao f81fb21a58 HV: modularization to refine pm related code.
1. move out vm related code from arch/pm.
2. remove unnecssary global variables.
3. keep the global variables as static, not used
by other modules directlly.

Tracked-On: #1842
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Reviewed-by: Victor Sun <victor.sun@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-19 13:02:09 +08:00
Mingqiang Chi 64a463000f hv:refine prepare_vm0 api
-- fix MISRA-C violation "procedure has more than one exit point"
   for this api
-- change start_vm to void type since it is always return 0

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-19 09:16:37 +08:00
Jason Chen CJ 97132acccf Make ibrs_type as internal variable
add get_ibrs_type API to get ibrs type.
this patch fix Misra C violation:
filename:/hypervisor/arch/x86/security.c  function:None  offset:19:
       reason:Variable should be declared static. : ibrs_type

Tracked-On: #861
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-12-19 09:07:14 +08:00
Jason Chen CJ 689c1c28c5 function name change in init.c
- bsp_boot_init to init_primary_cpu
- bsp_boot_post to init_primary_cpu_post

Tracked-On: #1842
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-12-19 09:07:14 +08:00
Jason Chen CJ 5968da4635 move security related funcs into security.c
there are still some security related funcs in cpu_caps.c & cpu.c,
move them out into security.c.

Changes to be committed:
	modified:   Makefile
	modified:   arch/x86/cpu.c
	modified:   arch/x86/cpu_caps.c
	modified:   arch/x86/guest/vcpu.c
	new file:   arch/x86/security.c
	modified:   arch/x86/trusty.c
	modified:   arch/x86/vmx_asm.S
	modified:   include/arch/x86/cpu.h
	modified:   include/arch/x86/cpu_caps.h
	modified:   include/arch/x86/per_cpu.h
	new file:   include/arch/x86/security.h

Tracked-On: #1842
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-12-19 09:07:14 +08:00
Jason Chen CJ 0ad6da998c make detect_cpu_cap as internal function
call detect_cpu_cap in init_cpu_capabilities

Tracked-On: #1842
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-12-19 09:07:14 +08:00
Jason Chen CJ 7c8b767192 refine in cpu_caps.c
- we should not use print function before tsc setup
- is_ept_supported is internal API
- add is_apicv_supported to check apicv feature
- rename some functions to verb+obj format or better name

Changes to be committed:
	modified:   arch/x86/cpu.c
	modified:   arch/x86/cpu_caps.c
	modified:   include/arch/x86/cpu_caps.h

Tracked-On: #1842
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-12-19 09:07:14 +08:00
Jason Chen CJ 63773db437 change get_monitor_cap to has_monitor_cap
has_monitor_cap is more suitable name

v2:
- rename to has_monitor_cap

Changes to be committed:
	modified:   arch/x86/cpu.c
	modified:   arch/x86/cpu_caps.c
	modified:   include/arch/x86/cpu_caps.h

Tracked-On: #1842
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-19 09:07:14 +08:00
Jason Chen CJ 746fbe147d modulization: move functions related with cpu caps into cpu_caps.c
move cpu caps related functions like capability init/detect/check
in cpu.c & mmu.c into a new file cpu_caps.c

Changes to be committed:
	modified:   developer-guides/hld/hv-memmgt.rst
	modified:   ../hypervisor/Makefile
	modified:   ../hypervisor/arch/x86/cpu.c
	new file:   ../hypervisor/arch/x86/cpu_caps.c
	modified:   ../hypervisor/arch/x86/mmu.c
	modified:   ../hypervisor/arch/x86/vmx_asm.S
	modified:   ../hypervisor/include/arch/x86/cpu.h
	new file:   ../hypervisor/include/arch/x86/cpu_caps.h
	modified:   ../hypervisor/include/arch/x86/guest/vm.h
	modified:   ../hypervisor/include/arch/x86/mmu.h
	modified:   ../hypervisor/include/arch/x86/vmcs.h

Tracked-On: #1842
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-19 09:07:14 +08:00
Li, Fei1 78e9a84f39 hv: add fast string enhanced rep movsb/stosb check on initial
The ACRN suppose the CPU support fast string enhanced rep.

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-12-18 16:30:27 +08:00
Zhipeng Gong c547e9cfb4 hv: enable/disable snoop control bit per vm
For security, this patch add one flag per vm and disable snoop control
for sos and enable snoop control for uos by default.

v2: add one flag in vm, not in iommu domain.
v3: add vm null check

Tracked-On: #2086
Signed-off-by: Zhipeng Gong <zhipeng.gong@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-18 13:45:10 +08:00
Zide Chen 2028034151 hv: MISRA-C fix "identifier reuse" in vpci code
13X: Identifier reuse: tag vs component.
A tag name shall be a unique identifier

Change the following names:
  struct msi --> struct pci_msi
  struct msix --> struct pci_msix
  struct vpci --> struct acrn_vpci
  union cfgdata -> union pci_cfgdata

Tracked-On: #861
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-18 13:39:15 +08:00
Jason Chen CJ 36863a0b54 modulization: vmx on/off should not use vcpu param
vmx.c should only take care host vmx operations, which should not
contain vcpu reference, so refine vmx on/off APIs, move out use
of vcpu by adding one per cpu vmcs_run pointer.

as now each pcpu only run on one vcpu, so just keep running vmcs
in per cpu vmcs_run pointer is enough.

Changes to be committed:
	modified:   arch/x86/cpu.c
	modified:   arch/x86/init.c
	modified:   arch/x86/pm.c
	modified:   arch/x86/vmcs.c
	modified:   arch/x86/vmx.c
	modified:   include/arch/x86/per_cpu.h
	modified:   include/arch/x86/vmx.h

Tracked-On: #1842
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-18 10:00:56 +08:00
Jason Chen CJ bed82dd3f8 cleanup vmcs source and header files
remove no need included header files and macro definitions

Changes to be committed:
	modified:   arch/x86/vmcs.c
	modified:   include/arch/x86/vmcs.h

Tracked-On: #1842
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-12-18 10:00:56 +08:00
Jason Chen CJ 731c4836dd modulization: separate vmx.c into two parts
one part is pure vmx operations which keeps in vmx.c
the other part is vmcs operations which is vcpu related, move them
into vmcs.c

Changes to be committed:
	modified:   Makefile
	copied:     arch/x86/vmx.c -> arch/x86/vmcs.c
	modified:   arch/x86/vmx.c
	modified:   arch/x86/vmx_asm.S
	modified:   include/arch/x86/hv_arch.h
	new file:   include/arch/x86/vmcs.h
	modified:   include/arch/x86/vmx.h

Tracked-On: #1842
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-12-18 10:00:56 +08:00
Yin Fengwei 69dc939243 hv: drop the temperory stack for AP startup
By switching AP wakeup from broadcast to one by one, we could
set correct stack for each AP and drop the temp stack used during
AP boot.

Tracked-On: #2034
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-17 19:16:43 +08:00
Jason Chen CJ 59e3f562b8 remove check_tsc
there is no need to clear CR4.TSD as there is no user mode
in ACRN hypervisor.

Tracked-On: #1842
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-12-17 14:31:52 +08:00
Jason Chen CJ d2bac7cc5d cpu_dead should only run on current pcpu
no need for input param pcpu_id.

Tracked-On: #1842
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-17 14:31:52 +08:00
Zide Chen 44e9318c45 hv: vmsr: fix MISRA_C violations
106D No prototype for non-static function.
  2 functions missing prototyle declarations in header file.

120S Use of bit operator on signed type.
123S Use of underlying enum representation value.
  enum values are treated like unsigned integer in vmsr.c

Tracked-On: #861
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-16 14:52:22 +08:00