hv: add fast string enhanced rep movsb/stosb check on initial
The ACRN suppose the CPU support fast string enhanced rep. Tracked-On: #861 Signed-off-by: Li, Fei1 <fei1.li@intel.com>
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@ -78,6 +78,24 @@ static inline bool get_monitor_cap(void)
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return false;
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}
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static inline bool is_fast_string_erms_supported_and_enabled(void)
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{
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bool ret = false;
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uint32_t misc_enable = (uint32_t)msr_read(MSR_IA32_MISC_ENABLE);
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if ((misc_enable & MSR_IA32_MISC_ENABLE_FAST_STRING) == 0U) {
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pr_fatal("%s, fast string is not enabled\n", __func__);
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} else {
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if (!cpu_has_cap(X86_FEATURE_ERMS)) {
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pr_fatal("%s, enhanced rep movsb/stosb not supported\n", __func__);
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} else {
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ret = true;
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}
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}
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return ret;
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}
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static uint64_t get_address_mask(uint8_t limit)
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{
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return ((1UL << limit) - 1UL) & PAGE_MASK;
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@ -222,6 +240,11 @@ static int32_t hardware_detect_support(void)
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return -ENODEV;
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}
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if (!is_fast_string_erms_supported_and_enabled()) {
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return -ENODEV;
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}
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if (!cpu_has_vmx_unrestricted_guest_cap()) {
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pr_fatal("%s, unrestricted guest not supported\n", __func__);
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return -ENODEV;
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@ -71,6 +71,7 @@
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/* Intel-defined CPU features, CPUID level 0x00000007 (EBX)*/
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#define X86_FEATURE_TSC_ADJ ((FEAT_7_0_EBX << 5U) + 1U)
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#define X86_FEATURE_SMEP ((FEAT_7_0_EBX << 5U) + 7U)
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#define X86_FEATURE_ERMS ((FEAT_7_0_EBX << 5U) + 9U)
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#define X86_FEATURE_INVPCID ((FEAT_7_0_EBX << 5U) + 10U)
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#define X86_FEATURE_SMAP ((FEAT_7_0_EBX << 5U) + 20U)
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@ -402,6 +402,9 @@
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#define PAT_MEM_TYPE_WB 0x06UL /* writeback */
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#define PAT_MEM_TYPE_UCM 0x07UL /* uncached minus */
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/* MISC_ENABLE bits: architectural */
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#define MSR_IA32_MISC_ENABLE_FAST_STRING (1U << 0U)
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#ifndef ASSEMBLER
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static inline bool pat_mem_type_invalid(uint64_t x)
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{
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