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hv: vcpuid: cpuid leaf 07h has subleaf 

Two changes:

1. cpuid leaf 07h has subleaf:
According to SDM 3-194 Vol.2A, Table 3-8, cpuid leaf 07h has sub-leaves.
cpuid.07.eax reports the maximum input for sub-leaves.
Since there is no definition for subleaf > 0 in SDM, hv only supports subleaf 0.

2. In currently hv code, cpuid leaf function 14h is disabled,
CPUID.07H:EBX.INTEL_PROCESSOR_TRACE should be disabled as well.

Tracked-On: #2198
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Li, Fei1 <fei1.li@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Binbin Wu 2018-12-22 22:35:46 +08:00 committed by wenlingz
parent 2d3f510dbe
commit 21aa1907fd
2 changed files with 14 additions and 1 deletions
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13
hypervisor/arch/x86/guest/vcpuid.c
View File

@ -106,7 +106,7 @@ static void init_vcpuid_entry(uint32_t leaf, uint32_t subleaf,
switch (leaf) {
case 0x07U:
if (subleaf == 0U) {
cpuid(leaf,
cpuid_subleaf(leaf, subleaf,
&entry->eax, &entry->ebx,
&entry->ecx, &entry->edx);
/* mask invpcid */
@ -117,6 +117,9 @@ static void init_vcpuid_entry(uint32_t leaf, uint32_t subleaf,
/* mask SGX and SGX_LC */
entry->ebx &= ~CPUID_EBX_SGX;
entry->ecx &= ~CPUID_ECX_SGX_LC;
/* mask Intel Processor Trace, since 14h is disabled */
entry->ebx &= ~CPUID_EBX_PROC_TRC;
} else {
entry->eax = 0U;
entry->ebx = 0U;
@ -224,6 +227,14 @@ int32_t set_vcpuid_entries(struct acrn_vm *vm)
}
}
break;
case 0x07U:
init_vcpuid_entry(i, 0U, CPUID_CHECK_SUBLEAF, &entry);
if (entry.eax != 0U) {
pr_warn("vcpuid: only support subleaf 0 for cpu leaf 07h");
entry.eax = 0U;
}
result = set_vcpuid_entry(vm, &entry);
break;
/* These features are disabled */
/* PMU is not supported */

2
hypervisor/include/arch/x86/cpuid.h
View File

@ -88,6 +88,8 @@
#define CPUID_EBX_PQM (1U<<12U)
/* CPUID.07H:EBX.PQE */
#define CPUID_EBX_PQE (1U<<15U)
/* CPUID.07H:EBX.INTEL_PROCESSOR_TRACE */
#define CPUID_EBX_PROC_TRC (1U<<25U)
/* CPUID.01H:ECX.PCID*/
#define CPUID_ECX_PCID (1U<<17U)