Commit Graph

426 Commits

Author SHA1 Message Date
Jason Chen CJ a6ff3a9bdc vm: allocated all pcpus to vm0 at the beginning
allocated all pcpus to vm0 to handle possible AP wakeup flow for all cpus,
as we pass org ACPI table to VM0 - that means VM0 can see all CPUs.

SOS(VM0) start expected CPUs through "maxcpus=" kernel cmdline option.

During first hypercall from SOS, calling vm_fixup to free un-expect-enabled
vcpus from VM0.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-17 10:23:27 +08:00
Jason Chen CJ d2a7a9c91d uefi: remove warkaround for AP wakeup
remove sipi_from_efi_boot_service_exit & efi_deferred_wakeup_pcpu workaround
for uefi boot flow

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-17 10:23:27 +08:00
Jason Chen CJ 953f6b5b1b vlapic: kick AP for INIT-SIPI sequence
wakeup AP need INIT-SIPI-SIPI sequence in old time, now we only need
INIT-SIPI.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-17 10:23:27 +08:00
Qi Yadong 2ea3b49858 HV: refine copy_from_vm/copy_to_vm
If the target is an array, then only the first element
will be copied.
So replace structure assignment with memcpy_s().

Signed-off-by: Qi Yadong <yadong.qi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-17 10:21:38 +08:00
Edwin Zhai 30549a59c7 DM: increase vioapic pin count
Current only 8 vioapic pins for pci irq (total 24 with 16 reserved),
which easily leads virtual GSI sharing with more and more passthrough
devices. This patch doulbes vioapic pin count and adds reboot hooks to
allocate from same pin after each reboot.

Signed-off-by: Edwin Zhai <edwin.zhai@intel.com>
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Reviewed-by: Anthony Xu <anthony.xu@intel.com>
2018-05-16 15:09:48 +08:00
Edwin Zhai e1bb372763 HV: increase UOS VIOAPIC pin count
To avoid UOS virtual GSI sharing

Signed-off-by: Edwin Zhai <edwin.zhai@intel.com>
2018-05-16 15:09:48 +08:00
Geoffroy Van Cutsem 3efef5790c Remove duplicate license file
Remove 'license_header' files that were located in hypervisor/ and
devicemodel/ and used by the respective Makefiles to build the
'include/version.h' header file.

Both Makefiles were adjusted to use the top-level LICENSE file

Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
2018-05-16 13:22:17 +08:00
Kaige Fu 93fda88893 lib: Move mem operations functions to one src file
Move all mem operations functions into a single
source code file, instead of the various source
code files that just implement a single or few
funtion.

No functional change.

Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-16 11:57:11 +08:00
Kaige Fu 497eadcb9a lib: Move all str ops functions to one src file
Move all string operations functions into a single
source code file, instead of the various source
code files that just implement a single or few
function.

No functional change.

Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-16 11:57:11 +08:00
Jie Deng 7aaff68798 dm: free entries in pci_businfo[] when deinit
Entries of pci_businfo[] allocated in function "pci_parse_slot"
using calloc need to be freed when deinit.

Signed-off-by: Jie Deng <jie.deng@intel.com>
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
Reviewed-by: Anthony Xu <anthony.xu@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
2018-05-15 18:03:34 +08:00
Yonghua Huang 69d9918ddc remove potential using default i/o handler
- device driver should register valid i/o handlers
  in any cases, avoid referencing to default handler

- remove i/o handler test code as they shall
  never be NULL.

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-05-15 18:03:34 +08:00
David B. Kinder 656449d0ba devops: Add CODEOWNERS for GitHub review
Seed an initial CODEOWNERS file.  Update as owners for specific areas
are defined.

You can use a CODEOWNERS file to define individuals or teams that are
responsible for code in a repository. The listed names must have write
permissions for the repository.

Code owners are automatically requested for review when someone opens a
pull request that modifies code that they own. When someone with admin
or owner permissions has enabled required reviews, they also can
optionally require approval from a code owner before the author can
merge a pull request in the repository.

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2018-05-15 18:03:34 +08:00
Yan, Like a4c4d6077f tools: acrntrace: fix NULL pointer issue in create_trace_file_dir()
Fix NULL pointer dereference if 'localtime()' execution encountered an error,
in create_trace_file_dir().

Signed-off-by: Yan, Like <like.yan@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 18:03:34 +08:00
Yan, Like 6f340f8564 tools: acrnlog: fix issues founded in static analysis
fixed two issues: 1) potential uninitiliazed usage of 'len' in
hvlog_read_dev(); 2) NULL dereference of 'last' if 'calloc' failure.

Signed-off-by: Yan, Like <like.yan@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 18:03:34 +08:00
Minggui Cao fb19b296ea add a makefile under project root directory
it can be used as following:
  make ==> to make hypervisor & devicemodel & tools
also modify tools makefile to support out-dir setting.

Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Reviewed-by: Jack Ren <jack.ren@intel.com>
2018-05-15 18:03:34 +08:00
Yonghua Huang c597a0fc2f I/O VM-exit handler cleanup
- add check for spanning i/o devices access
- remove ASSERT in I/O instr. VM exit handler

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-05-15 18:03:33 +08:00
Zhao Yakui 9efbf1212f HV: Enable the -O2 option for HV
Now the -O0 option is used. In such case the code is not optimized.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Zheng Gen <gen.zheng@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 18:03:33 +08:00
Zhao Yakui 263fafe819 HV: Initialize one variable to fix the compiling warning
If the optimization option is enabled, it is possible that one variable is
not initialized before using in the get_vioapic_info. (In fact the warning is
bogus)
This is only to reduce the compiling warning.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
2018-05-15 18:03:33 +08:00
Zhao Yakui 3a9bf54d66 HV: Add gcc compiler option to disable FPU/SSE/MMX
FPU/SSE is not supported in HV. Otherwise it is possible that the
SSE/FPU register is used under -O2 option.
So the gcc option is added to disable them.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 18:03:33 +08:00
Zhao Yakui 52a91fff0d HV: Use the CFLAGS to control the optimization option
Now two flags can be used to control the optimizatin option. So unify them
and only one flag can be used to config the optimization

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Zheng Gen <gen.zheng@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 18:03:33 +08:00
Zhao Yakui 698b53adc4 HV: Add one correct Descriptor_table struct to configure VMCS
Now one uint64_t type is used to obtain the corresponding descriptor_table
for GDT/IDT. This will cause the stack protect corruption under -O2.
So the descriptor_table struct is added to configure the GDT/IDT of VMCS.

V1->V2: Move the descriptor_table into vmx.h header file
And its type is renamed from dt_addr_t to descriptor_table.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Zheng Gen <gen.zheng@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 18:03:33 +08:00
Zhao Yakui b2cadfecdf HV: Fix the incorrect operand-constraints for inline assembly
The RFLAGS will be touched in some inline assembly.(exec_vmxon/
RFLAGS_RESTORE). The "cc" constraint should be added. Otherwise
it won't be handled under -O2 option.
And "%%XXX" register should also be added into constraints.
Otherwise it will be optimized incorrectly.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Zheng Gen <gen.zheng@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 18:03:33 +08:00
Li, Fei1 9dd7d27737 hv: vlapic_timer: refine vlapic tscdeadline timer
Add vlapic_create_timer/vlapic_reset_timer to setup/reset a timer.
Add vlapic_update_lvtt to disarm timer when mode changes.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 18:03:33 +08:00
Li, Fei1 ea54216116 hv: vlapic_timer: add vlapic timer mode API
Add vlapic_lvtt_oneshot, vlapic_lvtt_masked
rename vlapic_periodic_timer to vlapic_lvtt_period
rename VLAPIC_TSCDEADLINE to vlapic_lvtt_tsc_deadline

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 18:03:33 +08:00
Li, Fei1 8ec78f8efc hv: vlapic: coding refine
Using __func__ instead of function string name.
Using tab instead of more whitespace.
Using macro instead of numeric constants.
Remove unnecessary function declaration.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 18:03:33 +08:00
Li, Fei1 b9971c206f hv: vlapic_timer: remove vlapic one-shot/periodic timer implement
These code is useless since it just pseudocode. Current it doesn't
support vlapic one-shot/periodic timer.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 18:03:33 +08:00
Li, Fei1 5df2efad4a hv: timer: make the timer list be ordered
make the timer list be ordered to speed up expried timer
process and next timer event finding.

Add timer would not schedule timer unless it's the next
timer event.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 18:03:33 +08:00
Geoffroy Van Cutsem 6fc5116776 Documentation: update the contributing guide to use new LICENSE file
Update the "Contributing Guidelines" document to point at the
top-level LICENSE file that was created after the merger of
the three acrn-{hypervisor,devicemodel,documentation} repositories

Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
2018-05-15 18:03:33 +08:00
Yan, Like 867e56d04b Move ACRN tools code directory one level higher
The tools directory is moved out of ./devicemodle, to be in parallel with
hypervisor, devicemodel and doc.

Signed-off-by: Yan, Like <like.yan@intel.com>
2018-05-15 18:03:33 +08:00
David B. Kinder b73f1face6 doc: add project README
Simplify the previous README and add more information about project
resources.

Fixes: #144

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2018-05-15 18:03:33 +08:00
David B. Kinder ec0d7e0e1e doc: update doc building howto
Post-merge, the doc building instructions need an update to reflect the
new diretory structure.

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2018-05-15 18:03:33 +08:00
David Kinder 8ce423e211 Create LICENSE (#168)
* Create LICENSE

* Create LICENSE

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2018-05-15 18:03:33 +08:00
Rusty Lynch c874090b34 Fix typo in gitignore
Signed-off-by: Rusty Lynch <rusty.lynch@intel.com>
2018-05-15 18:03:33 +08:00
David B. Kinder f8861806f0 doc: post-merge changes to docs
Documentation updates were needed to account for changes caused by the
recent merging of the three acrn-hypervisor, acrn-devicemodel, and
acrn-documentation repos.

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2018-05-15 18:03:33 +08:00
Geoffroy Van Cutsem 12fb4b0584 doc: Adjust various scripts accordingly
Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2018-05-15 18:02:07 +08:00
Jack Ren 60c07fba51 add .gitignore
Signed-off-by: Jack Ren <jack.ren@intel.com>
2018-05-15 17:41:53 +08:00
Zide Chen 6f97a14398 HV: Enable CR0.WP
Page fault could be raised if writing to read-only pages. This is
useful for debugging.

Signed-off-by: Zide Chen <zide.chen@intel.com>
2018-05-15 17:25:59 +08:00
Victor Sun c53a04f56c HV: rename acrn_register to acpi_generic_address
The name of acrn_register is too generic, rename to acpi_generic_address
which is more common.

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Kevin Tian <kevin.tian@intel.com>
2018-05-15 17:25:59 +08:00
lijinxia 3b6fe5782d Revert "HV: Prepare cpu_secondary.S for AP trampoline code relocation"
This reverts commit bfa67fa6a0.
2018-05-15 17:25:59 +08:00
lijinxia b3dd135ed3 Revert "HV: added memory allocation functions for AP trampoline code relocation"
This reverts commit 41b83bb20b.
2018-05-15 17:25:58 +08:00
lijinxia f8fbdbe7ec Revert "HV: Make AP trampoline code relocatable"
This reverts commit 31bf2befbf.
2018-05-15 17:25:58 +08:00
lijinxia 0c5956beb1 Revert "HV: adjust the base address of guest initial page tables"
This reverts commit 4aab1ea80d.
2018-05-15 17:25:58 +08:00
Zide Chen 6de5b0478c HV: adjust the base address of guest initial page tables
V2->V3: Updated variable name: trampoline_code_paddr
V1->V2: changed variable name: init_ap_code_addr

These page tablea are sitting right after the trampoline code, so adjust it according to
the actual loaded address for trampoline code

Signed-off-by: Zheng, Gen <gen.zheng@intel.com>
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
2018-05-15 17:25:58 +08:00
Zide Chen fe6397d9d8 HV: Make AP trampoline code relocatable
V3->V4: Updated function/variable names for accurancy
V2->V3: Changed a few function/variable names to make it less confusing
V1->V2: removed the unneccesary cache flushing

- For UEFI boot, allocate memory for trampoline code in ACRN EFI,
  and pass the pointer to HV through efi_ctx
- For other boot, scan E820 to allocate memory in HV run time
- update_trampoline_code_refs() updates all the references that need the
  absolute PA with the actual load address

Signed-off-by: Zheng, Gen <gen.zheng@intel.com>
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
2018-05-15 17:25:58 +08:00
Zide Chen ceb3076b69 HV: added memory allocation functions for AP trampoline code relocation
V2->V3: Fixed the booting issue on MRB board and removed the restriction
        of allocate memory from address 0

1) Fix the booting from MRB issue
-#define    CONFIG_LOW_RAM_SIZE 0x000CF000
+#define    CONFIG_LOW_RAM_SIZE 0x00010000

2) changed e820_alloc_low_memory() to handle corner case of unaligned e820 entries
  and enable it to allocate memory at address 0
+		a length = end > start ? (end - start) : 0;

-       /* We don't want the first page */
-       if ((length == size) && (start == 0))
-           continue;

3) changed emalloc_for_low_mem() to enable to allocate memory at address 0
-       /* We don't want the first page */
-       if (start == 0)
-           start = EFI_PAGE_SIZE;

V1->V2: moved e820_alloc_low_memory() to guest.c and added the logic to
        handle unaligned E820 entries

emalloc_for_low_mem() is used if CONFIG_EFI_STUB is defined.
e820_alloc_low_memory() is used for other cases

In either case, the allocated memory will be marked with E820_TYPE_RESERVED

Signed-off-by: Zheng, Gen <gen.zheng@intel.com>
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
2018-05-15 17:25:58 +08:00
Zide Chen 9323f811ea HV: Prepare cpu_secondary.S for AP trampoline code relocation
V1->V2: removed CONFIG_LOW_RAM_START and added ".org 0" to
cpu_secondary.S

The assumption is trampoline code is relocated while HV is not, so:

trampoline code is built at address 0, and CS register is updated
by SIPI to reflect the correct vector

in real mode part, added extra pointers for page tables and long jump buffer
so it's possible for HV code to patch the relocation offset

in long mode part, use absolute addressing when referring HV symbols,
and use relative addressing for symbols within trampoline code

Signed-off-by: Zheng, Gen <gen.zheng@intel.com>
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
2018-05-15 17:25:58 +08:00
Yu Wang 8c06b69622 dm: Reorganize ACRN DM directory.
The current dm, all non-pci and non-acpi related files are put into
hw/platform directory. This is actually disturbed the meaning of
*platform*. The platform devices are mean of board and SoC specific
non-PCI devices, like usb devices, etc.

This patch refines the ACRN dm directory architecture.

For some common device logic files, likes block_if.c/uart_core.c or
usb_core.c. They will move to hw/ directly.

For platform architecture depended files, create arch/ under root dir.
And create sub-dir arch/x86 for x86 architecture, will create more
architectures in future. The pm.c will move to this new dir.

The hw/acpi will be moved to hw/platform/acpi due to acpi also be
considered as part of platform.

Signed-off-by: Yu Wang <yu1.wang@intel.com>
2018-05-15 17:25:58 +08:00
Zide Chen eebf5fec6f HV: correct the handling of MU_MEM_ATTR_READ MMU flag
Currently config_page_table_attr() treats MMU_MEM_ATTR_READ exactly as
MMU_MEM_ATTR_BIT_READ_WRITE for PTT_HOST, so even when MMU_MEM_ATTR_WRITE
is not used, the R/W bit in PTE is still being set

Signed-off-by: Zide Chen <zide.chen@intel.com>
2018-05-15 17:25:58 +08:00
Victor Sun 4817134297 DM: rename acrn_register to acpi_generic_address
The name of acrn_register is too generic, rename to acpi_generic_address
which is more common.

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Kevin Tian <kevin.tian@intel.com>
2018-05-15 17:25:58 +08:00
David B. Kinder 8a73718af3 doc: add use of GitHub issues
We've enabled GitHub issues for submitting and tracking bug and
enhancement requests for the project.  Add some documentation about how
to use issues and what to expect.

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2018-05-15 17:25:58 +08:00