HV: increase UOS VIOAPIC pin count
To avoid UOS virtual GSI sharing Signed-off-by: Edwin Zhai <edwin.zhai@intel.com>
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@ -41,7 +41,6 @@
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#define IOEOI 0x40
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#define REDIR_ENTRIES_HW 120 /* SOS align with native ioapic */
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#define REDIR_ENTRIES_UOS 24 /* UOS pins*/
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#define RTBL_RO_BITS ((uint64_t)(IOAPIC_RTE_REM_IRR | IOAPIC_RTE_DELIVS))
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#define ACRN_DBG_IOAPIC 6
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@ -568,7 +567,7 @@ vioapic_pincount(struct vm *vm)
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if (is_vm0(vm))
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return REDIR_ENTRIES_HW;
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else
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return REDIR_ENTRIES_UOS;
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return VIOAPIC_RTE_NUM;
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}
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int vioapic_mmio_access_handler(struct vcpu *vcpu, struct mem_io *mmio,
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@ -63,6 +63,13 @@
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#define REQUEST_READ 0
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#define REQUEST_WRITE 1
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/* IOAPIC device model info */
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#define VIOAPIC_RTE_NUM 48 /* vioapic pins */
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#if VIOAPIC_RTE_NUM < 24
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#error "VIOAPIC_RTE_NUM must be larger than 23"
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#endif
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/* Generic VM flags from guest OS */
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#define SECURE_WORLD_ENABLED (1UL<<0) /* Whether secure world is enabled */
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