HV: Fix the incorrect operand-constraints for inline assembly

The RFLAGS will be touched in some inline assembly.(exec_vmxon/
RFLAGS_RESTORE). The "cc" constraint should be added. Otherwise
it won't be handled under -O2 option.
And "%%XXX" register should also be added into constraints.
Otherwise it will be optimized incorrectly.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Zheng Gen <gen.zheng@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Zhao Yakui 2018-05-10 11:13:55 +08:00 committed by Jack Ren
parent 9dd7d27737
commit b2cadfecdf
3 changed files with 9 additions and 6 deletions

View File

@ -347,7 +347,9 @@ static uint64_t get_random_value(void)
asm volatile ("1: rdrand %%rax\n"
"jnc 1b\n"
"mov %%rax, %0\n"
: "=r"(random) :: );
: "=r"(random)
:
:"%rax");
return random;
}

View File

@ -82,7 +82,7 @@ static inline int exec_vmxon(void *addr)
"pushfq\n"
"pop %0\n":"=r" (rflags)
: "r"(addr)
: "%rax");
: "%rax", "cc", "memory");
/* if carry and zero flags are clear operation success */
if (rflags & (RFLAGS_C | RFLAGS_Z))
@ -140,7 +140,7 @@ int exec_vmclear(void *addr)
"pushfq\n"
"pop %0\n":"=r" (rflags)
: "r"(addr)
: "%rax");
: "%rax", "cc", "memory");
/* if carry and zero flags are clear operation success */
if (rflags & (RFLAGS_C | RFLAGS_Z))
@ -165,7 +165,7 @@ int exec_vmptrld(void *addr)
"pop %0\n"
: "=r" (rflags)
: "r"(addr)
: "%rax");
: "%rax", "cc");
/* if carry and zero flags are clear operation success */
if (rflags & (RFLAGS_C | RFLAGS_Z))

View File

@ -379,8 +379,9 @@ void load_cpu_state_data(void);
/* Macro to restore rflags register */
#define CPU_RFLAGS_RESTORE(rflags) \
{ \
asm volatile (" push %0" : : "r" (rflags)); \
asm volatile (" popf"); \
asm volatile (" push %0\n\t" \
"popf \n\t": : "r" (rflags) \
:"cc"); \
}
/* This macro locks out interrupts and saves the current architecture status