Filip Kokosinski ecf308e8de dts/andes: adjust the sizes of PLIC nodes ... This commit adjusts the sizes of the two PLIC nodes AE350 defines: * `plic0` size is changed from `0x04000000` to `0x02000000` * `plic_sw` size is changed from `0x04000000` to `0x00400000` Without these change, `plic0` address space would overlap with `plic_sw`, and with other memory-mapped peripherals. Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>		2024-10-31 14:17:02 -05:00
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andes_v5_ae350.dtsi	dts/andes: adjust the sizes of PLIC nodes	2024-10-31 14:17:02 -05:00