Commit Graph

53607 Commits

Author SHA1 Message Date
Almir Okato 593dc946d1 esp32: add simple boot support
The Simple Boot feature for Espressif chips is a method of booting
that doesn't depend on a 2nd stage bootloader. Its not the
intention to replace a 2nd stage bootloader such as MCUboot and
ESP-IDF bootloader, but to have a minimal and straight-forward way
of booting, and also simplify the building.

This commit also removes deprecated code and makes this bootloader
configuration as default for esp32 targets and removes the need
for running 'make bootloader' command for it.

Signed-off-by: Almir Okato <almir.okato@espressif.com>
2024-07-04 18:22:24 -03:00
Almir Okato 6ec690cbfc esp32[s2|s3]: move rom segments mapping to espressif common folder
Move and unify map_rom_segments function called when starting
Simple Boot and MCUboot compatible images.

Signed-off-by: Almir Okato <almir.okato@espressif.com>
2024-07-04 18:22:24 -03:00
Peter van der Perk 6b79aea0cf imxrt: Correctly update PLL, bit has to toggled instead of being set 2024-07-04 13:00:19 -03:00
buxiasen c641148bc4 sim: make possible keep ubsan and bypass feature
sometimes ubsan work with asan trigger a mistake report, make it
possible to export library with ubsan, and bypass runtime feature.

Signed-off-by: buxiasen <buxiasen@xiaomi.com>
2024-07-04 21:36:02 +08:00
nuttxs 8cd207e1b1 ESP32: emac initialization adding cpu id 2024-07-03 22:54:28 +08:00
Marco Casaroli b8c1ce45e6 refactor(esp32-qemu-openeth): use lower half driver interface
This current driver does not handle well netpkts used in the
write buffers.

I learned about this document:

https://github.com/apache/nuttx/blob/master/Documentation/components/net/netdriver.rst

After I ported and contributed the original driver.

However from the document, I understand these types of drivers are
simpler to implement and I could simplify the driver and handle
correctly the TCP write buffers.
2024-07-03 08:52:14 -03:00
Rushabh Gala ece78993b6 risc-v/ox64: Add LED Driver
- This PR adds the LED Driver for Ox64 Board (User LEDs and Auto LEDs)
- Ox64 LED Driver will be used by the Rust Blinky App for Google Summer of Code
- User LED 1 is configured for GPIO 29. Other User LEDs and Auto LEDs shall be configured by the NuttX Dev.
- The code is derived from NuttX PinePhone LED Driver
2024-07-03 17:54:09 +08:00
p-szafonimateusz 8682321d0c arch/x86_64: addrenv support
Add addrenv support for x86_64.
For now we support mapping on PT level, so PD, PDT and PML4 are static

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-07-03 17:40:53 +08:00
p-szafonimateusz 0200a48f72 arch/intel64/intel64_map_region.c: use MMU api to implement up_map_region
use new MMU api to implement up_map_region().

The new implementation support maping over 0xffffffff but requires CONFIG_MM_PGALLOC=y

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-07-03 17:40:53 +08:00
p-szafonimateusz b1f3435d22 arch/intel64: add support for MM_PGALLOC
add support for MM_PGALLOC for x86_64

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-07-03 17:40:53 +08:00
p-szafonimateusz e0183927b4 arch/x86_64: add MMU interface
add MMU api for x86_64

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-07-03 17:40:53 +08:00
p-szafonimateusz 53d112fa95 x86_64: add ELF support
add arch_elf64.c for x86_64, ported from sim/x86

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-07-03 17:40:53 +08:00
xuxingliang 2f76cf6b4e board: add systemview config for stm32f429i-disco
Signed-off-by: xuxingliang <xuxingliang@xiaomi.com>
2024-07-03 17:31:23 +08:00
xuxingliang ae03313473 drivers/segger: upgrade to v3.54
Signed-off-by: xuxingliang <xuxingliang@xiaomi.com>
2024-07-03 17:31:23 +08:00
Alan Carvalho de Assis 0476f8d95c rp2040: Add support to MAX6675 2024-07-03 08:50:18 +02:00
Daniel P. Carvalho 25886c7b47 b-g474e-dpow1: Added smps example. 2024-07-03 08:49:16 +02:00
Daniel P. Carvalho 9f69652835 Added support for STM32G47XXX devices. 2024-07-03 08:49:16 +02:00
Daniel P. Carvalho fa80408a06 arch/stm32: PLL clock is not available for HRTIM clock source on STM32G47XX devices (STM32F3XXX only). 2024-07-03 08:49:16 +02:00
Daniel P. Carvalho c045558241 arch/arm/stm32: Added EXTI lines for STM32G47XX. 2024-07-03 08:49:16 +02:00
p-szafonimateusz e6553eee5a libc/x86_64: port string functions from bionic
port optimized string functions for x86_64 from Bionic (BSD licensed)

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-07-02 23:59:18 +08:00
chao an fc716802c0 cmake/add_library: enable library install by default
enable library install by default to support nuttx export for cmake

nuttx$ cmake --install build  --prefix $PWD/build/staging/
-- Install configuration: ""
-- Installing: nuttx/build/staging/lib/libarch.a
-- Installing: nuttx/build/staging/lib/libbinfmt.a
-- Installing: nuttx/build/staging/lib/libdrivers.a
-- Installing: nuttx/build/staging/lib/libfs.a
...

Signed-off-by: chao an <anchao@lixiang.com>
2024-07-02 16:50:18 +08:00
Masayuki Ishikawa 04c19bb1c9 Revert "irq: remove restore_critical_section in irq"
This reverts commit f6a9e91057.
2024-07-02 15:46:20 +08:00
hujun5 80fdf95790 tee: smp support
During the boot phase, when we transition from tee smp to ap smp, we can use a busy waitflag to wait for the completion of the initialization of ap's core0

test:
We can use qemu for testing.
compiling
make distclean -j20; ./tools/configure.sh -l qemu-armv8a:nsh_smp ;make -j20
running
qemu-system-aarch64 -cpu cortex-a53 -smp 4 -nographic -machine virt,virtualization=on,gic-version=3 -net none -chardev stdio,id=con,mux=on -serial chardev:con -mon chardev=con,mode=readline -kernel ./nuttx
Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-07-02 13:31:41 +08:00
hujun5 600368fbe2 smp: add busy wait flag
test:
We can use qemu for testing.
compiling
make distclean -j20; ./tools/configure.sh -l qemu-armv8a:nsh_smp ;make -j20
running
qemu-system-aarch64 -cpu cortex-a53 -smp 4 -nographic -machine virt,virtualization=on,gic-version=3 -net none -chardev stdio,id=con,mux=on -serial chardev:con -mon chardev=con,mode=readline -kernel ./nuttx
Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-07-02 13:31:41 +08:00
hujun5 1bf4198556 irq: remove g_cpu_nestcount in restore_critical_section
because 'g_cpu_nestcount[me] > 0' will never happen, in this place

test:
We can use qemu for testing.
compiling
make distclean -j20; ./tools/configure.sh -l qemu-armv8a:nsh_smp ;make -j20
running
qemu-system-aarch64 -cpu cortex-a53 -smp 4 -nographic -machine virt,virtualization=on,gic-version=3 -net none -chardev stdio,id=con,mux=on -serial chardev:con -mon chardev=con,mode=readline -kernel ./nuttx

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-07-02 03:02:32 +08:00
hujun5 f6a9e91057 irq: remove restore_critical_section in irq
Only in the non-critical region, nuttx can the respond to the irq and not hold the lock
When returning from the irq, there is no need to check whether the lock needs to be restored

test:
We can use qemu for testing.
compiling
make distclean -j20; ./tools/configure.sh -l qemu-armv8a:nsh_smp ;make -j20
running
qemu-system-aarch64 -cpu cortex-a53 -smp 4 -nographic -machine virt,virtualization=on,gic-version=3 -net none -chardev stdio,id=con,mux=on -serial chardev:con -mon chardev=con,mode=readline -kernel ./nuttx

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-07-02 03:00:57 +08:00
buxiasen 7445c97c77 libc: scanf, printf %z change switch const to if
switch const will cause a switch_selector_expr_is_constant
warning catched by coverity.

Signed-off-by: buxiasen <buxiasen@xiaomi.com>
2024-07-02 02:57:00 +08:00
Marco Casaroli f5de966471 fix(esp32-qemu-openeth): allocate buffers in internal memory
When the PSRAM is enabled, we should not allocate the TX/RX
buffers there, so we use kmm_calloc here, to make it into IRAM,
so the ethernet controller can read bytes from it.
2024-07-02 02:56:33 +08:00
buxiasen b08d219849 mkstemp: permission 0666 to 0600
https://man7.org/linux/man-pages/man3/mkstemp.3.html
remove the read/write permission of other users for temp file

Signed-off-by: buxiasen <buxiasen@xiaomi.com>
2024-07-02 02:56:05 +08:00
Gabriel Aguilar 5cdd0230a8 [MIMXRT1020-EVK:I2C] Fix board I2C code to adapt to last IMXRT I2C/pinmux updates 2024-07-01 17:21:11 +08:00
p-szafonimateusz 0083ae1b2c boards/qemu-intel64: simplify STACKSIZE configuration
simplify STACKSIZE configuration by using CONFIG_DEFAULT_TASK_STACKSIZE

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-07-01 13:27:33 +08:00
p-szafonimateusz bd73a915bd arch/x86_64: add support for FMA, AVX-2 and AVX-512
add support for FMA, AVX-2 and AVX-512 instruction sets for x86_64

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-07-01 13:27:33 +08:00
p-szafonimateusz 2192d83200 arch/x86_64: add support for XSAVE/XRSTOR
Add support for XSAVE/XRSTOR to handle x86_64 procesor extended states.
Support for these instructions is required to support AVX instruction set

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-07-01 13:27:33 +08:00
p-szafonimateusz 66516918ce x86_64/irq.h: use 32bit operations in up_cpu_index()
Use 32bit operations for id field in intel64_cpu_s which is int type.

This fixes an error that appears when enabling some debug options:
  `Error: operand size mismatch for `movq'``

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-06-30 21:40:50 +08:00
chao an f857004227 fs/procfs: refine file backtrace
remove backtrace arrary in stack

Signed-off-by: chao an <anchao@lixiang.com>
2024-06-30 17:30:42 +08:00
xuxingliang c6d712df0e sched: move nxsched_dumponexit() to task_exithook
So the tcb->group still exists to dump files.

Signed-off-by: xuxingliang <xuxingliang@xiaomi.com>
2024-06-30 17:30:42 +08:00
yinshengkai 5a31d52fd8 files: add files_dumplist api, replace dumponexit implementation
Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
2024-06-30 17:30:42 +08:00
Xu Xingliang b0698daaa4 fs: tweak backtrace for file open
Signed-off-by: Xu Xingliang <xuxingliang@xiaomi.com>
2024-06-30 17:30:42 +08:00
halyssonJr 63a1b8d5a9 add support to drv8825 2024-06-30 13:30:36 +08:00
xuxin19 f8437d52b7 cmake:bugfix refine sim cmake redefine symbols
Signed-off-by: xuxin19 <xuxin19@xiaomi.com>
2024-06-29 17:59:54 -03:00
fangpeina 242b50f921 libc/execinfo: extract a common backtrace format function
Add a common method to format backtrace to buffer, so it can be used by both mm, fs and other possoble modules.

Signed-off-by: fangpeina <fangpeina@xiaomi.com>
2024-06-29 22:44:39 +08:00
Yanfeng Liu ed099f1cea riscv/k230: revise canmv230:nsbi
This revises ld-nuttsbi.script for easier use. It also adjusts
canmv230/nsbi to fit both k230d and k230 devices.

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-06-29 22:39:11 +08:00
chao an ab51eae836 libmetal/atomic: enable 64-bit atomic by toolchain builtin flags
Fix compile error:
arm-none-eabi-ld: (remoteproc_virtio.o): in function `metal_io_read':
metal/io.h:252: undefined reference to `__atomic_load_8'
arm-none-eabi-ld: (remoteproc_virtio.o): in function `metal_io_write':
metal/io.h:290: undefined reference to `__atomic_store_8'

Not all 32-bit architectures support 64bit atomic, gcc/clang
toolchains have built-in properties to indicate whether support atomic64:

| $ arm-none-eabi-gcc -march=armv7e-m  -dM -E - < /dev/null | grep SYNC
| #define __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1 1
| #define __GCC_HAVE_SYNC_COMPARE_AND_SWAP_2 1
| #define __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4 1

Signed-off-by: chao an <anchao@lixiang.com>
2024-06-29 22:38:48 +08:00
chao an ec150b21d9 Revert "Check whether 64-bit atomic is supported"
Signed-off-by: chao an <anchao@lixiang.com>
2024-06-29 22:38:48 +08:00
p-szafonimateusz 5ad03c833f boards/qemu-intel64: add SMP config
add SMP configuration with NCPUS=2 for qemu-intel64

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-06-29 22:37:48 +08:00
p-szafonimateusz 8220b169f3 arch/intel64: add SMP support
modified various intel64 files to support SMP

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-06-29 22:37:48 +08:00
p-szafonimateusz 8d4681a190 arch/intel64: add support for AP cores boot
Intel64 can now boot application cores which is needed for SMP

IMPORTANT: CONFIG_BOARD_LOOPSPERMSEC must be properly configured,
otherwise AP boot sequence can fail due too short delays during the AP startup

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-06-29 22:37:48 +08:00
p-szafonimateusz 961ade88fe arch/intel64: add support for inter-processor signaling
Add support for inter-processor signaling in x86_64 based on up_trigger_irq() interface.
Preparations for SMP.

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-06-29 12:57:37 +08:00
Huang Qi c66b0866e8 riscv_exception.c: Add missing comma in exception reasons array 2024-06-28 17:00:11 -03:00
Yanfeng Liu 28eaa08cbc arch/riscv: fix PMP in sbi_start()
This fixes PMP setting for open everything before going S-mode, which
has been broken since pull/12398.

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-06-28 21:30:53 +08:00