arch/x86_64: add MMU interface
add MMU api for x86_64 Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
This commit is contained in:
p-szafonimateusz
Xiang Xiao
parent
53d112fa95
commit
e0183927b4
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@ -16,8 +16,8 @@ choice
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config ARCH_INTEL64
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bool "Intel x86_64"
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select ARCH_HAVE_MPU
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select ARCH_USE_MPU
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select ARCH_HAVE_MMU
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select ARCH_USE_MMU
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select ARCH_HAVE_TICKLESS
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select ARCH_HAVE_STACKCHECK
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select ARCH_HAVE_RNG
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@ -558,6 +558,25 @@ static inline void set_pcid(uint64_t pcid)
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}
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}
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static inline void set_cr3(uint64_t cr3)
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{
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asm volatile("mov %0, %%cr3" : "=rm"(cr3) : : "memory");
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}
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static inline uint64_t get_cr3(void)
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{
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uint64_t cr3;
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asm volatile("mov %%cr3, %0" : "=rm"(cr3) : : "memory");
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return cr3;
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}
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static inline uint64_t get_pml4(void)
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{
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/* Aligned to a 4-KByte boundary */
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return get_cr3() & 0xfffffffffffff000;
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}
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static inline unsigned long read_msr(unsigned int msr)
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{
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uint32_t low;
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@ -41,4 +41,8 @@ if(CONFIG_ARCH_X86_64_ACPI)
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list(APPEND SRCS x86_64_acpi.c)
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endif()
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if(CONFIG_ARCH_USE_MMU)
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list(APPEND SRCS x86_64_mmu.c)
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endif()
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target_sources(arch PRIVATE ${SRCS})
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@ -32,3 +32,7 @@ endif
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ifeq ($(CONFIG_ARCH_X86_64_ACPI),y)
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CMN_CSRCS += x86_64_acpi.c
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endif
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ifeq ($(CONFIG_ARCH_USE_MMU),y)
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CMN_CSRCS += x86_64_mmu.c
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endif
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@ -0,0 +1,89 @@
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/****************************************************************************
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* arch/x86_64/src/common/addrenv.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __ARCH_X86_64_SRC_COMMON_ADDRENV_H
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#define __ARCH_X86_64_SRC_COMMON_ADDRENV_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <sys/types.h>
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#include <stdint.h>
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#include "x86_64_internal.h"
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#ifdef CONFIG_ARCH_ADDRENV
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Aligned size of the kernel stack */
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#ifdef CONFIG_ARCH_KERNEL_STACK
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# define ARCH_KERNEL_STACKSIZE STACK_ALIGN_UP(CONFIG_ARCH_KERNEL_STACKSIZE)
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#endif
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/* Base address for address environment */
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#if CONFIG_ARCH_TEXT_VBASE != 0
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# define ARCH_ADDRENV_VBASE (CONFIG_ARCH_TEXT_VBASE)
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#else
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# define ARCH_ADDRENV_VBASE (CONFIG_ARCH_DATA_VBASE)
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#endif
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/* Maximum user address environment size */
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#define ARCH_ADDRENV_MAX_SIZE (0x40000000)
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/* User address environment end */
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#define ARCH_ADDRENV_VEND (ARCH_ADDRENV_VBASE + ARCH_ADDRENV_MAX_SIZE - 1)
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/* Flags for kernel page tables */
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#define MMU_KPGT_FLAGS (X86_PAGE_WR)
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/* Mark user memory if in kernel build */
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#ifndef CONFIG_BUILD_KERNEL
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# define MMU_USER_DEFAULT (X86_PAGE_USER)
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#else
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# define MMU_USER_DEFAULT (0)
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#endif
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/* Flags for user page tables */
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#define MMU_UPGT_FLAGS (X86_PAGE_WR | MMU_USER_DEFAULT)
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/* Flags for user FLASH (RX) and user RAM (RW) */
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#define MMU_UDATA_FLAGS (X86_PAGE_WR | MMU_USER_DEFAULT)
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#define MMU_UTEXT_FLAGS (X86_PAGE_WR | MMU_USER_DEFAULT)
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/****************************************************************************
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* Public Function Prototypes
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****************************************************************************/
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#endif /* CONFIG_ARCH_ADDRENV */
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#endif /* __ARCH_X86_64_SRC_COMMON_ADDRENV_H */
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@ -0,0 +1,146 @@
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/****************************************************************************
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* arch/x86_64/src/common/x86_64_mmu.c
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <nuttx/arch.h>
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#include "x86_64_internal.h"
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#include "x86_64_mmu.h"
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: mmu_ln_setentry
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*
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* Description:
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* Set a level n translation table entry.
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*
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* Input Parameters:
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* ptlevel - The translation table level, amount of levels is
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* MMU implementation specific
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* lnvaddr - The virtual address of the beginning of the page table at
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* level n
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* paddr - The physical address to be mapped
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* vaddr - The virtual address to be mapped
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* mmuflags - The MMU flags to use in the mapping.
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*
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****************************************************************************/
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void mmu_ln_setentry(uint32_t ptlevel, uintptr_t lnvaddr, uintptr_t paddr,
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uintptr_t vaddr, uint32_t mmuflags)
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{
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uintptr_t *lntable = (uintptr_t *)lnvaddr;
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uint32_t index;
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DEBUGASSERT(ptlevel >= 0 && ptlevel < X86_MMU_PT_LEVELS);
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/* Make sure the entry is valid */
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mmuflags |= X86_PAGE_PRESENT;
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/* Calculate index for lntable */
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index = X86_MMU_VADDR_INDEX(vaddr, ptlevel);
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/* Save it */
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lntable[index] = (paddr | mmuflags);
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/* Update with memory by flushing the cache(s) */
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up_invalid_tlb(vaddr, vaddr + 1);
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}
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/****************************************************************************
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* Name: mmu_ln_getentry
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*
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* Description:
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* Get a level n translation table entry.
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*
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* Input Parameters:
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* ptlevel - The translation table level, amount of levels is
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* MMU implementation specific
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* lnvaddr - The virtual address of the beginning of the page table at
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* level n
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* vaddr - The virtual address to get pte for
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*
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****************************************************************************/
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uintptr_t mmu_ln_getentry(uint32_t ptlevel, uintptr_t lnvaddr,
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uintptr_t vaddr)
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{
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uintptr_t *lntable = (uintptr_t *)lnvaddr;
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uint32_t index;
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DEBUGASSERT(ptlevel >= 0 && ptlevel < X86_MMU_PT_LEVELS);
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index = X86_MMU_VADDR_INDEX(vaddr, ptlevel);
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return lntable[index];
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}
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/****************************************************************************
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* Name: mmu_ln_map_region
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*
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* Description:
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* Set a translation table region for level n
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*
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* Input Parameters:
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* ptlevel - The translation table level, amount of levels is
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* MMU implementation specific
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* lnvaddr - The virtual address of the beginning of the page table at
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* level n
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* paddr - The physical address to be mapped
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* vaddr - The virtual address to be mapped
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* size - The size of the region in bytes
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* mmuflags - The MMU flags to use in the mapping.
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*
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****************************************************************************/
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void mmu_ln_map_region(uint32_t ptlevel, uintptr_t lnvaddr, uintptr_t paddr,
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uintptr_t vaddr, size_t size, uint32_t mmuflags)
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{
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uintptr_t end_paddr = paddr + size;
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size_t page_size = X86_MMU_PAGE_SIZE;
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DEBUGASSERT(ptlevel >= 0 && ptlevel < X86_MMU_PT_LEVELS);
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while (paddr < end_paddr)
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{
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mmu_ln_setentry(ptlevel, lnvaddr, paddr, vaddr, mmuflags);
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paddr += page_size;
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vaddr += page_size;
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}
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}
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@ -0,0 +1,178 @@
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/****************************************************************************
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* arch/x86_64/src/common/x86_64_mmu.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __ARCH_X86_64_SRC_COMMON_X86_64_MMU_H
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#define __ARCH_X86_64_SRC_COMMON_X86_64_MMU_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <nuttx/arch.h>
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* 4 level paging, 4K pages */
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#define X86_MMU_PT_LEVELS 4
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#define X86_MMU_PAGE_SHIFT 12
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#define X86_MMU_PAGE_SIZE (1 << X86_MMU_PAGE_SHIFT)
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#define X86_MMU_ENTRIES_PER_PGT (X86_MMU_PAGE_SIZE / 8)
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/* Get virtual address shift for a given paging level.
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* NOTE: in this implementation PTL4 has index 0, PT has index 3 !
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*/
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#define X86_MMU_PADDR_SHIFT 12
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#define X86_MMU_VPN_WIDTH 9
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#define X86_MMU_VPN_MASK ((1 << X86_MMU_VPN_WIDTH) - 1)
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#define X86_MMU_VADDR_SHIFT(n) (X86_MMU_PADDR_SHIFT + X86_MMU_VPN_WIDTH * \
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(X86_MMU_PT_LEVELS - ((n) + 1)))
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/* Get index in a given page table level for a given virtual address */
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#define X86_MMU_VADDR_INDEX(vaddr, ptlevel) \
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((vaddr >> X86_MMU_VADDR_SHIFT(ptlevel)) & X86_MMU_VPN_MASK)
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/****************************************************************************
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* Public Function Prototypes
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****************************************************************************/
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/****************************************************************************
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* Name: mmu_cr3_reg
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*
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* Description:
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* Utility function to build cr3 register value for input parameters
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*
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* Input Parameters:
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* pgbase - The physical base address of the translation table base
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* asid - Address space identifier. Not used now.
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*
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****************************************************************************/
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static inline uintptr_t mmu_cr3_reg(uintptr_t pgbase, uint16_t asid)
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{
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uintptr_t reg;
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UNUSED(asid);
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reg = pgbase;
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return reg;
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}
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/****************************************************************************
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* Name: mmu_pte_to_paddr
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*
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* Description:
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* Extract physical address from PTE
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*
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* Input Parameters:
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* pte - Page table entry
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*
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* Returned Value:
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* Physical address from PTE
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*
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****************************************************************************/
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static inline uintptr_t mmu_pte_to_paddr(uintptr_t pte)
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{
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uintptr_t paddr = 0;
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if (pte & X86_PAGE_PRESENT)
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{
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paddr = pte;
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/* Get page addres - remove flags */
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paddr &= 0x0dfffffffffff000;
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}
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return paddr;
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}
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/****************************************************************************
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* Name: mmu_ln_setentry
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*
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* Description:
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* Set a level n translation table entry.
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*
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* Input Parameters:
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* ptlevel - The translation table level, amount of levels is
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* MMU implementation specific
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* lnvaddr - The virtual address of the beginning of the page table at
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* level n
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* paddr - The physical address to be mapped. Must be aligned to a PPN
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* address boundary which is dependent on the level of the entry
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* vaddr - The virtual address to be mapped. Must be aligned to a PPN
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* address boundary which is dependent on the level of the entry
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* mmuflags - The MMU flags to use in the mapping.
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*
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****************************************************************************/
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void mmu_ln_setentry(uint32_t ptlevel, uintptr_t lnvaddr, uintptr_t paddr,
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uintptr_t vaddr, uint32_t mmuflags);
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/****************************************************************************
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* Name: mmu_ln_getentry
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*
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* Description:
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* Get a level n translation table entry.
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*
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* Input Parameters:
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* ptlevel - The translation table level, amount of levels is
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* MMU implementation specific
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* lnvaddr - The virtual address of the beginning of the page table at
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* level n
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* vaddr - The virtual address to get pte for. Must be aligned to a PPN
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* address boundary which is dependent on the level of the entry
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*
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****************************************************************************/
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uintptr_t mmu_ln_getentry(uint32_t ptlevel, uintptr_t lnvaddr,
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uintptr_t vaddr);
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/****************************************************************************
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* Name: mmu_ln_map_region
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*
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* Description:
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* Set a translation table region for level n
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*
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* Input Parameters:
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* ptlevel - The translation table level, amount of levels is
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* MMU implementation specific
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* lnvaddr - The virtual address of the beginning of the page table at
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* level n
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* paddr - The physical address to be mapped. Must be aligned to a PPN
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* address boundary which is dependent on the level of the entry
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* vaddr - The virtual address to be mapped. Must be aligned to a PPN
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* address boundary which is dependent on the level of the entry
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* size - The size of the region in bytes
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* mmuflags - The MMU flags to use in the mapping.
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*
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****************************************************************************/
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void mmu_ln_map_region(uint32_t ptlevel, uintptr_t lnvaddr, uintptr_t paddr,
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uintptr_t vaddr, size_t size, uint32_t mmuflags);
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#endif /* __ARCH_X86_64_SRC_COMMON_X86_64_MMU_H */
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