A race currently exists in IPC completion code. When processing the
pipeline TRIG_START command on timer-domain pipelines, processing is
postponed to the pipeline task. Usually the IPC task continues and
completes before the pipeline task. The IPC task notes, that the
command is processed in the pipeline context and doesn't send a
reply to the host. Then the pipeline task executes the command and
notifies the host.
However, occasionally the timer interrupt occurs while the IPC task
is still active. It will start processing the IPC command in the
pipeline context and reply to the host. The host then can send the
next IPC command before the IPC task in the firmware has completed.
This then produces an error trace:
ERROR schedule_edf_task(), task already queued or running 3
and the IPC is dropped.
This commit fixes the race by making sure in asynchronous cases the
last of the two contexts notifies the host.
BugLink: https://github.com/thesofproject/sof/issues/4706
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Recently merged rework of multicore support in Zephyr has
broken builds with XCC. Disable XCC based builds in CI until
issue is resolved in Zephyr mainline. Issue tracked as:
https://github.com/zephyrproject-rtos/zephyr/issues/38349
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
The implementation does not take the state of both directions into
consideration. If host opens both TX/RX PCM devices then close one PCM
device, the ssp driver will close the mclk/bclk immediately regardless
the state of the other PCM device.
Signed-off-by: Brent Lu <brent.lu@intel.com>
The code to control bclk/mclk is skipped after the SSP is configured
once. The clock control code should be executed always.
Signed-off-by: Brent Lu <brent.lu@intel.com>
Buffers can be shared between cores and it is crucial to have access
to not only proper buffer data but also description data of this buffer
Signed-off-by: Adrian Bonislawski <adrian.bonislawski@linux.intel.com>
The initialisation delay in SSP start-up sequence is only needed when
the first stream initialises the SSP. If an SSP port is used for both
playback and capture, the second stream doesn't need to delay start
up again.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Trace prints often contain open-coded function names in them. When
functions get renamed or trace prints are moved to other functions,
those strings sometimes are forgotten. Fix two such cases.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
comp_set_state() always sets the component state to requested
state, which is calculated at the top of the function. Re-use the
variable instead of hard-coding each value again. Also return
immediately in case of errors, which eliminates the need for the
return code variable.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
When the firmware receives a START or RELEASE IPC message, it
immediately triggers all involved components, which starts DMA.
Then it schedules the pipeline task, but since the scheduler can be
already running at that time, the task might be scheduled when DMA
data isn't available yet or has already overflowed. To fix this
change the control flow to also trigger all components from the task
during its first run. Actual data processing then begins with the
next period. Note, that this is currently only possible with
pipelines, using timer-based scheduling. Pipelines, using DMA
interrupts for scheduling are unaffected.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Some DAI devices need a delay between their PRE_START and START
trigger commands, and similarly between PRE_RELEASE and RELEASE.
Add a DAI driver operation to get that delay time and use it between
the two commands.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
The SSP trigger handler has a potentially long delay when processing
START and RELEASE triggers. Split off an early start trigger to
extract that delay out of the SSP driver into the trigger state
machine.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Some DAI drivers have to perform additional preparatory operations
before START and RELEASE triggers, pass PRE_* triggers down to
them for that purpose.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
We need to split the START trigger command into two commands because
some components have a long delay inside their START handling. This
patch introduces two new trigger commands: PRE_START and
PRE_RELEASE and a new state PRE_ACTIVE to prepare for that split.
For simmetry POST_STOP and POST_PAUSE are also added, however they
aren't used yet.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Unused values, save a bit of text and data space by cleaning this up.
Suggested-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Signed-off-by: Curtis Malainey <cujomalainey@chromium.org>
Added singular value decomposition algorithm
for diagonal matrix calculation. Added filters for side
lobe artifacts.
Signed-off-by: ShriramShastry <malladi.sastry@intel.com>
The mdivctrl register is corrupted when disabling MCLK divider in
mn_release_mclk() function. It could overwrite bclk's source clock and
stop the clock running.
Signed-off-by: Brent Lu <brent.lu@intel.com>
mixin & mixout work together to achieve the function of
mixer in current sof. This patch convert mixin & mixout
messages to mixer messages and let's mixer do their
task.
Signed-off-by: Rander Wang <rander.wang@intel.com>
COMPILER_WORKAROUND_CACHE_ATTR is also enabled on Zephyr,
but the cache_attr.c file is not compiled since is not added in
zephyr_library_sources.
Without this fix, we get:
cache.h:110: undefined reference to `glb_is_cached'
I've added the file for all platforms since cache_attr.c is generic.
Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
sof_heap variable is used by all platform, with or
without ENABLE_CACHED_HEAP.
Without this fix, on i.MX with Zephyr we get:
error: 'sof_heap' undeclared (first use in this function);
Fixes: fed69b6a34 ("zephyr: wrapper: disable cached heap on Intel platforms")
Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
This patch adds topologies sof-apl-nocodec-demux-eq-2ch4ch.tplg and
sof-apl-nocodec-demux-eq-4ch4ch.tplg. Playback of 2ch creates 4ch
output in format L_lo, L_hi, R_lo, and R_hi. An example band-split
at 2 kHz is configured for EQ processing. The low band contains
an additional 80 Hz high-pass.
The pipeline was tested in UP2 device. The nocodec topology enables
an useful SPP loopback mode. The capture PCM is connected to DAI
loopback so this pipeline can be tested with simultaneous 2ch aplay
and 4ch arecord.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
Also add a simple pipeline used by windows. A normal
playback pipeline is : copier -> mixin -> mixout -> gain -> copier
Signed-off-by: Rander Wang <rander.wang@intel.com>
We care about other build errors more.
This also makes it easier to test locally that "west build" does not
depend on rimage to create zephyr.elf
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
This is motivated by the zephyr.elf build that does not need rimage at
all.
Also build smex later, only when it's needed.
After building and deleting the rimage/ clone, a plain SOF clean +
RE-build now fails much later: it now fails AFTER successfully building
the sof binary, only when it tries to build either bootloader,
boot_module or base_module that actually need rimage:
[ 87%] Performing configure step for 'rimage_ep'
CMake Error: The source directory "/home/SOF/sof/rimage" does not appear
to contain CMakeLists.txt.
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
Inline rimage/src/include/rimage/sof/kernel/ext_manifest.h version
9716e10a3e into sof/src/include/kernel/ext_manifest.h instead
of #including it.
This makes it possible to build zephyr.elf without rimage and unblocks
SOF uprev https://github.com/zephyrproject-rtos/zephyr/pull/37250
See also similar copy in https://github.com/zephyrproject-rtos/sof/pull/7
The duplication is OK because it is part of a versioned ABI and is
already duplicated in the Linux kernel tree anyway.
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
The DMA trace is not necessary enabled so the trace_data could be NULL,
add check to avoid dereference from NULL pointer and panics.
Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
If the log tracing (e.g. tr_err()) is called before the trace itself is
available, the FW will crash and FW boot fail happen.
Enable the trace after it is ready, and don't try to perform tracing
when it is unavailable.
We have the empty version of trace_init/on(), so the extra "#ifdef" in
primary_core_init() is superfluous.
Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
Tests with dynamic-pipeline topologies increase the complexity
of alloc/free patterns for heap and these tests have uncovered
new issues with heap corruption. Tests are reporting failed
allocs although heap still has free space. Running same test
with cached heap disabled shows no failures.
The cached heap is already disabled for IMX targets, so build on
this code and add a local ENABLE_CACHED_HEAP define to toggle
the cached heap.
BugLink: https://github.com/thesofproject/sof/issues/4494
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
This patch optimizes for speed of DRC with cordic sine function
usage in both HiFi3 and generic manners.
Signed-off-by: Pin-chih Lin <johnylin@google.com>
This patch fixes the check in crossover, dcblock, drc, eq, mixer,
multiband drc, selector, and volume components. The check should
be for 1 period of data.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
This reverts May 2020 commit a2de860f42 ("cmake: fix tools build
with submodules") that added a dependency on rimage for the entire
`tools/` subdirectory, probably because `smex/ldc.h` included
`rimage/fw.h` (removed in previous commit).
Looking at the code review I can see no apparent attempt to understand
anything, not even a quote of a build error message.
This will hopefully unblock
https://github.com/zephyrproject-rtos/zephyr/pull/37250
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
If the -Werr build does not fail then it's not needed.
The very first `#include fw.h` in `smex/ldc.h` was added in April 2020
in giant commit 36929ae1b7 ("smex: Create new tool to build ldc
file") so there is no trace of why that `fw.h` dependency was ever
needed.
Because `fw.h` was then moved to rimage, this is indirectly making the
entire `tools/` directory depending on `rimage` - fixed in the next
commit.
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
The latest zephyr requires CMake version >= 3.20,
we have to update the docker image to meet the
requirement.
Signed-off-by: Chao Song <chao.song@linux.intel.com>
This patch adds the missing NHLT blob support for Sue Creek type
of DMIC HW (v2). Previously the HW v1 type decoding of the blob
would have returned wrong DAI parameters and streaming fail.
Checks are added to verify correct usage of bitfields in OUTCONTROL,
CIC_CONTROL, and FIR_CONTROL. These registers are different in HW v1
and v2.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
This patch replaces the TIE bitfield get by SIP bitfield get. The
mistake impacted DAI debug trace print.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
The BSS usage exceeds available memory when building for
APL/cavs15 hardware with XCC, so disable it for now. Issue
tracked as https://github.com/thesofproject/sof/issues/4645
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
It is observed that on different platforms, the LLI need to be aligned
different, e.g. it is 128 Bytes on TGL, otherwise, the LLI struct might
be clobbered and the DMA channel might get unexpected stopped, which
will eventually lead to Xrun.
Here make the LLI alignment to platform specific and use 128 Bytes for
TGL.
Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
Guennadi Liakhovetski