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multiband_drc: Add switch control for enabling DRC 

Add mixer type control switch for enabling/disabling DRC.

Signed-off-by: Pin-chih Lin <johnylin@google.com>
This commit is contained in:
Pin-chih Lin 2021-08-12 15:15:18 +08:00 committed by Liam Girdwood
parent d3381eaa13
commit 541e070eec
5 changed files with 81 additions and 6 deletions
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57
src/audio/multiband_drc/multiband_drc.c
View File

@ -258,6 +258,7 @@ static struct comp_dev *multiband_drc_new(const struct comp_driver *drv,
comp_set_drvdata(dev, cd);
cd->process_enabled = false;
cd->multiband_drc_func = NULL;
cd->crossover_split = NULL;
@ -338,6 +339,29 @@ static int multiband_drc_cmd_get_data(struct comp_dev *dev,
return ret;
}
static int multiband_drc_cmd_get_value(struct comp_dev *dev,
struct sof_ipc_ctrl_data *cdata)
{
struct multiband_drc_comp_data *cd = comp_get_drvdata(dev);
int j;
switch (cdata->cmd) {
case SOF_CTRL_CMD_SWITCH:
comp_dbg(dev, "multiband_drc_cmd_get_value(), SOF_CTRL_CMD_SWITCH");
for (j = 0; j < cdata->num_elems; j++)
cdata->chanv[j].value = cd->process_enabled;
if (cdata->num_elems == 1)
return 0;
comp_warn(dev, "multiband_drc_cmd_get_value() warn: num_elems should be 1, got %d",
cdata->num_elems);
return 0;
default:
comp_err(dev, "multiband_drc_cmd_get_value() error: invalid cdata->cmd");
return -EINVAL;
}
}
static int multiband_drc_cmd_set_data(struct comp_dev *dev,
struct sof_ipc_ctrl_data *cdata)
{
@ -358,6 +382,30 @@ static int multiband_drc_cmd_set_data(struct comp_dev *dev,
return ret;
}
static int multiband_drc_cmd_set_value(struct comp_dev *dev,
struct sof_ipc_ctrl_data *cdata)
{
struct multiband_drc_comp_data *cd = comp_get_drvdata(dev);
switch (cdata->cmd) {
case SOF_CTRL_CMD_SWITCH:
comp_dbg(dev, "multiband_drc_cmd_set_value(), SOF_CTRL_CMD_SWITCH");
if (cdata->num_elems == 1) {
cd->process_enabled = cdata->chanv[0].value;
comp_info(dev, "multiband_drc_cmd_set_value(), process_enabled = %d",
cd->process_enabled);
return 0;
}
comp_err(dev, "multiband_drc_cmd_set_value() error: num_elems should be 1, got %d",
cdata->num_elems);
return -EINVAL;
default:
comp_err(dev, "multiband_drc_cmd_set_value() error: invalid cdata->cmd");
return -EINVAL;
}
}
static int multiband_drc_cmd(struct comp_dev *dev, int cmd, void *data, int max_data_size)
{
struct sof_ipc_ctrl_data *cdata = ASSUME_ALIGNED(data, 4);
@ -372,6 +420,12 @@ static int multiband_drc_cmd(struct comp_dev *dev, int cmd, void *data, int max_
case COMP_CMD_GET_DATA:
ret = multiband_drc_cmd_get_data(dev, cdata, max_data_size);
break;
case COMP_CMD_SET_VALUE:
ret = multiband_drc_cmd_set_value(dev, cdata);
break;
case COMP_CMD_GET_VALUE:
ret = multiband_drc_cmd_get_value(dev, cdata);
break;
default:
comp_err(dev, "multiband_drc_cmd(), invalid command");
ret = -EINVAL;
@ -475,7 +529,7 @@ static int multiband_drc_prepare(struct comp_dev *dev)
comp_dbg(dev, "multiband_drc_prepare(), source_format=%d, sink_format=%d",
cd->source_format, cd->source_format);
cd->config = comp_get_data_blob(cd->model_handler, NULL, NULL);
if (cd->config) {
if (cd->config && cd->process_enabled) {
ret = multiband_drc_setup(cd, sourceb->stream.channels, sourceb->stream.rate);
if (ret < 0) {
comp_err(dev, "multiband_drc_prepare() error: multiband_drc_setup failed.");
@ -497,6 +551,7 @@ static int multiband_drc_prepare(struct comp_dev *dev)
goto err;
}
} else {
comp_info(dev, "multiband_drc_prepare(), DRC is in passthrough mode");
cd->multiband_drc_func = multiband_drc_find_proc_func_pass(cd->source_format);
if (!cd->multiband_drc_func) {
comp_err(dev, "multiband_drc_prepare(), No proc func passthrough");

1
src/include/sof/audio/multiband_drc/multiband_drc.h
View File

@ -37,6 +37,7 @@ struct multiband_drc_comp_data {
struct sof_multiband_drc_config *config; /**< pointer to setup blob */
bool config_ready; /**< set when fully received */
enum sof_ipc_frame source_format; /**< source frame format */
bool process_enabled; /**< true if component is enabled */
multiband_drc_func multiband_drc_func; /**< processing function */
crossover_split crossover_split; /**< crossover n-way split func */
};

1
tools/topology/topology1/CMakeLists.txt
View File

@ -144,6 +144,7 @@ set(TPLGS
"sof-tgl-max98357a-rt5682\;sof-tgl-max98357a-rt5682\;-DCODEC=MAX98357A\;-DFMT=s16le\;-DPLATFORM=tgl\;-DAMP_SSP=1"
"sof-tgl-max98357a-rt5682\;sof-adl-max98357a-rt5682\;-DCODEC=MAX98357A\;-DFMT=s16le\;-DPLATFORM=adl\;-DAMP_SSP=2"
"sof-tgl-max98357a-rt5682\;sof-tgl-max98357a-rt5682-pdm1\;-DCODEC=MAX98357A\;-DFMT=s16le\;-DDMIC_DAI_LINK_16k_PDM=STEREO_PDM1\;-DPLATFORM=tgl\;-DAMP_SSP=1"
"sof-tgl-max98357a-rt5682\;sof-tgl-max98357a-rt5682-pdm1-drceq\;-DCODEC=MAX98357A\;-DFMT=s16le\;-DDMIC_DAI_LINK_16k_PDM=STEREO_PDM1\;-DPLATFORM=tgl\;-DAMP_SSP=1\;-DDRC_EQ"
"sof-tgl-max98357a-rt5682\;sof-tgl-rt1011-rt5682\;-DCODEC=RT1011\;-DFMT=s24le\;-DPLATFORM=tgl\;-DAMP_SSP=1"
"sof-tgl-max98357a-rt5682\;sof-tgl-max98357a-rt5682-rtnr\;-DCODEC=MAX98357A\;-DFMT=s16le\;-DPLATFORM=tgl\;-DAMP_SSP=1\;-DCHANNELS=2\;-DDMICPROC=eq-iir-volume\;-DRTNR"
"sof-tgl-max98357a-rt5682-rtnr-16kHz\;sof-tgl-max98357a-rt5682-rtnr-16kHz\;-DCODEC=MAX98357A\;-DFMT=s16le\;-DCHANNELS=2\;-DDMICPROC=eq-iir-volume\;-DRTNR"

3
tools/topology/topology1/m4/multiband_drc.m4
View File

@ -60,6 +60,9 @@ define(`W_MULTIBAND_DRC',
` bytes ['
$6
` ]'
` mixer ['
$7
` ]'
`}')
divert(0)dnl

25
tools/topology/topology1/sof/pipe-drc-eq-volume-demux-playback.m4
View File

@ -44,17 +44,30 @@ C_CONTROLBYTES(MY_MULTIBAND_DRC_CTRL, PIPELINE_ID,
,
MULTIBAND_DRC_priv)
# DRC Enable switch
define(MY_MULTIBAND_DRC_ENABLE, concat(`multiband_drc_enable_', PIPELINE_ID))
define(`CONTROL_NAME', `MY_MULTIBAND_DRC_ENABLE')
C_CONTROLMIXER(MY_MULTIBAND_DRC_ENABLE, PIPELINE_ID,
CONTROLMIXER_OPS(volsw, 259 binds the mixer control to switch get/put handlers, 259, 259),
CONTROLMIXER_MAX(max 1 indicates switch type control, 1),
false,
,
Channel register and shift for Front Center,
LIST(` ', KCONTROL_CHANNEL(FC, 3, 0)),
"1")
undefine(`CONTROL_NAME')
# EQ IIR Bytes control
define(EQIIR_priv, concat(`eq_iir_bytes_', PIPELINE_ID))
define(DEF_EQIIR_PRIV, concat(`eq_iir_bytes_', PIPELINE_ID))
define(MY_EQIIR_CTRL, concat(`eq_iir_control_', PIPELINE_ID))
include(`eq_iir_coef_drceq.m4')
include(`eq_iir_coef_pass.m4')
C_CONTROLBYTES(MY_EQIIR_CTRL, PIPELINE_ID,
CONTROLBYTES_OPS(bytes, 258 binds the control to bytes get/put handlers, 258, 258),
CONTROLBYTES_EXTOPS(258 binds the control to bytes get/put handlers, 258, 258),
, , ,
CONTROLBYTES_MAX(, 1024),
,
EQIIR_priv)
DEF_EQIIR_PRIV)
# Volume Mixer control with max value of 32
C_CONTROLMIXER(Master Playback Volume, PIPELINE_ID,
@ -88,7 +101,8 @@ W_PCM_PLAYBACK(PCM_ID, DRC EQ Playback, 2, 0, SCHEDULE_CORE)
# "MULTIBAND_DRC" has 2 sink periods and 2 source periods
W_MULTIBAND_DRC(0, PIPELINE_FORMAT, 2, 2, SCHEDULE_CORE,
LIST(` ', "MY_MULTIBAND_DRC_CTRL"))
LIST(` ', "MY_MULTIBAND_DRC_CTRL"),
LIST(` ', "MY_MULTIBAND_DRC_ENABLE"))
# "EQ IIR" has x sink period and 2 source periods
W_EQ_IIR(0, PIPELINE_FORMAT, 2, 2, SCHEDULE_CORE,
@ -153,6 +167,7 @@ PCM_CAPABILITIES(DRC EQ Playback PCM_ID, CAPABILITY_FORMAT_NAME(PIPELINE_FORMAT)
undefine(`DEF_PGA_TOKENS')
undefine(`DEF_PGA_CONF')
undefine(`MY_EQIIR_CTRL')
undefine(`EQIIR_priv')
undefine(`DEF_EQIIR_PRIV')
undefine(`MY_MULTIBAND_DRC_ENABLE')
undefine(`MY_MULTIBAND_DRC_CTRL')
undefine(`MULTIBAND_DRC_priv')