Fixes handling of level 1 interrupts by slave cores.
Level 1 interrupts are handled by UserVector, which
for slave cores was set by default to ROM location.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
This patch adds processing functions for S16_LE and S24_4LE data.
Existing support was only S32_LE. The lower word length filters are
executed with 32 bit algorithm core with left shifted input to keep the
data in MSB side. The output is shifted, rounded and saturated to the
lower precision.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
Adds implementation for IDC_COMP_CMD message.
It allows to get and set component commands
for the components executed on slave cores.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Different handling of TIMER3 for cAVS platforms.
Now we are operating on irq masks on core level,
not on the timer level. It gives us opportunity
to implement multicore work queue.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Removes clock microseconds handling for scheduling
and work queue. In case of some clocks it is causing
too much of a drift in cycles. We still pass every
delay in microseconds, but handle it as milliseconds.
Microseconds are needed to get delays less then 1 ms.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Declare log_entry structures that are linked to .static_log_entries
section of ELF.
trace_event macros extended to accept additional arguments and unconfined
number of characters.
Signed-off-by: ArturX Kloniecki <arturx.kloniecki@linux.intel.com>
Adds possibility for interrupt handler to decide,
whether it wants to manually handle unmasking irq
or have it done automatically.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Simplifies idc_pipeline_trigger function by reading
component data directly from IPC buffer. This way
we don't need to send unneeded data through IDC.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
The CONFIG_DMA_GW only enable with hda_dma, as the create_local_elems is
refined to create elem at every start. Did not need to keep the first
elem.
Use list_for_item_safe to delete all item in list. The old way will
delete and free the list header with belongs to the host_data. Free
the list header will directly free host_data and make the second run
fail if the memory is alloced again.
Signed-off-by: Pan Xiuli <xiuli.pan@linux.intel.com>
Remove freeing of config data in reset. If pm is
not enabled, stopping the stream causes component
reset in firmware. When you start a new stream the
eq parameters are gone and defaults will be used.
When pm is enabled this is not a problem because
component is recreated from swidget in kernel side.
Signed-off-by: Jaska Uimonen <jaska.uimonen@intel.com>
There will be new task added in schedule_edf function, refine the
function to handle multiple task.
Signed-off-by: Pan Xiuli <xiuli.pan@linux.intel.com>
list_item_for_safe is safe for item deletion, but when a new item is
appended to the list. It seems the item could not be go through.
To fix this limitation, move interrupt clear to make sure every IRQ is
handled.
Do not try to handle two task with one IRQ handler.
Signed-off-by: Pan Xiuli <xiuli.pan@linux.intel.com>
It is caused by the change of removing dai waiting after stop.
dma should not be stopped in dai_comp_trigger if HW LLI is not
enable. At this time DMA is still working and it can't be stopped
DMA engine would stop the channel automatically after each transfer.
So just query channel status to stop dma on BYT
Signed-off-by: Pan Xiuli <xiuli.pan@linux.intel.com>
Signed-off-by: Rander Wang <rander.wang@linux.intel.com>
Pan Xiuli