"tree" is very useful but it's not critical, not worth failing the build
for.
Also remove a single quote from the help message as it breaks parsing
in one simple editor I use (jed) and possibly others.
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
We plan to test the CI test topology on ADL-P nocodec device, so
add the topology build support in cmake list.
Signed-off-by: Zhang Keqiao <keqiao.zhang@intel.com>
there is no s32c1i instructions in mt8195.
it will use exclusive instructions.
(XCHAL_HAVE_EXCLUSIVE is defined in core-isa.h)
Select CONFIG_XTENSA_EXCLUSIVE by default for mt8195.
Signed-off-by: YC Hung <yc.hung@mediatek.com>
Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
Without CMP0079 we cannot conditionally include libraries against SOF in
sub directories without seriously restructuring the project. This is
because the old policy requires the link target must be created in the
same folder. This does not work well from a configuration standpoint for
3P audio libraries trying to keep their config in src/audio/*. Rather
than enable the policy, lets simply upgrade since 3.13 is widely
available.
With this upgrade we can also remove the two version dependent checks at
the top of our scripts.
Signed-off-by: Curtis Malainey <cujomalainey@chromium.org>
Removes the files added to build system by mistake.
Signed-off-by: YC Hung <yc.hung@mediatek.com>
Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
For GCC compile error,
error: variable 'ret' set but not use
Signed-off-by: YC Hung <yc.hung@mediatek.com>
Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
In mp_asm.S, if XCHAL_HAVE_EXCLUSIVE is defined,
it will use exclusive instructions,
else it will use s32c1i instructions.
It supports S32C1I and exclusive instruction in xthal_compare_and_set() API.
Refer to xtos-simc-mutex.c, xtos_mutex_p structure is similar to spinlock_t.
For dsp design, we cannot use s32c1i intrcutions in mt8195.
In order to not affect other platform, add CONFIG_XTENSA_EXCLUSIVE and __XCC__
compile options.
Signed-off-by: YC Hung <yc.hung@mediatek.com>
Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
This results in a compiler error
when xtensa configuration has no IRQ level 5.
Make it use core-isa.h.
Error:
invalid register 'EPC5' for 'rsr' instruction
Error:
invalid register 'EPS5' for 'rsr' instruction
For mt8195, we don't support those instrucations
Signed-off-by: YC Hung <yc.hung@mediatek.com>
Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
This is needed by CI to clone only once and then take control of the
iteration over platform builds. CI already does all that but by
copy/paste/diverge of this clone() function.
Once cloning Zephyr in CI code is de-duplicated and uses this new
clone-only feature instead, it will be possible to submit any Zephyr
commit to SOF testing. In other words it will make failed attempt
https://github.com/thesofproject/sof/pull/4728 possible
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
Align to the new heap memory map and allocator, smaller SYSTEM and
RUNTIME zones are used on apollolake now.
Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
Make size of the buffer zone calculated at the linking stage, to make
full use of all HPSRAM memories.
Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
This reverts commit ffff0b0610.
Both heap and memmap->buffer are of type struct mm_heap so their
difference is already a number of struct mm_heap sized elements
between them. Dividing by sizeof(struct mm_heap) again is wrong.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Because we can. This would have caught this regression from
commit 287a5f9a2b ("ssp: mclk/bclk turned off unexpectedly")
-DEXTRA_CFLAGS is not very well documented but it is what Zephyr uses,
try `git -C zephyr grep -C 5 EXTRA_CFLAGS and see.
```
sof/src/drivers/intel/ssp/ssp.c: In function 'ssp_set_config_tplg':
sof/zephyr/include/sof/trace/trace.h:44:11: warning:
too many arguments for format [-Wformat-extra-args]
44 | printk("%llu: " format "\n", platform_timer_get(NULL), \
| ^~~~~~~~
...
sof/src/drivers/intel/ssp/ssp.c:763:4: note: in expansion of macro 'dai_info'
763 | dai_info(dai, "ssp_set_config(): hw_free stage:
ignore since there is still user", dai->index);
```
Using -Werror only in CI avoids slowing down developers with temporary
warnings they intend on fixing later (but before submission)
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
main() was growing too big. Zero functional change.
Also rename the too generic "build()" to build_all()
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
We have change the size of runtime_shared zone to be decided at link
stage, here hardcode HEAP_RUNTIME_SHARED_SIZE to unblock the Zephyr
building.
Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
246ea6469a config: skl: change image_size to the real SRAM size
9c9e07c650 config: kbl: change image_size to the real SRAM size
44b37d19a2 config: sue: change image_size to the real SRAM size
580e4d674e config: tgl-cavs: change image_size to the real SRAM size
Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
The allocator will return failure if the request size is too big, remove
the unsuitable check here.
Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
Not sure why they were intertwined, let's separate them out to avoid
git conflicts with integration.
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
This topology is used on GLK and TGL. variations include:
- DMIC supported on TGL and not on GLK
- TGL uses SSP0 instead of SSP2
APL support was added only based on user reports. This assumes the
same topology as GLK but was not tested.
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
The calculation 'heap - memmap->buffer + 1' is wrong and may lead to
index overflow when we have multiple buffer mm_heap, it should be
'(heap - memmap->buffer) / sizeof(struct mm_heap) + 1'.
Move the calculation to the end of the brace and make the logic simpler.
Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
Fixes "too many arguments for format [-Wformat-extra-args]" in recent
commit 287a5f9a2b ("ssp: mclk/bclk turned off unexpectedly")
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
All platform.c files contain timer objects, and some also arch_timers
and most platforms define those objects as global. Make them static.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
When an xrun occurs we currently stop the affected pipelines, which
also leads to stopping the pipeline task. However, the stream can be
using several pipelines, all of which have to be stopped. If not
stopped, tasks belonging to those pipelines will continue to be
scheduled. This patch collects all connected pipelines and stops them
all.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
The AFE is a audio hw interface on the mt8195 platform.
This commit brings the compile support for the AFE.
The audio front-end essentially consists of voice and audio data paths
Signed-off-by: YC Hung <yc.hung@mediatek.com>
Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
Add memif data for afe
Add common and regs header for afe
Add afe platform for mt8195 audio/dsp
AFE: the abbreviation for Audio Front End
Signed-off-by: YC Hung <yc.hung@mediatek.com>
Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
Add afe driver for memif/sinegen.
Add afe-dai.c/afe-drv.c/afe-memif.c for afe common driver
AFE : Audio Front End
The audio front-end essentially consists of voice and audio data paths.
frontend (memif) :
memory interface,
UL (uplink for capture),
DL(downlink for playback)
backend:
TDM In,
TMD out,
DMIC,
GASRC, etc
interconn:
inter-connection,
connect frontends
backends as DSP path
Note:
TEST_SGEN macro define is just for test
Signed-off-by: YC Hung <yc.hung@mediatek.com>
Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
Add support for platform drivers :
idc, irq, timer, clk dma.
Add mtk mt8195 platform initialization.
1. MT8195 includes one Cadence HiFi-4 DSP,
which support for four 32x32-bit MACs,
some support for 72-bit accumulators,
limited ability to support eight 32x16-bit MACs,
a fourth VLIW slot and the ability to issue two 64-bit loads per cycle.
2. 25 interrupts
3. Clock Rate: DSP can operate at
720 MHz (0P75 V)/540 MHz (0P65 V)/370 MHz (0P6 V)/220 MHz (0P55 V)
4. DRAM: it can access data on DRAM by DMA or by CPU directly (through Cache).
5. 32x32-bit MACs
6. Supports SPM(System Power Manager) to control power sequence
Signed-off-by: YC Hung <yc.hung@mediatek.com>
Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
Add irq, ipc and timer drivers for mtk mt8195
About mt8195:
Two domains of IRQ:
IRQ_EXT_DOMAIN0 and IRQ_EXT_DOMAIN1
IRQ num: 25 interrupts
IPC: use mbx0 and mbx1 to transfer ipc msg
Signed-off-by: YC Hung <yc.hung@mediatek.com>
Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
A race currently exists in IPC completion code. When processing the
pipeline TRIG_START command on timer-domain pipelines, processing is
postponed to the pipeline task. Usually the IPC task continues and
completes before the pipeline task. The IPC task notes, that the
command is processed in the pipeline context and doesn't send a
reply to the host. Then the pipeline task executes the command and
notifies the host.
However, occasionally the timer interrupt occurs while the IPC task
is still active. It will start processing the IPC command in the
pipeline context and reply to the host. The host then can send the
next IPC command before the IPC task in the firmware has completed.
This then produces an error trace:
ERROR schedule_edf_task(), task already queued or running 3
and the IPC is dropped.
This commit fixes the race by making sure in asynchronous cases the
last of the two contexts notifies the host.
BugLink: https://github.com/thesofproject/sof/issues/4706
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Marc Herbert