- update FSP version to IoT ADL-P MR2 (0C.01.73.10)
- update Microcode version to 423
- update platform version to 1.2
Signed-off-by: Vincent Chen <vincent.chen@intel.com>
Code are shared for AlderLake and RaptorLake.
Just update the SMBIOS strings to reflect it.
Signed-off-by: Guo Dong <guo.dong@intel.com>
Signed-off-by: Guo Dong <guo.dong@intel.com>
FSP UPD FuSa toggles will be set based on new config data fields where
applicable or to predefined values when called for by the FuSa spec.
This requires setting PcdFusaSupport at build time in case platform FSP
doesn't support FuSa.
Signed-off-by: Bejean Mosher <bejean.mosher@intel.com>
This patch fixes an invalid memory access issue caused by
the fs->Ext2FsGDSize is smaller than the size of EXT2GD.
The EXT2GD is a 64-byte structure, but fs->Ext2FsGDSize is not always 32.
Before this patch, Ext2fsOpen() allocates a smaller memory than expected:
i.e., Ext2FsGrpDes = AllocatePool (Ext2FsGDSize * Ext2FsNumCylinder);
When ReadGDBlock() loads data (E2FS_CGLOAD) into fs->Ext2FsGrpDes,
it possibly accesses mem out of the allocated Ext2FsGrpDes space.
This patch loads each element into fs->Ext2FsGrpDes.
This patch also
1. prints informative messages when OS Loader fails to load Linux files.
2. increase EHL's PLD_HEAP_SIZE (since the size of initrd in Ubuntu LiveCD
is over 130MB)
Test method:
1. create a huge EXT FS (says, at least 36GB)
2. In the fs, place the following file/dir:
a: non-empty file
b: dir
b/c: non-empty file
3. boot with SBL OS Loader and enter Shell.
4. execute "fs init <...skip...>" to init the fs
5. execute "fs ls"
6. execute "fs ls b/c"
7. execute "fs load a"
8. execute "fs load b/c"
Verify:
1. 10MB/10GB/100GB/200GB EXT2/EXT3/EXT4 FS
2. EHL CRB
Signed-off-by: Stanley Chang <stanley.chang@intel.com>
Rtd3 SSDT have CRB and RVP versions. Verify Table ID to match Platfrom SKU
when updating SSDT table.
Signed-off-by: Kevin Tsai <kevin.tsai@intel.com>
Signed-off-by: Kevin Tsai <kevin.tsai@intel.com>
FspsUpdUpdateLIb was not enabling FspsUpd->FspsConfig.L2QosEnumerationEn
based on PLATFORM_ADLS, which is no longer used. L2QosEnumerationEn is
present in ADL-P,S,PS, and RPL-S,P FSP UPD, just not ADL-N, so need to
prevent compiling this code for that platform only.
Signed-off-by: Bejean Mosher <bejean.mosher@intel.com>
Currently, Slim Bootloader support for multiple VBT files doesn't work on EHL.
Support for multiple VBT files, which works on other platform, does not work
correctly for EHL. However, this change can fix it locally by adding the support
from another platform into the EHL support once integrated into the public SBL
Signed-off-by: ldevathu <linggeis.daran.devathurai@intel.com>
Fix two errors that prevent building QEMU SBL with the debug FSP on Linux:
- 0001-Build-QEMU-FSP-2.0-binaries.patch adds a variable "RegMask8" to
FspmInitEntryPoint() that is written but not read; GCC treats this as
an error;
- the resulting STAGE2 binary is larger than the 0x18000 bytes allocated
for it.
Signed-off-by: Bruno Achauer <bruno.achauer@intel.com>
RPL-P and ADL-P RVPs are essentially identical except for BoardID FRU.
Both need to work with SBL with RPL-P Silicon. To avoid duplicating
config data, this change will treat both as the same board.
Signed-off-by: Bejean Mosher <bejean.mosher@intel.com>
TCO timer could be enabled regardless resiliency feature.
So just remove the resiliency conditional.
Signed-off-by: Guo Dong <guo.dong@intel.com>
Signed-off-by: Guo Dong <guo.dong@intel.com>
Before this change, whenever SG02 is corrupted
in both BP0 and BP1, SBL will continuously loop
trying to recover BP0 via BP1 and vice versa
This change makes it so that, if a failure is
detected on a recovery flow, the CPU halts
Signed-off-by: Sean McGinn <sean.mcginn@intel.com>
Create a tool that corrupts SBL components so that
the SBL resiliency feature can more easily be tested
and demonstrated
Signed-off-by: Sean McGinn <sean.mcginn@intel.com>
- update FSP version to MR5 FSP (09.04.30.51)
- update microcode version to 17
- update platform version to 1.5
Signed-off-by: Vincent Chen <vincent.chen@intel.com>
PcdTccEnabled was declared as a FeaturePcd which evaluates to a code symbol
and can't be used in a #if. From the preprocessor perspective it is always
undefined. Changed this pcd to a FixedPcd instead.
Signed-off-by: Bejean Mosher <bejean.mosher@intel.com>
Signed-off-by: Bejean Mosher <bejean.mosher@intel.com>
The patch fixes SIO UART in COM mode by providing Acpi Gns
correct values.
Test method: grep 16550A /proc/tty/driver/serial
If a SIO UART run in COM mode, its MMIO should be in
FE020000 ~ FE035FFF (EHL serial IO in ACPI mode).
Verfiied: EHL CRB
Signed-off-by: Stanley Chang <stanley.chang@intel.com>
Signed-off-by: Stanley Chang <stanley.chang@intel.com>
Change USB4 CM Mode to 0. This value is consumed by FSP and UEFI BIOS but not by SBL.
Different setting causes issue with TBT device in Windows which might result in CATERR.
Tested to boot Windows and Yocto.
Signed-off-by: Kevin Tsai <kevin.tsai@intel.com>
Signed-off-by: Kevin Tsai <kevin.tsai@intel.com>
Added new platform ID for RPLP DDR5 CRB (COM-HPC board). This board has
no EC or board ID FRU, but it is so far the only board in the ADL/RPL
family like this so it is used as a board identification criterion.
Added DdiConfig table as well.
Signed-off-by: Bejean Mosher <bejean.mosher@intel.com>
Signed-off-by: Bejean Mosher <bejean.mosher@intel.com>
MemTestOnWarmBoot UPD added into Config Editor. This UPD is enabled to ensure Base Memory Test is running in SBL.
Signed-off-by: Syahirah Sabryna <nur.syahirah.sabryna.mohmad@intel.com>
Signed-off-by: Syahirah Sabryna <nur.syahirah.sabryna.mohmad@intel.com>
Plaform is halted when TPM is not detected.TPM support is
enabled with BTG 0 and boot halted when PTT is not enabled
in straps.
TPM should be able to boot when TPM is not present and this
patch fixes this issue.
Signed-off-by: Subash Lakkimsetti <subash.lakkimsetti@intel.com>
Signed-off-by: Subash Lakkimsetti <subash.lakkimsetti@intel.com>
Implement a function to support FIPS mode enablement in ADL
Test: Booted with Windows and Yocto
Verified with FIPS enablement support in ADLN
Signed-off-by: Ong Kok Tong <kok.tong.ong@intel.com>
Updated the GPIO shell command to take GPIO group and pin number as inputs.
Signed-off-by: M Karuppasamy <karuppasamy.m@intel.com>
Signed-off-by: Sachin Kamat <sachin.kamat@intel.com>
Signed-off-by: Akshatha Thekkade <akshatha.thekkade@intel.com>
Updated FSP-M and FSP-S parameters to match with BIOS
Signed-off-by: Atharva Lele <atharva.lele@intel.com>
Signed-off-by: Atharva Lele <atharva.lele@intel.com>
Added M.2 related PlatformNvs GPIO value for CRB board
Signed-off-by: Ong Kok Tong <kok.tong.ong@intel.com>
Signed-off-by: Ong Kok Tong <kok.tong.ong@intel.com>
If Payload Id is read from generic config data then
set Payload Id of LINX Payload to 0.
Signed-off-by: Akshatha Thekkade <akshatha.thekkade@intel.com>
Include TCC specific code inside TCC feature flag to avoid
build issues on unsupported platforms.
Signed-off-by: Akshatha Thekkade <akshatha.thekkade@intel.com>
Signed-off-by: Sachin Kamat <sachin.kamat@intel.com>
Check EC UPD flag prior to publish ECDT table and send EC cmd.
On Ecless board, EC ACPI object will not be invoked.
Signed-off-by: Kevin Tsai <kevin.tsai@intel.com>
Signed-off-by: Kevin Tsai <kevin.tsai@intel.com>
If TS bit flipped and it does not match FWU state,
assume ACM detected corruption in SG1A or SG1B and
recover broken BP
Add WDT trigger for recovery
Add ADL-specific WDT trigger for TS
Signed-off-by: Sean McGinn <sean.mcginn@intel.com>
TPM is intialized by ACM with profiles 3 & 5.
This patch enables the TPM in bootloader when boot guard
is not enabled. HAVE_MEASURED_BOOT in platform
board config controls the TPM in SBL.
Signed-off-by: Subash Lakkimsetti <subash.lakkimsetti@intel.com>
Added UPD Ddr4OneDpc in DLT file and removed hard coded value.
Signed-off-by: Kevin Tsai <kevin.tsai@intel.com>
Signed-off-by: Kevin Tsai <kevin.tsai@intel.com>
Add the hard-coded GPIO table to the header file for reference purposes.
This table is currently part of the configuration.
Signed-off-by: Sindhura Grandhi <sindhura.grandhi@intel.com>
Signed-off-by: Sindhura Grandhi <sindhura.grandhi@intel.com>
Without initializing CPU fan control, EC will stop CPU fan after default
timeout. This patch initializes CPU fan control and fail safe control.
Some scenarios are related to the case: (1) bootloader shell;
(2) unexpected hang; (3) OS with no ACPI support; and (4) OS fails to
load ACPI driver
Test methods:
1. monitor CPU fan under SBL / UEFI Payload shell: expect non-stop
2. check CPU fan status after Linux starts: expect ACPI controls it
Verified: TGL RVP
Signed-off-by: Stanley Chang <stanley.chang@intel.com>
Vincent Chen