Commit Graph

1554 Commits

Author SHA1 Message Date
Vincent Chen 2e413a6843 [ADLP] Update FSP/UCODE/platform version for MR2 release
- update FSP version to IoT ADL-P MR2 (0C.01.73.10)
- update Microcode version to 423
- update platform version to 1.2

Signed-off-by: Vincent Chen <vincent.chen@intel.com>
2022-11-21 14:00:32 -07:00
Bejean Mosher bd4e688468 fix: Revert PcdDebugPrintErrorLevel change made mistakenly in #1760.
PR #1760 mistakenly included a debug change to increase the default debug
print level. Reverting that one change.

Signed-off-by: Bejean Mosher <bejean.mosher@intel.com>
2022-11-21 13:59:25 -07:00
bejeanmo 82d0a283c9
feat: [ADL/RPL] Add core changes to allow for platform CrashLog support. (#1760)
- Added ADL BERT table template
- Added CrashLogLib calls from ADL board init lib  at PostMemInit and
    PlatformUpdateAcpiTable
- Added CrashLogLib header and Null Lib
- Added header file for Common Platform Error Record definitions.

Signed-off-by: Bejean Mosher <bejean.mosher@intel.com>

Signed-off-by: Bejean Mosher <bejean.mosher@intel.com>
2022-11-21 12:16:48 -05:00
Stanley Chang 847c12d38a OSLoader: Append mender command line only if not exist
This patch fixes the issue that OS Loader appends an unwanted
mender setting (i.e., root=PARTLABEL=primary/secondary) to Linux
kernel command line when the mender setting already exists.

With the patch, the mender setting is appended to kernel command line
only if BOOT_FLAGS_MENDER AND no existing mender setting.

Signed-off-by: Stanley Chang <stanley.chang@intel.com>
2022-11-21 10:15:54 -07:00
Artur Kowalski e2801cb264 Allow to load capsules signed with RSA3072 from raw partition
When loading capsule from raw partition, some check prevent capsules
signed by a RSA3072 from being recognized as a valid capsule. Remove
obsolete checks which expect RSA2048, signature type is already checked
at a later stage from AuthenticateCapsule.

Signed-off-by: Artur Kowalski <artur.kowalski@3mdeb.com>
2022-11-17 20:32:54 -07:00
Guo Dong ba6a502ae9 Enable Azure Pipeline build for IDV
This patch enabled auto build for IDV Azure Pipelines.

Signed-off-by: Guo Dong <guo.dong@intel.com>
2022-11-16 14:49:01 -07:00
Guo Dong 66a8d7d141
[ADL] Update SMBIOS strings (#1757)
Code are shared for AlderLake and RaptorLake.
Just update the SMBIOS strings to reflect it.

Signed-off-by: Guo Dong <guo.dong@intel.com>

Signed-off-by: Guo Dong <guo.dong@intel.com>
2022-11-16 16:18:08 -05:00
Bejean Mosher 631279c61f feat: [RPL-P] Add support for enabling FSP FuSa features.
FSP UPD FuSa toggles will be set based on new config data fields where
applicable or to predefined values when called for by the FuSa spec.
This requires setting PcdFusaSupport at build time in case platform FSP
doesn't support FuSa.

Signed-off-by: Bejean Mosher <bejean.mosher@intel.com>
2022-11-16 14:11:40 -07:00
Guo Dong 80e3bc8293
Remove unnecessary check in partition library (#1754)
In the Ubuntu ISO image, it has 0xF8 partition entries.
The partition library could not work as expected since
it expects the partition entries are no more than 128.

Potentially it could have more partition entries, so just
remove the check.

Signed-off-by: Guo Dong <guo.dong@intel.com>

Signed-off-by: Guo Dong <guo.dong@intel.com>
2022-11-15 15:57:59 -05:00
cshur 8a900cb414 Revert "ICXD: SGX: Added SGX launch control to SBL."
This reverts commit 9fe47090c5.
2022-11-14 10:13:01 -07:00
Adithya Baglody 9fe47090c5 ICXD: SGX: Added SGX launch control to SBL.
Added SgxLeWr and the hashes as configurable parameters in
sgxconfig.yaml.

Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
2022-11-14 08:35:22 -07:00
Vincent Chen 4e4e2b9507 [ADLP] Update VBT data in Igd Op Region
This patch fixed the issue that no display seen
once the Windows system resumed from S4.
This issue happened in particular when the Iris
Xe Graphics driver is in place.

Signed-off-by: Vincent Chen <vincent.chen@intel.com>
2022-11-14 08:34:39 -07:00
Stanley Chang b6f150c0ea [ExtLib] fix invalid memory access to support large EXT fs (#1739)
This patch fixes an invalid memory access issue caused by
the fs->Ext2FsGDSize is smaller than the size of EXT2GD.

The EXT2GD is a 64-byte structure, but fs->Ext2FsGDSize is not always 32.

Before this patch, Ext2fsOpen() allocates a smaller memory than expected:
  i.e., Ext2FsGrpDes = AllocatePool (Ext2FsGDSize * Ext2FsNumCylinder);
When ReadGDBlock() loads data (E2FS_CGLOAD) into fs->Ext2FsGrpDes,
it possibly accesses mem out of the allocated Ext2FsGrpDes space.

This patch loads each element into fs->Ext2FsGrpDes.

This patch also
1. prints informative messages when OS Loader fails to load Linux files.
2. increase EHL's PLD_HEAP_SIZE (since the size of initrd in Ubuntu LiveCD
   is over 130MB)

Test method:
1. create a huge EXT FS (says, at least 36GB)
2. In the fs, place the following file/dir:
    a: non-empty file
    b: dir
    b/c: non-empty file
3. boot with SBL OS Loader and enter Shell.
4. execute "fs init <...skip...>" to init the fs
5. execute "fs ls"
6. execute "fs ls b/c"
7. execute "fs load a"
8. execute "fs load b/c"

Verify:
1. 10MB/10GB/100GB/200GB EXT2/EXT3/EXT4 FS
2. EHL CRB

Signed-off-by: Stanley Chang <stanley.chang@intel.com>
2022-11-14 08:33:16 -07:00
Kalp Parikh c68f61707f [ADL/RPL] Update default boot options
Change boot flag to 0 to enable booting
yocto/ubuntu

TEST:Boot to yocto on ADL

Signed-off-by: Kalp Parikh <kalp.parikh@intel.com>
2022-11-09 13:54:13 -07:00
Sean McGinn 5d7a1ad2f5 Stop TCO timer if OS/UEFI payload not found
If OS/UEFI payload is not found, stop the TCO timer
before halting the CPU as there is no backup of
OS/UEFI payload

Signed-off-by: Sean McGinn <sean.mcginn@intel.com>
2022-11-08 20:29:30 -07:00
cshur 91f39ba742 Revert "ICXD: SGX: Added SGX launch control to SBL."
This reverts commit a7adcc2d5e.
2022-11-07 19:42:50 -07:00
Gavin Xue 2edbfbe447 [EHL] Add SD device to platform device list
Signed-off-by: Gavin Xue <gavin.xue@intel.com>
2022-11-04 15:02:41 -07:00
Gavin Xue 9a39dd8d5c [EHL] Fix SD card enumeration failure issue
Similar fix in EHL BIOS reference code. Verified
on EHL CRB/RVP1/RVP4 and OEM customer board.

Signed-off-by: Gavin Xue <gavin.xue@intel.com>
2022-11-04 15:02:41 -07:00
Sean McGinn a2dfcaabc9 Add check on uCode total size during uCode update
Check total size from uCode header against slot size
during uCode update

Signed-off-by: Sean McGinn <sean.mcginn@intel.com>
2022-11-04 15:00:05 -07:00
Sean McGinn 7fca88c50d Move FW update uCode structure check to its own function
Signed-off-by: Sean McGinn <sean.mcginn@intel.com>
2022-11-04 15:00:05 -07:00
Sean McGinn a52a054333 Check that uCode slot sizes line up during uCode update
Currently, users are able to update the uCode component
with a new binary that uses a different slot size than
the existing binary. If these slot sizes do not line up,
there is potential to trigger recovery (if enabled) or
brick the system. This change disallows updates where
these slot sizes do not line up.

Signed-off-by: Sean McGinn <sean.mcginn@intel.com>
2022-11-04 15:00:05 -07:00
Sean McGinn 22411f413f Force redundant component check on every FW update iteration
Currently, when a power failure occurs during update of a
BP1 component, the corresponding BP0 component does not get
updated on next boot. This is because the redundant component
check only occurs at the very beginning of the FW update process.

This change corrects this behavior, so that the BP1 component gets
updated along with its corresponding BP0 component on boot after
BP1 component update with power failure.

Signed-off-by: Sean McGinn <sean.mcginn@intel.com>
2022-11-03 15:38:55 -07:00
Adithya Baglody a7adcc2d5e ICXD: SGX: Added SGX launch control to SBL.
Added SgxLeWr and the hashes as configurable parameters in
sgxconfig.yaml.

Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
2022-11-03 15:19:03 -07:00
tsaikevin d8295bc0dd
[ADLN] Verify Table ID when updating Rtd3 SSDT (#1741)
Rtd3 SSDT have CRB and RVP versions. Verify Table ID to match Platfrom SKU
when updating SSDT table.

Signed-off-by: Kevin Tsai <kevin.tsai@intel.com>

Signed-off-by: Kevin Tsai <kevin.tsai@intel.com>
2022-11-03 10:14:34 -04:00
Bejean Mosher 31fe742339 [RPL/ADL] L2 CAT not getting enabled when TCC enabled.
FspsUpdUpdateLIb was not enabling FspsUpd->FspsConfig.L2QosEnumerationEn
based on PLATFORM_ADLS, which is no longer used. L2QosEnumerationEn is
present in ADL-P,S,PS, and RPL-S,P FSP UPD, just not ADL-N, so need to
prevent compiling this code for that platform only.

Signed-off-by: Bejean Mosher <bejean.mosher@intel.com>
2022-11-02 16:37:46 -07:00
Lennert Buytenhek 5bb0cd48bb
[ICXD] Fix stitching process by getting rid of SblOpen remnants (#1737)
Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>

Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>
2022-11-02 14:05:54 -07:00
sean-m-mcginn 9d6a794169
Create tool to generate uCode outside of full SBL build (#1716)
* Create tool to generate uCode outside of full SBL build

Create a standalone tool that generates a full
uCode region binary separate from a full SBL build

This tool will  be used to generate a uCode region
binary for incorporation into a FWU capsule

Signed-off-by: Sean McGinn <sean.mcginn@intel.com>

* Make region size optional parameter in uCode utility

When region size not is given explicitly to the uCode
utility, it aligns the combined uCode binaries up
to the nearest multiple of 4KB

The uCode utility also checks slot size and region size
are not exceeded

Signed-off-by: Sean McGinn <sean.mcginn@intel.com>

* Remove region size argument on uCode utility

Signed-off-by: Sean McGinn <sean.mcginn@intel.com>

Signed-off-by: Sean McGinn <sean.mcginn@intel.com>
2022-10-25 18:35:42 -07:00
Guo Dong 505209d9c3 Enhance multiboot support
Currently SBL would return when preferred graphics mode is set
in the multiboot image. This patch would continue boot and print
the preferred graphics mode information.

Signed-off-by: Guo Dong <guo.dong@intel.com>
2022-10-24 10:52:03 -07:00
Sean McGinn 876f68fa4f Prevent erroneous update of BP1 from being retried on BP0
It was noticed that, if there is an error
updating a redundant component on BP1, it
gets retried on BP0

This change prevents that retry from happening as
identical boot partitions are desired

Signed-off-by: Sean McGinn <sean.mcginn@intel.com>
2022-10-24 10:51:36 -07:00
Sean McGinn 0a19cd4842 Allow multiple redundant SBL components to be updated in the same session
Currently, only a single redundant SBL component, the configuration data
component, is allowed per update session. However, with support added for
ACM and uCode component updates, the user might desire to update multiple
redundant SBL components in the same session. This change allows this to
happen.

Signed-off-by: Sean McGinn <sean.mcginn@intel.com>
2022-10-24 10:51:36 -07:00
ldevathu 3eb00df31f [EHL] support multi VBT
Currently, Slim Bootloader support for multiple VBT files doesn't work on EHL.
Support for multiple VBT files, which works on other platform, does not work
correctly for EHL. However, this change can fix it locally by adding the support
from another platform into the EHL support once integrated into the public SBL

Signed-off-by: ldevathu <linggeis.daran.devathurai@intel.com>
2022-10-20 08:01:44 -07:00
Bruno Achauer aac41f89ea [QEMU] Allow building with the debug FSP
Fix two errors that prevent building QEMU SBL with the debug FSP on Linux:
- 0001-Build-QEMU-FSP-2.0-binaries.patch adds a variable "RegMask8" to
  FspmInitEntryPoint() that is written but not read; GCC treats this as
  an error;
- the resulting STAGE2 binary is larger than the 0x18000 bytes allocated
  for it.

Signed-off-by: Bruno Achauer <bruno.achauer@intel.com>
2022-10-20 07:49:21 -07:00
Bejean Mosher bac196577b fix: [RPL-P] Combined ADL-P and RPL-P RVP board IDs so either can boot.
RPL-P and ADL-P RVPs are essentially identical except for BoardID FRU.
Both need to work with SBL with RPL-P Silicon. To avoid duplicating
config data, this change will treat both as the same board.

Signed-off-by: Bejean Mosher <bejean.mosher@intel.com>
2022-10-19 12:47:10 -07:00
Guo Dong b4ce187026
[ADL] enable TCO timer by default (#1727)
TCO timer could be enabled regardless resiliency feature.
So just remove the resiliency conditional.

Signed-off-by: Guo Dong <guo.dong@intel.com>

Signed-off-by: Guo Dong <guo.dong@intel.com>
2022-10-19 12:31:04 -04:00
Sean McGinn 38a3c2e799 Consider Simultaneous SG02 Corruptions in BP0 and BP1 for Resiliency
Before this change, whenever SG02 is corrupted
in both BP0 and BP1, SBL will continuously loop
trying to recover BP0 via BP1 and vice versa

This change makes it so that, if a failure is
detected on a recovery flow, the CPU halts

Signed-off-by: Sean McGinn <sean.mcginn@intel.com>
2022-10-18 14:49:32 -07:00
cshur 0372e199d2
[ICXD] Move Tcc binaries to Utilities (#1726)
Update Script files to move tcc binaries.

Signed-off-by: cshur <cs.hur@intel.com>

Signed-off-by: cshur <cs.hur@intel.com>
2022-10-18 13:29:28 -07:00
Guo Dong e81a4872a9 [RPL] Add a new RPL CPU support
Adding RAPTORLAKE 2 DT HALO support

Signed-off-by: Guo Dong <guo.dong@intel.com>
2022-10-17 14:13:02 -07:00
Sean McGinn ceea7d1d03 Rename PCD for SBL component corruption command
Signed-off-by: Sean McGinn <sean.mcginn@intel.com>
2022-10-17 11:59:04 -07:00
Sean McGinn 44b332d609 Add more examples for corruptcomp tool
Signed-off-by: Sean McGinn <sean.mcginn@intel.com>
2022-10-17 11:59:04 -07:00
Sean McGinn b82dcd344f Add PCD for enablement of corruptcomp tool
Adds build-time PCD that hides corruptcomp
tool by default
Renames corruptcomponent to corruptcomp
Enhances error checking/logs

Signed-off-by: Sean McGinn <sean.mcginn@intel.com>
2022-10-17 11:59:04 -07:00
Sean McGinn f7c6cc599e Create OS loader shell tool for SBL component corruption
Create a tool that corrupts SBL components so that
the SBL resiliency feature can more easily be tested
and demonstrated

Signed-off-by: Sean McGinn <sean.mcginn@intel.com>
2022-10-17 11:59:04 -07:00
Leon Theunissen 192e8a568a Interrupt packet length is maximum 8, not exclusively 8
Accomodate USB interrupt transfers that require less than 8 bytes per packet.

Signed-off-by: Leon Theunissen <leon.theunissen@etion.co.za>
2022-10-17 11:55:10 -07:00
Leon Theunissen 861f587b63 USB fix descriptor parsing
While iterating over a USB descriptor in GetExpectedDescriptor(),
the "Len" variable always uses the 1st byte in the buffer,
This is only true for the 1st iteration, thereafter the variable should
advance as the descriptor advances.

Signed-off-by: Leon Theunissen <leon.theunissen@etion.co.za>
2022-10-17 11:55:10 -07:00
Vincent Chen 19f84ffea2 [EHL] Update FSP/UCODE/platform version since MR5 is released
- update FSP version to MR5 FSP (09.04.30.51)
- update microcode version to 17
- update platform version to 1.5

Signed-off-by: Vincent Chen <vincent.chen@intel.com>
2022-10-17 11:49:34 -07:00
Kalp Parikh 4aa2ac2915 feat: [ADLPS] FSP update for pre-MR1 release
FSP update for pre MR1 release

Signed-off-by: Kalp Parikh <kalp.parikh@intel.com>
2022-10-17 11:46:43 -07:00
cshur 94ab839eab [ICXD] Upstream ICX-D LCC/HCC after PV
Tested to boot Yocto and Windows.

Signed-off-by: cshur <cs.hur@intel.com>
2022-10-12 14:45:35 -07:00
sean-m-mcginn ad6da2876a
Fix erroneous uCode base offset in BP1 SG1A (#1712)
During the build process, SG1A is built
for BP0 and a copy is made for BP1. Then,
the parameters of the BP1 SG1A are adjusted
to reflect that it is in BP1. One of the
parameters that gets adjusted during this
process is the uCode base. It was noticed
that this uCode base does not get updated
at all for platforms using FSP spec 2.2, but
another parameter gets updated instead.

Specifically, the error is in the FSP-T UPD
struct. The offset of the uCode base in
the FSP-T UPD struct is 0x40 for platforms using
FSP spec 2.2. However, the offset that actually
gets updated for platforms using FSP spec 2.2 is
0x20. This change corrects this offset for the
relevant platforms.

Signed-off-by: Sean McGinn <sean.mcginn@intel.com>

Signed-off-by: Sean McGinn <sean.mcginn@intel.com>
2022-10-11 15:57:02 -04:00
bejeanmo 2d73d46d09
fix: Check for possible NULL dereference introduced in #1695. (#1717)
PR #1695 possible NULL deregerence was triggering static analyzer failure.
Added a NULL check before dereferencing.

Signed-off-by: Bejean Mosher <bejean.mosher@intel.com>

Signed-off-by: Bejean Mosher <bejean.mosher@intel.com>
2022-10-11 09:52:45 -07:00
bejeanmo 15f365d774
fix: [ADL] TCC was never getting enabled via the board config option. (#1715)
PcdTccEnabled was declared as a FeaturePcd which evaluates to a code symbol
and can't be used in a #if. From the preprocessor perspective it is always
undefined. Changed this pcd to a FixedPcd instead.

Signed-off-by: Bejean Mosher <bejean.mosher@intel.com>

Signed-off-by: Bejean Mosher <bejean.mosher@intel.com>
2022-10-10 16:42:22 -04:00
Karuppa-samy 107fabbebd
[ADL] GPIO shell command Klocwork issue fix (#1693)
This patch fixes initialization issue identified
by Klocwork in function GpioPadcalc.

Signed-off-by: M Karuppasamy <karuppasamy.m@intel.com>
Signed-off-by: Sachin Kamat <sachin.kamat@intel.com>
Signed-off-by: Akshatha Thekkade <akshatha.thekkade@intel.com>

Signed-off-by: M Karuppasamy <karuppasamy.m@intel.com>
Signed-off-by: Sachin Kamat <sachin.kamat@intel.com>
Signed-off-by: Akshatha Thekkade <akshatha.thekkade@intel.com>
2022-10-07 12:34:22 -04:00