The UEFI payload uses the memory map info to guess the top of low
memory. It expects the memory map to be continuous. However, in
certain case, the memory resource HOB produced by FSP is not
continous, and it causes issue for UEFI payload to find the correct
top of low memory. This patch enhanced SBL memory map handling to
check if there is any gap in the memory map. If so, it will try to
insert a new entry to fill the gap.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
In order to report memory size info in SMBIOS table, it is required
to know the full system memory. However, all info can only be passed
through FSP HOB, and it cannot easily identify the top of low/high
memory. The patch added core API GetMemoryInfo/SetMemoryInfo so that
platform can provide required memory info for core. By default, it
uses FSP hobs to guess these info. But platform can update it with
more accurate info during PostMemoryInit phase.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
This patch adjusted the following debug message for USB libraries:
- For SBL, since mutli-TT is not utilized, it should not be
classified as error message. It is changed to be DEBUG_INFO now.
- Added DeInit debug print for USB so that it tells the USB
resources are de-allocated.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
When some settings from DSO caused system hang, the WDT
would cause the system reboot. And in the next boot,
SBL would use the default setting by not apply the DSO
values.
Signed-off-by: Guo Dong <guo.dong@intel.com>
When multiple USB mass storage devices are connected to the
target, it is not clear to the end user which one is selected
for boot. This patch added code to print the USB mass storage
device manufacturer and product name string. In this way, it
is easier for the end user to identify specific USB device.
It can also be used to determine the HwPart field for USB boot
option. HwPart for USB boot option is mapped to the USB mass
storage device index detected on the platform. BTW, to allow
boot from multiple USB mass storage devices, the optoin
ENABLE_MULTI_USB_BOOT_DEV needs to be enabled. So this patch
enabled ENABLE_MULTI_USB_BOOT_DEV by default.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
This patch reworked the previous reverted commit. The UEFI payload
debug version assertion was resolved. Checked in Windows, the SMBIOS
info looks good.
Current UEFI payload showed 0 KB RAM size in setup screen because
of missing SMBIOS memory type information. This patch added SMBIOS
type 19 to provide memory array mapped address information. With
this change, UEFI setup screen can show correct memory size.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
This patch added PcdAcpiProcessorIdBase to allow platform to
customize the processor ID start base within MADT APIC entry.
Current EHL and TGL declared PR00 processor object in ACPI
with unique ID value 0, but other projects used vlaue 1
instead. This patch will help fix this issue.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
This records the maximum usage of heap at runtime. The Stage1/2 heap
sometimes reaches OUT OF RESOURCE even if it looks there is enough
usable space in the heap. This is because AllocateTemporaryMemory()
sometime exceeds the heap boundary. ex) IppCryptoLib
This would help identify proper heap size required in each stages.
Signed-off-by: Aiden Park <aiden.park@intel.com>
This reverts commit b87d67c1fc.
In the testing, it caused debug UEFI payload assertion issue.
Roll it back for now.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Current UEFI payload showed 0 KB RAM size in setup screen because
of missing SMBIOS memory type information. This patch added SMBIOS
type 19 to provide memory array mapped address information. With
this change, UEFI setup screen can show correct memory size.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Current SBL FWU code assumes the SBL ROM image size is the same as
the BIOS region size defined in the SPI descriptor. It is used to
calculate the offset for flash write and erase. However, the SBL
ROM image size could be smaller than BIOS region size, in this case
the offsets are all wrong. This patch addressed this issue.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Current SBL will always append "acpi_rsdp=" as part of the command
line for Linux boot. However, since acpi_rsdp_addr was added in
boot parameter for Linux boot protocol 2.14 and later, it is only
required to do this for old boot protocol. This patch implemented
this.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
This patch enabled several config options for TGL x64 build so that
64 bit PCI resource can be allocated properly. As part of it, the
related GFX bar read/write has been extended to handle 64bit address.
This has been tested on UPX i11 board. X64 SBL can boot to Ubuntu
properly.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
When UART bar is alloaced to 64 bit address, the current SBL API
GetSerialPortBase() only returns the lower 32 bit address, which will
cause problem for UART access. This patch fixed this issue.
Please note the patch did not change the payload HOB interface for
UART info. That needs to be updated to 64bit base address too. But this
patch does not cover that.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
When user disabled PRE_OS in bootflag with boot->idx
command in OSL shell but shell still prompt user to
enter PREOS image file path, This is due to the system
check the existing boot option list instead of the
boot option that user currently updating.
Signed-off-by: Ong Kok Tong <kok.tong.ong@intel.com>
This patch fixes three S0ix issues:
1. a regression caused by commit 20889 where the
FspsConfig->SerialIoUartMode missed configuring for legacy UART
2. failed s0ix when assigning uart port2 as debug port: root caused
by Maurice. He pointed out that several uart properties should
not be reset
This fixed#1314.
3. conflict with TCC/TSN: In TGL, S0ix should be disabled when either
TCC or TSN is enabled. If s0ix is enabled, the patch checks TCC/TSN
enabling status and forces turning off S0ix if TCC/TSN is enabled.
Signed-off-by: Stanley Chang <stanley.chang@intel.com>
By default, the boot option 0 has mender OS boot flag set, and it causes
"root=" to be appended to the Linux boot command line. For Ubuntu OS,
it will cause the wrong root fs parameter and prevent it from booting.
This patch fixed this issue.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
On TGL platform, when enable SR_IOV for PCI enumeration, system
hung due to insufficient PCI resource. GFX VF needs lots of MMIO
resource and it cannot be satisfied by SBL in 32 bit mode.
To address this issue, this patch extends the bus 0 downgrade
policy to further allow downgrading PCI bus 0 devices except for
GFX. Now the DowngradeBus0 policy has following values:
0: Do not downgrade PCI devices on bus 0
1: Downgrade all PCI devices on bus 0
2: Downgrade all PCI devices on bus 0 but GFX
3: Reserved
By default, it has the same behavior as before. If platform needs
to download bus 0 devices but GFX, the new value 2 can be used.
This has been tested on TGL, and it worked as expected.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
This patch added PCI MEM64 resource in ACPI table so that OS can
re-allocate 64bit PCI resource if required.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
When trying to build tgl target with
VS2015x86 there is some error reported:
TimeStampLib.lib: error LNK2001: unresolved external symbol __allmul
FirmwareUpdate.dll : fatal error LNK1120: 1 unresolved externals
This patch resolves the issue by removing
the UINT8 casting.
Signed-off-by: James Gutbub <james.gutbub@intel.com>
Current SBL will build full address paging table supported by CPU
only at the beginning of the OsLoader. It is better to move it to
Stage2 so that all payloads can have the full range address support
in x64 mode. It also allows Stage2 platform code to access 64bit
PCI resource. This patch addressed this issue.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Current SBL only looks into the primary GPT during partition detection.
If it is not valid, then MRB partition will be checked next. In some
case of the Ubuntu USB disk created, only the 2nd GPT is valid. SBL
should check both primary and secondary GPT table before moving to MBR
check. This patch added this fix.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
There are too much ERROR level debug message in GPIO library. Since
ERROR level debug message will be stored in final release binary,
it increases the image size. This patch changed the GPIO DEBUG
level to VERBOSE by default to reduce binary size. When debug is
needed, we can change the debug level in the header file to allow
more detailed info.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
This patch fixed the misleading partitioin detection error message.
It should be file system detection error message instead.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
This patch cleaned up the NVMe library DEBUG message. Lots of the
DEBUG_INFO level were changed to DEBUG_VERBOSE to reduce normal
output.
It also removed the hardcoded device index 0 for NvmeReadBlocks,
NvmeWriteBlocks and NvmeGetMediaInfo APIs.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Current NVMe library reports hardcoded block size 512 and block num
512. It is incorrect. This patch fixed it.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Make PchPcrLib common. Remove redundant headers
not used by some platforms and link the new common
lib with the platforms currently using it.
Signed-off-by: Sai T <sai.kiran.talamudupula@intel.com>
This patch enhanced the FWU code flow:
- Moved the capsule signature save to later flow because current
code saved it too early and later on the state block will be
erased.
- Enhanced error handling. If there is error during FWU, both the
state machine and the trigger need to be cleared. Otherwise, it
will be in infinite loop.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Removal of disabling AcSplitLock FSP UPD.
The FSP UPD is commented out due to the Yocto hang
issue previously which no longer occured.
Signed-off-by: Ong Kok Tong <kok.tong.ong@intel.com>
On TGL warm reset flow, current MRC will always do full MRC training.
It is because of wrong PMC rigster was used in platform code to set
and clear the MRC scratch pad bit.
This fixed#1346.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Ubuntu 20.04.3 can support TGL platform. However, current SBL won't
be able to boot without changes. It is caused by following issues:
- GRUB CFG support is not enabled by default
- Payload heap is too small to load the full INITRD image
- USB boot option is set to boot from partition 1 and EXT2 filesystem.
This patch addressed above issues. It has been tested on UPX i11.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Current XHCI library does a big loop to poll the status of a
USB command execution. In each loop it will delay 1us until
it completes or reachs the timeout. When the loop is very big,
the accumulated 1us delay together will be shifted far beyond
the original timeout requested. This is because of the inaccuracy
of the 1us delay provided by ACPI timer library. This patch
addressed this issue by checking the actual executed time rather
than looping with delay.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
This patch fixed the USB enumeration long delay issue seen on
UPX i11 board. It disabled the malfunction USB port 8.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Since the commit below was reverted
24f5aa59b5. The cache flush
need to be moved into the place where data consistency
across warm reset is required. The patch added the WBINVD
to flush the cache before "fwupdate" command issues warm
reset.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
This reverts commit 24f5aa59b5.
There are cases that warm reset is requested before memory is
initialized. Doing WBINVD in this case can cause system hang.
A better approach is to let the caller to decide when to do
cache flush for a warm reset.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Sometimes it is helpful if SBL can support firmware update from
SBL FW to UEFI FW, or update from incompatible SBL flash layout.
This will need SBL to write full BIOS region without using
redundant partition. To support this, a special capsule image
flag is added to indicate this special update. Please note, this
update might be very risky. This is only for development purpose.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
In some cases, the memory needs to keep consistent across a warm
reset. When warm reset is triggered, it might still have modified
cacheline that has not been flushed to memory yet. The patch added
WBINVD to flush cache before the warm reset.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
On UPX, one USB2 port does not respond properly during PCI enumeration.
It needs to be disabled. The current SBL code disabled the wrong port.
It should be port 10 (USB2 index 9).
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
The current SBL IfwiUtility script assumes the SBL image size
occupies the full BIOS region. However, in some case, gap may
exist at the beginning of the BIOS region. SBL image will not
always start at BIOS region offset 0. This patch added special
handling to support this case.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
kokweich