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[TGL] Fix S0ix issues 

This patch fixes three S0ix issues:

1. a regression caused by commit 20889 where the
   FspsConfig->SerialIoUartMode missed configuring for legacy UART

2. failed s0ix when assigning uart port2 as debug port: root caused
   by Maurice. He pointed out that several uart properties should
   not be reset
   This fixed #1314.

3. conflict with TCC/TSN: In TGL, S0ix should be disabled when either
   TCC or TSN is enabled. If s0ix is enabled, the patch checks TCC/TSN
   enabling status and forces turning off S0ix if TCC/TSN is enabled.

Signed-off-by: Stanley Chang <stanley.chang@intel.com>
This commit is contained in:
Stanley Chang 2021-10-14 15:42:44 +08:00 committed by Maurice Ma
parent 4f2e81e4be
commit 519ec079be
4 changed files with 22 additions and 8 deletions
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2
Platform/TigerlakeBoardPkg/CfgData/CfgData_Tcc_Feature.dlt
View File

@ -8,6 +8,8 @@
##
#
FEATURES_CFG_DATA.Features.S0ix | 0
# Enable TCC config data
TCC_CFG_DATA.TccEnable | 1
TCC_CFG_DATA.TccTuning | 1

2
Platform/TigerlakeBoardPkg/CfgData/CfgData_Tsn_Feature.dlt
View File

@ -8,6 +8,8 @@
##
#
FEATURES_CFG_DATA.Features.S0ix | 0
SILICON_CFG_DATA.PchTsnEnable | 1
SILICON_CFG_DATA.PchTsnLinkSpeed | 3

17
Platform/TigerlakeBoardPkg/Library/Stage1BBoardInitLib/Stage1BBoardInitLib.c
View File

@ -97,6 +97,12 @@ TccModePreMemConfig (
FspmUpd->FspmConfig.DsoTuningEnPreMem = TccCfgData->TccTuning;
FspmUpd->FspmConfig.TccErrorLogEnPreMem = TccCfgData->TccErrorLog;
// S0ix is disabled if TCC is enabled.
if (PLAT_FEAT.S0ixEnable == 1) {
PLAT_FEAT.S0ixEnable = 0;
DEBUG ((DEBUG_INFO, "S0ix is turned off when TCC is enabled\n"));
}
// Load TCC stream config from container
TccStreamBase = NULL;
TccStreamSize = 0;
@ -118,6 +124,9 @@ TccModePreMemConfig (
FspmUpd->FspmConfig.PowerDownMode = PolicyConfig->MemPowerDown;
FspmUpd->FspmConfig.DisPgCloseIdleTimeout = PolicyConfig->DisPgCloseIdle;
PLAT_FEAT.S0ixEnable = PolicyConfig->Sstates;
if (PLAT_FEAT.S0ixEnable == 1) {
DEBUG ((DEBUG_INFO, "S0ix is forced turning on by TCC DSO\n"));
}
DEBUG ((DEBUG_INFO, "Dump TCC DSO BIOS settings:\n"));
DumpHex (2, 0, sizeof(BIOS_SETTINGS), PolicyConfig);
}
@ -503,9 +512,15 @@ UpdateFspConfig (
FeaturesCfgData = (FEATURES_CFG_DATA *) FindConfigDataByTag (CDATA_FEATURES_TAG);
if (FeaturesCfgData != NULL) {
PLAT_FEAT.S0ixEnable = FeaturesCfgData->Features.S0ix;
// S0ix is disabled if TSN is enabled.
if ((PLAT_FEAT.S0ixEnable == 1) && (SiCfgData != NULL) && (SiCfgData->PchTsnEnable == 1)) {
PLAT_FEAT.S0ixEnable = 0;
DEBUG ((DEBUG_INFO, "S0ix is turned off when TSN is enabled\n"));
}
}
// Update TCC related UPDs if TCC is enabled
// Update TCC related UPDs if TCC is enabled
if (FeaturePcdGet (PcdTccEnabled)) {
TccModePreMemConfig (FspmUpd);
}

9
Platform/TigerlakeBoardPkg/Library/Stage2BoardInitLib/Stage2BoardInitLib.c
View File

@ -1363,9 +1363,8 @@ UpdateFspConfig (
// Inform FSP to skip debug UART init
FspsConfig->SerialIoDebugUartNumber = DebugPort;
FspsConfig->SerialIoUartMode[DebugPort] = 0x4;
if (S0IX_STATUS() == 1) {
FspsConfig->SerialIoUartMode[DebugPort] = 1; // Force UART to PCI mode to enable OS to have full control
}
} else if (S0IX_STATUS() == 1) { // legacy UART
FspsConfig->SerialIoUartMode[2] = 1; // Force UART to PCI mode to enable OS to have full control
}
//
@ -1713,10 +1712,6 @@ UpdateFspConfig (
// PCH SERIAL_UART_CONFIG
for (Index = 0; Index < GetPchMaxSerialIoUartControllersNum (); Index++) {
FspsConfig->SerialIoUartParity[Index] = 1;
FspsConfig->SerialIoUartDataBits[Index] = 0x8;
FspsConfig->SerialIoUartStopBits[Index] = 1;
FspsConfig->SerialIoUartAutoFlow[Index] = 1;
FspsConfig->SerialIoUartPowerGating[Index] = 2;
FspsConfig->SerialIoUartDmaEnable[Index] = 1;
FspsConfig->SerialIoUartDbg2[Index] = 0;