Yin Fengwei 0f9d9641d4 hv: add function to return to VM0 ... Emulate VM0 resume from S3 state: - reset BSP of VM0 - set the BSP entry to saved VM0 wakeup vec and set BSP to real mode - start BSP To match trampoline_spinlock release on ACRN Sx resume path, acquire trampoline_spinlock if ACRN Sx enter fails. Signed-off-by: Yin Fengwei <fengwei.yin@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>		2018-06-29 00:50:01 +08:00
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guest.c	HV: treewide: convert suffix ULL to UL	2018-06-29 00:50:01 +08:00
instr_emul.c	fix "negative shift"	2018-06-22 12:18:45 +08:00
instr_emul.h	instr_emul: remove unnecessary params in __decode_instruction	2018-06-11 12:14:43 +08:00
instr_emul_wrapper.c	HV: treewide: convert hexadecimals used in bitops to unsigned	2018-06-21 13:12:39 +08:00
instr_emul_wrapper.h	HV: treewide: convert hexadecimals used in bitops to unsigned	2018-06-21 13:12:39 +08:00
pm.c	HV: treewide: convert hexadecimals used in bitops to unsigned	2018-06-21 13:12:39 +08:00
ucode.c	HV:guest:fix "expression is not Boolean"	2018-06-20 14:19:47 +08:00
vcpu.c	hv: prepare for Sx(S3/S5) support in ACRN.	2018-06-29 00:50:01 +08:00
vioapic.c	fix "negative shift"	2018-06-22 12:18:45 +08:00
vlapic.c	Rename phy_cpu_num as phys_cpu_num	2018-06-22 16:12:52 +08:00
vlapic_priv.h	hv: vlapic_timer: add vlapic one-shot/periodic timer support	2018-06-15 17:10:28 +08:00
vm.c	hv: add function to return to VM0	2018-06-29 00:50:01 +08:00
vmcall.c	license: Replace license text with SPDX tag	2018-06-01 10:43:06 +08:00
vmsr.c	HV: msr: convert hexadecimals used in bitops to unsigned	2018-06-21 13:12:39 +08:00
vpic.c	HV: treewide: enforce unsignedness of pcpu_id	2018-06-21 16:59:21 +08:00