Commit Graph

1063 Commits

Author SHA1 Message Date
Ying Liu fd81655e60 HV: add the missing brackets to loop body
MISRA-C requires the use of brackets, even when there is only one
statement in the loop body.

Signed-off-by: Ying Liu <ying2.liu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-12 17:27:29 +08:00
Kaige Fu df038fc0db HV: vmx: Change variable field to uint32_t
With field defined as uint64_t, there are some implicit type conversions when
calling exec_vmwrite/read functions which takes a uint32_t for the first parameter.

This patch fixes it by change field to uint32_t.

v1 - > v2:
  - Keep the field as it is and change the defination of field to uint32_t.

Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2018-07-12 17:26:42 +08:00
Jack Ren 43e4bd4f7a version: v0.1
Signed-off-by: Jack Ren <jack.ren@intel.com>
2018-07-12 09:12:40 +00:00
David B. Kinder 11e997a70e doc: update release v0.1 release notes
Include developer comments, add commit change log,
update conf.py to include url shortcuts for references to GitHub issues
and commits.

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2018-07-11 20:48:01 -07:00
Geoffroy Van Cutsem 5a7ccc87b1 Dockerfile: remove security by-pass in Clear Linux Dockerfile
"RUN git config --global http.sslVerify false" was needed with
a cloud-based CI system else it failed to clone the repository.

The project does not use that cloud-based CI system and hence
this workaround (security by-pass) is not needed.

Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
2018-07-11 21:35:31 +08:00
Xiangyang Wu 4dc39fdb8e HV:treewide:Add 16-bit atomic operations and update vpid type
There are some integer type conversions reported by static
analysis tool for vcpu id, number of created vcpus, and
vpid, to reduce these type conversions, redesign vcpu id,
number of created vcpus, and vpid type as uint16_t as per
their usage, related 16-bit atomic operations shall be
added in HV.
MISRA C requires that all unsigned constants should have the suffix 'U'
(e.g. 0xffU), but the assembler may not accept such C-style constants.

Add 16-bit atomic add/dec/store operations;
Update temporary variables type and parameters type of
related caller;
Update vpid type as uint16_t;
Replace Macro with constant value for CPU_PAGE_SIZE.

Note: According to SDM A.10, there are some bits defined
in the IA32_VMX_EPT_VPID_CAP MSR to support the INVVPID
instruction, these bits don't mean actual VPID, so
the vpid field in the data struct vmx_capability doesn't
be updated.

V1--V2:
	update comments for assembly code as per coding style;

Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
2018-07-11 21:27:08 +08:00
Junjie Mao a23549aa91 HV: build: make relocation-related code configurable
The relocation feature relies on the ld option "-z noreloc-overflow" which is
only available for binutils >= 2.27, while on Ubuntu 16.04 or older the default
version of binutils is 2.26.

This patch wraps the relocation code with a configurable macro and make it
undefined by default to avoid default build failures.

NOTE: This is just a hotfix. The code dropped with undefined CONFIG_RELOC needs
to be reviewed by the original author of this feature. Checks to the binutils
version will also follow up.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2018-07-11 19:18:26 +08:00
Abdul Rehman 057a384f8e HV: bug fix update RTE if trigger mode or polarity is updated
Signed-off-by: Abdul Rehman <abdulrehmanee010@gmail.com>
2018-07-11 11:12:03 +08:00
Mingqiang Chi a9d04cc5ce [REVERT-ME]:handle discontinuous hpa for trusty
This is a temp solution to handle discontinuous hpa
when create/destroy secure world ept.

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2018-07-11 11:11:24 +08:00
Yonghua Huang 5603afb2be HV: remove execute access attribute in trusty EPT table
- this patch is to prevent secure world(trusty) from
   fetching instructin from normal world memory.

 - copy valid PDPTEs from normal world EPT to secure
   world EPT, and remove 'IA32E_EPT_X_BIT' attribute in
   these entries.

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-11 10:26:33 +08:00
Shiqing Gao 4446864eff hv: fix 'Pointer arithmetic is not on array'
Violation 'Pointer arithmetic is not on array' occurs in following
statement:
        *flags |= fl[pos - flagchars];

char flagchars[] is a well defined array.
It could be used directly to avoid the pointer arithmetic.

v1 -> v2:
 * use uint32_t rather than uint8_t for the index in order to let the
    type aligned with sizeof(flagchars)
 * add brackets to the then-block

Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2018-07-11 10:26:10 +08:00
Zide Chen 5cb9972919 hv: cleanup cpu.c and cpu.h
- move all relocatoin code from cpu.c and cpu.h to reloc.c and reloc.h
- no any logic changes

Signed-off-by: Zide Chen <zide.chen@intel.com>
Reviewed-by: Yin fengwei <fengwei.yin@intel.com>
2018-07-11 10:25:16 +08:00
Zide Chen 6c9e451b41 hv: EFI can load Hypervisor to address other than COMNFIG_RAM_START
- UEFI: change __emalloc() function to allocate from any available memory
  under 4G
- Define CONFIG_RAM_START to the lowest possible address 1M, making sure
  HV can only be relocated to higher address

Signed-off-by: Zheng Gen <gen.zheng@intel.com>
Signed-off-by: Zide Chen <zide.chen@intel.com>
Reviewed-by: Yin fengwei <fengwei.yin@intel.com>
2018-07-11 10:25:16 +08:00
Zide Chen 84d9da1d6a hv: build hypervisor as PIE (position-independent executable)
Build and link hypervisor with "-pie" and remove static linking so that
it generates .rela sections for relocation

Signed-off-by: Zheng Gen <gen.zheng@intel.com>
Signed-off-by: Zide Chen <zide.chen@intel.com>
Reviewed-by: Yin fengwei <fengwei.yin@intel.com>
2018-07-11 10:25:16 +08:00
Zide Chen 92cd2612fc hv: fixup addresses in the c code for relocation
- Trampoline code doesn't have the same relocation delta with HV,
  Need to manually patch them when referenced from HV
- replace all references to CONFIG_RAM_START with the actual HV load
  address

Signed-off-by: Zheng Gen <gen.zheng@intel.com>
Signed-off-by: Zide Chen <zide.chen@intel.com>
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
2018-07-11 10:25:16 +08:00
Zide Chen bc8b3a40f8 hv: fixup addresses in the assembly code for relocation
In cpu_primary.S
- Assign %rsp in cpu_primary_start_64(), so we can call _relocate()
  before any references to the symbols that need to be patched
- Move lidtq instruction and the IDT fixup code after _relocate() call
- In code64 part, replace 'mov' with 'lea' for correct addressing
- No relocation is needed in code32 part

In trampoline.S:
- add trampoline_spinlock_ptr pointer, so we may be able to fixup
  trampoline code in HV

Signed-off-by: Zheng Gen <gen.zheng@intel.com>
Signed-off-by: Zide Chen <zide.chen@intel.com>
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
2018-07-11 10:25:16 +08:00
Zide Chen ca728fb3c5 hv: add code to fixup ELF relocation sections
For UEFI boot, currently EFI application loads hypervisor to the
hard coded COMNFIG_RAM_START, which may cause it fail to boot if
this address is not available in the target.

This patch series resolve this issue by allocating memory for hypervisor
at run time, and do relocation fixup if the allocated address is
different from the base address that the hypervisor is built.

The summary of the first patch [1/6] in this series:

In x86_64 ELF, .rela sections hold information of symbols which must be
relocated before being referenced.

This patch adds code to fixup .rela sections with the relocated offset,
also, it provides utilities to assist address fixup

Signed-off-by: Zheng Gen <gen.zheng@intel.com>
Signed-off-by: Zide Chen <zide.chen@intel.com>
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
2018-07-11 10:25:16 +08:00
Kaige Fu b52be90a2f tools: acrntrace: Fix wrong event id in vmexit_analyze.py
Value of VMEXIT_XXX must have the same as TRACE_VMEXIT_XXX defined in
./hypervisor/include/debug/trace.h. This patch fix the events with wrong event id.

Fixes: 8a233ee (tools: acrntrace: Refactor vmexit_analyzer based on new trace format)

Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Reviewed-by: Yan, Like <like.yan@intel.com>
2018-07-11 09:24:44 +08:00
Kaige Fu 636515aac2 tools: acrntrace: Remove use of binary "mkdir"
The tools currently rely on the availability of binary "mkdir" to be available
in the $PATH on the Service OS. This creates an obscure dependency. The patch
changes the code to use standard C APIs to perform the same functionality which
makes the code more self-contained.

Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Reviewed-by: Yan, Like <like.yan@intel.com>
2018-07-11 09:24:07 +08:00
Kaige Fu e699462161 tools: acrntrace: Remove use of binary "ls"
The tools currently rely on the availability of binary "ls" to be available in
the $PATH on the Service OS. This create an obscure dependency. The patch changes
the code to use standard C APIs to perform the same functionality which makes
the code more self-contained.

Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Reviewed-by: Yan, Like <like.yan@intel.com>
2018-07-11 09:24:07 +08:00
Kaige Fu a2a412244c tools: acrntrace: Remove unused function get_cpu_freq
Function get_cpu_freq is not used anymore. This patch remove it.

Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Reviewed-by: Yan, Like <like.yan@intel.com>
2018-07-11 09:24:07 +08:00
Xiangyang Wu f81fcf2f07 HV:MM:add 'U/UL' suffix for unsigned contant value
In the current memory module, there are many constatn value
without U/UL suffix, it is reported as MISRA C violations by
static analysis tool.

Add 'U/UL' suffix for unsigned contant value in memory module
as needed.

Note:In the most case, CPU_PAGE_SIZE(0x1000) is used as
unsigned integer contant value, so CPU_PAGE_SIZE is defined
as unsigned integer contant value, and it is safety converted
into unsigned long type according to MISRA C standard.

Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-11 09:23:03 +08:00
David B. Kinder b25caad29e doc: add API-GVT-g high level design doc
Transcode and publish HLD document.  Moved glossary terms to the
project-wide glossary.

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2018-07-10 16:42:22 -07:00
David B. Kinder 2c706b21a1 doc: add ACPI virtualization HLD
Transcribe and publish the reviewed ACPI virtualization HLD as another
developer guide.

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2018-07-10 14:18:07 -07:00
David B. Kinder 1707fc370a doc: add memory management HLD
Transcribe and publish the reviewed memory managment HLD into the ACRN
doc set as a developer guide

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2018-07-10 10:29:43 -07:00
Jason Chen CJ b3690987bd [REVERT-ME]: disable turbo mode
there is a bug for system hang on SBL bootloader after we enabled turbo mode.
so add tmp patch to disable turbo mode as the work-around.
after SBL fixed it, we revert this patch.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-10 16:37:40 +08:00
Mingqiang Chi 3fed57bb9f hv:fix return value violation in prepare_vm0
Check the return value for prepare_vcpu/start_vm

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-10 16:36:05 +08:00
Mingqiang Chi f01e6efdf5 hv:fix return value violation in vmexit handler
Check return value for the called functions in vmexit handler

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-10 16:35:20 +08:00
Mingqiang Chi 2686fe76bc hv: no need to return error when inject GP
GP fault is a normal case,no need to return error.

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-10 16:35:20 +08:00
Yang, Yu-chu 809eb9f6ca vioapic.c: Using suffix rather than casting
Using suffix "UL" rather than type casting 0xffffffff.

Signed-off-by: Yang, Yu-chu <yu-chu.yang@intel.com>
2018-07-10 15:56:16 +08:00
Yang, Yu-chu cb064b1133 HV: Do not return expression contains subexpression
Operation should be done outside return expression.

Signed-off-by: Yang, Yu-chu <yu-chu.yang@intel.com>
2018-07-10 15:55:33 +08:00
Yonghua Huang eb7cf14bcf HV: code format for memory.c
replace blank space indent with tabs

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-10 15:54:45 +08:00
Liang Yang d3e8c29d0e DM USB: xHCI: Update the native DRD interfaces.
There has one new DRD driver followed usb role framework which is just
upstreamed to Linux community. This patch updates the xHCI DM to be
compatible with it. DM DRD code follows DRD spec to implement and make
it more reasonable.

Signed-off-by: Liang Yang <liang3.yang@intel.com>
Reviewed-by: Xiaoguang Wu <xiaoguang.wu@intel.com>
Reviewed-by: Yu Wang <yu1.wang@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-07-10 13:42:17 +08:00
Liang Yang c638010b66 DM USB: xHCI: Set correct PCI VID/PID for APL DRD cap.
For dedicated xHCI extended capability, it need set corresponding PCI VID/PID.
This patch sets the Intel Apollo Lake platform PCI VID/PID for DRD
capability which will be checked for enabling DRD fucntion in new DRD
driver. Besides, this patch refines the PCI VID/PID related code.

Signed-off-by: Liang Yang <liang3.yang@intel.com>
Reviewed-by: Xiaoguang Wu <xiaoguang.wu@intel.com>
Reviewed-by: Yu Wang <yu1.wang@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-07-10 13:42:17 +08:00
Xiangyang Wu 1185884b97 HV:treewide:Clean up field names of struct cpuinfo_x86
In the data struct cpuinfo_x86, some field names have
prefix x86, others don't have prefix.

In order to unify names, update field names of struct
cpuinfo_x86 as per its usage purpose, remove prefix x86.

V1-->V2:
	Resolve conflict in cpu.c by rebase command
V2-->V3:
        Remove track-on id as per jack's comments

Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-10 13:24:55 +08:00
Junjie Mao abe5cb4afe HV: include: integral type cleanup
This patch cleans up the integral type violations to MISRA C rules, mostly
related to signed constants that should be unsigned but also spelling out two
integer narrowing and dropping some macros negating unsigned integers.

v1 -> v2:

    * Drop INT_ROUNDUPx macros since they are never used.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-10 13:10:10 +08:00
Junjie Mao 3956ce1596 HV: io: spell out explicit narrowing of integers
The MMIO/PIO write APIs in io.h always take a uint32_t value but may uses it as
8, 16 or 32-bit integers. This patch converts the prototypes to align with their
functionality.

The pointer conversion and assignment are splitted to separate statements to
prevent static checkers from being confused about the underlying types.

v1 -> v2:

    * Change the prototype of mmio-related functions, instead of keeping the
      explicit conversions internal. The addresses are kept void* since in most
      cases hva (in void*) is passed.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-10 13:10:10 +08:00
Junjie Mao 0f777d3fe1 HV: assert: use signed int for __LINE__
GCC preprocessor expands __LINE__ to signed decimal integers. Keep the prototype
of __assert aligned with this.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-10 13:10:10 +08:00
Junjie Mao d0c61ce424 HV: trace: integral type cleanup
In the current trace.h, the entries use proper unsigned types while some
function prototypes and local variables still use plain 'int', resulting in
implicit signedness conversions.

This patch makes the following conversions:

    * evid: int -> uint32_t,
    * n_data & cpu: 8-bit bit-field -> uint8_t,
    * local variable holding the value from strnlen_s(): int -> size_t.

Note: In the following definition:

    struct trace_entry {
        uint64_t tsc; /* TSC */
        uint64_t id:48;
	....

The type of bit-field ''id'' cannot be uint32_t since gcc complains about
bit-fields larger than the type. Thus this patch keeps it as is.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-10 13:10:10 +08:00
Yang, Yu-chu e263d8ebb9 HV: No assignment inside while loop condition
The assigment should be done outside while loop condition. To fix
it, one assigment initializaion and update statement of for loop
have been applied. The only while loop reminds to avoid very long
for loop expression.

Signed-off-by: Yang, Yu-chu <yu-chu.yang@intel.com>
2018-07-10 12:59:12 +08:00
Kaige Fu c7f26ba962 tools: acrntrace: Add support for TRACE_6C/16STR
We have TRACE_6C and TRACE_16STR API in hypervisor now. It's time to add support
for parsing data traced by both APIs.

Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Reviewed-by: Yan, Like <like.yan@intel.com>
2018-07-10 12:51:59 +08:00
Kaige Fu 3195bc481b tools: acrnlog: Deprecate binary "rm" and "mkdir" with GPLv3+
The tools currently rely on the availability of binary "rm" and "mkdir" to be
available in the $PATH on the Service OS. This create an obscure dependency.
The patch changes the code to use standard C APIs to perform the same functionality
which makes the code more self-contained.

Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Reviewed-by: Yan, Like <like.yan@intel.com>
2018-07-10 12:51:59 +08:00
Kaige Fu 8869c862d6 tools: acrnlog: Deprecate binary "ls" with GPLv3+
The tools currently rely on the availability of binary "ls" to be available in
the $PATH on the Service OS. This create an obscure dependency. The patch changes
the code to use standard C APIs to perform the same functionality which makes
the code more self-contained.

Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Reviewed-by: Yan, Like <like.yan@intel.com>
2018-07-10 12:51:59 +08:00
Huihuang Shi 0ccd74b947 HV:modified vm_description and vm_hw_info memebers' type
transfer num_vcpus,exp_num_vcpus to uint16_t.
transfer vm_hw_num_cores to uint16_t.

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-10 12:42:22 +08:00
Yang, Yu-chu 39159ebe16 HV: Assignment should not mix with operator
Removed the postfix and prefix operation in assignment expression.
Noncompliant code example:
1) *a++ = *b ++;
2) a = arr[--b];

Signed-off-by: Yang, Yu-chu <yu-chu.yang@intel.com>
2018-07-10 11:56:36 +08:00
Yin Fengwei 7ed292eeef DM: extend i6300esb device to support watchdog timeout query
6300esb has bit in its register to show whether the watchdog
timeout is hit.

This patch adds this bit support. So the guest could query
whether last reset is triggered by watchdog reset.

Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Reviewed-by: Cao Minggui <minggui.cao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Tested-by: Binbin Wu <binbin.wu@intel.com>
2018-07-10 11:53:42 +08:00
Yuan Liu 1f54b92170 lpc: resolve UOS boot-up issue caused by lpc.
The lpc dm causes that UOS can't boot if the parameters are set incorrectly,
it is not friendly to users.

This patch optimizes the lpc error handle flow. UOS always can boot successfully
whatever the lpc settings are.

Signed-off-by: Yuan Liu <yuan1.liu@intel.com>
Reviewed-by: Yu Wang <yu1.wang@intel.com>
2018-07-10 11:52:52 +08:00
Yonghua Huang 2e3135042a HV: Rename 'CPU_BOOT_ID' to 'BOOT_CPU_ID'
- code cleanup to set a more smooth name

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-07-10 11:51:12 +08:00
Yang, Yu-chu e7aa00b83a HV: Avoiding the chained assignment
To follow the Misra C standard, doing one assignment per line to
make code is clearly readable and reduces the confusion of its
intetion or typo.

Signed-off-by: Yang, Yu-chu <yu-chu.yang@intel.com>
2018-07-10 11:49:50 +08:00
Yang, Yu-chu cfca49d7c6 Changing the mem_read* from macro to inline
To be consistant with inline function mem_write, modifying the
mem_read* and using inline function instead.

Signed-off-by: Yang, Yu-chu <yu-chu.yang@intel.com>
2018-07-10 11:47:45 +08:00