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acrn-hypervisor
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HV: add the missing brackets to loop body 

MISRA-C requires the use of brackets, even when there is only one
statement in the loop body.

Signed-off-by: Ying Liu <ying2.liu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Ying Liu 2018-07-10 19:42:34 -07:00 committed by Jack Ren
parent df038fc0db
commit fd81655e60
9 changed files with 42 additions and 21 deletions
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3
hypervisor/arch/x86/assign.c
View File

@ -898,8 +898,9 @@ void ptdev_remove_msix_remapping(struct vm *vm, uint16_t virt_bdf,
return;
}
for (i = 0; i < vector_count; i++)
for (i = 0; i < vector_count; i++) {
remove_msix_remapping(vm, virt_bdf, i);
}
}
#ifdef HV_DEBUG

3
hypervisor/arch/x86/guest/vioapic.c
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@ -542,8 +542,9 @@ vioapic_reset(struct vioapic *vioapic)
/* Initialize all redirection entries to mask all interrupts */
pincount = vioapic_pincount(vioapic->vm);
for (pin = 0U; pin < pincount; pin++)
for (pin = 0U; pin < pincount; pin++) {
vioapic->rtbl[pin].reg = MASK_ALL_INTERRUPTS;
}
}
struct vioapic *

18
hypervisor/arch/x86/guest/vlapic.c
View File

@ -679,11 +679,13 @@ dump_isrvec_stk(struct vlapic *vlapic)
struct lapic_reg *isrptr;
isrptr = &vlapic->apic_page->isr[0];
for (i = 0; i < 8; i++)
for (i = 0; i < 8; i++) {
printf("ISR%d 0x%08x\n", i, isrptr[i].val);
}
for (i = 0; i <= vlapic->isrvec_stk_top; i++)
for (i = 0; i <= vlapic->isrvec_stk_top; i++) {
printf("isrvec_stk[%d] = %d\n", i, vlapic->isrvec_stk[i]);
}
}
/*
@ -1511,11 +1513,13 @@ vlapic_reset(struct vlapic *vlapic)
vlapic->svr_last = lapic->svr;
for (i = 0; i < VLAPIC_MAXLVT_INDEX + 1; i++)
for (i = 0; i < VLAPIC_MAXLVT_INDEX + 1; i++) {
vlapic->lvt_last[i] = 0;
}
for (i = 0; i < ISRVEC_STK_SIZE; i++)
for (i = 0; i < ISRVEC_STK_SIZE; i++) {
vlapic->isrvec_stk[i] = 0;
}
vlapic->isrvec_stk_top = 0;
}
@ -1555,8 +1559,9 @@ void vlapic_restore(struct vlapic *vlapic, struct lapic_regs *regs)
lapic->ppr = regs->ppr;
lapic->ldr = regs->ldr;
lapic->dfr = regs->dfr;
for (i = 0; i < 8; i++)
for (i = 0; i < 8; i++) {
lapic->tmr[i].val = regs->tmr[i].val;
}
lapic->svr = regs->svr;
vlapic_svr_write_handler(vlapic);
lapic->lvt[APIC_LVT_TIMER].val = regs->lvt[APIC_LVT_TIMER].val;
@ -1687,8 +1692,9 @@ vlapic_reset_tmr(struct vlapic *vlapic)
dev_dbg(ACRN_DBG_LAPIC,
"vlapic resetting all vectors to edge-triggered");
for (vector = 0; vector <= 255; vector++)
for (vector = 0; vector <= 255; vector++) {
vlapic_set_tmr(vlapic, vector, false);
}
vcpu_make_request(vlapic->vcpu, ACRN_REQUEST_TMR_UPDATE);
}

9
hypervisor/arch/x86/guest/vm.c
View File

@ -98,9 +98,10 @@ int create_vm(struct vm_description *vm_desc, struct vm **rtn_vm)
goto err1;
}
for (id = 0U; id < (size_t)(sizeof(long) * 8U); id++)
for (id = 0U; id < (size_t)(sizeof(long) * 8U); id++) {
if (!bitmap_test_and_set(id, &vmid_bitmap))
break;
}
vm->attr.id = id;
vm->attr.boot_idx = id;
@ -271,8 +272,9 @@ void pause_vm(struct vm *vm)
vm->state = VM_PAUSED;
foreach_vcpu(i, vm, vcpu)
foreach_vcpu(i, vm, vcpu) {
pause_vcpu(vcpu, VCPU_ZOMBIE);
}
}
void resume_vm(struct vm *vm)
@ -280,8 +282,9 @@ void resume_vm(struct vm *vm)
uint16_t i;
struct vcpu *vcpu = NULL;
foreach_vcpu(i, vm, vcpu)
foreach_vcpu(i, vm, vcpu) {
resume_vcpu(vcpu);
}
vm->state = VM_STARTED;
}

3
hypervisor/arch/x86/guest/vmsr.c
View File

@ -96,8 +96,9 @@ void init_msr_emulation(struct vcpu *vcpu)
msr_bitmap = vcpu->vm->arch_vm.msr_bitmap;
for (i = 0U; i < msrs_count; i++)
for (i = 0U; i < msrs_count; i++) {
enable_msr_interception(msr_bitmap, emulated_msrs[i]);
}
enable_msr_interception(msr_bitmap, MSR_IA32_PERF_CTL);

6
hypervisor/arch/x86/ioapic.c
View File

@ -421,9 +421,10 @@ void suspend_ioapic(void)
addr = map_ioapic(get_ioapic_base(ioapic_id));
nr_pins = ioapic_nr_pins(addr);
for (ioapic_pin = 0U; ioapic_pin < nr_pins; ioapic_pin++)
for (ioapic_pin = 0U; ioapic_pin < nr_pins; ioapic_pin++) {
ioapic_get_rte_entry(addr, ioapic_pin,
&saved_rte[ioapic_id][ioapic_pin]);
}
}
}
@ -437,9 +438,10 @@ void resume_ioapic(void)
addr = map_ioapic(get_ioapic_base(ioapic_id));
nr_pins = ioapic_nr_pins(addr);
for (ioapic_pin = 0U; ioapic_pin < nr_pins; ioapic_pin++)
for (ioapic_pin = 0U; ioapic_pin < nr_pins; ioapic_pin++) {
ioapic_set_rte_entry(addr, ioapic_pin,
&saved_rte[ioapic_id][ioapic_pin]);
}
}
}

9
hypervisor/arch/x86/irq.c
View File

@ -31,8 +31,9 @@ static void init_irq_desc(void)
spinlock_init(&irq_desc_base[i].irq_lock);
}
for (i = 0U; i <= NR_MAX_VECTOR; i++)
for (i = 0U; i <= NR_MAX_VECTOR; i++) {
vector_to_irq[i] = IRQ_INVALID;
}
}
@ -151,8 +152,9 @@ static void _irq_desc_free_vector(uint32_t irq)
if (vector_to_irq[vr] == irq)
vector_to_irq[vr] = IRQ_INVALID;
for (pcpu_id = 0U; pcpu_id < phys_cpu_num; pcpu_id++)
for (pcpu_id = 0U; pcpu_id < phys_cpu_num; pcpu_id++) {
per_cpu(irq_count, pcpu_id)[irq] = 0UL;
}
}
static void disable_pic_irq(void)
@ -188,8 +190,9 @@ irq_desc_append_dev(struct irq_desc *desc, void *node, bool share)
added = false;
} else {
/* dev_list point to last valid node */
while (dev_list->next != NULL)
while (dev_list->next != NULL) {
dev_list = dev_list->next;
}
/* add node */
dev_list->next = node;
}

9
hypervisor/arch/x86/vtd.c
View File

@ -235,8 +235,9 @@ static void iommu_flush_cache(struct dmar_drhd_rt *dmar_uint,
if (iommu_ecap_c(dmar_uint->ecap) != 0U)
return;
for (i = 0U; i < size; i += CACHE_LINE_SIZE)
for (i = 0U; i < size; i += CACHE_LINE_SIZE) {
clflush((char *)p + i);
}
}
#if DBG_IOMMU
@ -1157,10 +1158,11 @@ void suspend_iommu(void)
dmar_invalid_iotlb_global(dmar_unit);
/* save IOMMU fault register state */
for (i = 0U; i < IOMMU_FAULT_REGISTER_STATE_NUM; i++)
for (i = 0U; i < IOMMU_FAULT_REGISTER_STATE_NUM; i++) {
iommu_fault_state[iommu_idx][i] =
iommu_read32(dmar_unit, DMAR_FECTL_REG +
i * IOMMU_FAULT_REGISTER_STATE_NUM);
}
/* disable translation */
dmar_disable_translation(dmar_unit);
@ -1197,10 +1199,11 @@ void resume_iommu(void)
dmar_invalid_iotlb_global(dmar_unit);
/* restore IOMMU fault register state */
for (i = 0U; i < IOMMU_FAULT_REGISTER_STATE_NUM; i++)
for (i = 0U; i < IOMMU_FAULT_REGISTER_STATE_NUM; i++) {
iommu_write32(dmar_unit, DMAR_FECTL_REG +
i * IOMMU_FAULT_REGISTER_STATE_NUM,
iommu_fault_state[iommu_idx][i]);
}
/* enable translation */
dmar_enable_translation(dmar_unit);

3
hypervisor/boot/acpi.c
View File

@ -118,8 +118,9 @@ biosacpi_search_rsdp(char *base, int length)
strnlen_s(ACPI_SIG_RSDP, 8)) == 0) {
cp = (uint8_t *)rsdp;
sum = NULL;
for (idx = 0; idx < RSDP_CHECKSUM_LENGTH; idx++)
for (idx = 0; idx < RSDP_CHECKSUM_LENGTH; idx++) {
sum += *(cp + idx);
}
if (sum != NULL)
continue;