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DM USB: xHCI: Set correct PCI VID/PID for APL DRD cap. 

For dedicated xHCI extended capability, it need set corresponding PCI VID/PID.
This patch sets the Intel Apollo Lake platform PCI VID/PID for DRD
capability which will be checked for enabling DRD fucntion in new DRD
driver. Besides, this patch refines the PCI VID/PID related code.

Signed-off-by: Liang Yang <liang3.yang@intel.com>
Reviewed-by: Xiaoguang Wu <xiaoguang.wu@intel.com>
Reviewed-by: Yu Wang <yu1.wang@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
This commit is contained in:
Liang Yang 2018-06-25 15:43:44 +08:00 committed by lijinxia
parent 1185884b97
commit c638010b66
2 changed files with 19 additions and 2 deletions
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11
devicemodel/hw/pci/xhci.c
View File

@ -366,6 +366,8 @@ struct pci_xhci_vdev {
struct pci_xhci_dev_emu **devices; /* XHCI[port] = device */
struct pci_xhci_dev_emu **slots; /* slots assigned from 1 */
int ndevices;
uint16_t pid;
uint16_t vid;
void *excap_ptr;
int (*excap_write)(struct pci_xhci_vdev *, uint64_t, uint64_t);
@ -3447,6 +3449,8 @@ pci_xhci_parse_extcap(struct pci_xhci_vdev *xdev, char *opts)
if (!strncmp(cap, "apl", 3)) {
xdev->excap_write = pci_xhci_apl_drdregs_write;
xdev->excap_ptr = excap_group_apl;
xdev->vid = XHCI_PCI_VENDOR_ID_INTEL;
xdev->pid = XHCI_PCI_DEVICE_ID_INTEL_APL;
} else
rc = -2;
@ -3575,6 +3579,9 @@ pci_xhci_init(struct vmctx *ctx, struct pci_vdev *dev, char *opts)
xdev->excap_ptr = excap_group_dft;
xdev->vid = XHCI_PCI_DEVICE_ID_DFLT;
xdev->pid = XHCI_PCI_VENDOR_ID_DFLT;
/* discover devices */
error = pci_xhci_parse_opts(xdev, opts);
if (error < 0)
@ -3639,8 +3646,8 @@ pci_xhci_init(struct vmctx *ctx, struct pci_vdev *dev, char *opts)
*/
xdev->hccparams1 |= XHCI_SET_HCCP1_XECP(XHCI_EXCAP_PTR);
pci_set_cfgdata16(dev, PCIR_DEVICE, 0x1E31);
pci_set_cfgdata16(dev, PCIR_VENDOR, 0x8086);
pci_set_cfgdata16(dev, PCIR_DEVICE, xdev->pid);
pci_set_cfgdata16(dev, PCIR_VENDOR, xdev->vid);
pci_set_cfgdata8(dev, PCIR_CLASS, PCIC_SERIALBUS);
pci_set_cfgdata8(dev, PCIR_SUBCLASS, PCIS_SERIALBUS_USB);
pci_set_cfgdata8(dev, PCIR_PROGIF, PCIP_SERIALBUS_USB_XHCI);

10
devicemodel/include/xhcireg.h
View File

@ -240,6 +240,16 @@
#define EXCAP_GROUP_END 0xFFFF
#define EXCAP_GROUP_NULL NULL
/* xHCI PCI Vendor IDs */
#define XHCI_PCI_VENDOR_ID_INTEL 0x8086
/* xHCI PCI Device IDs */
#define XHCI_PCI_DEVICE_ID_INTEL_APL 0x5aa8
/* Default xHCI PCI VID/PID */
#define XHCI_PCI_VENDOR_ID_DFLT XHCI_PCI_VENDOR_ID_INTEL
#define XHCI_PCI_DEVICE_ID_DFLT 0x1e31
/* Intel APL xHCI DRD Configuration registers */
#define XHCI_DRD_MUX_CFG0 0x0000
#define XHCI_DRD_MUX_CFG1 0x0004