Commit Graph

106 Commits

Author SHA1 Message Date
Huihuang Shi bd6979925c fix assign.c interger violations
fix all assign.c integer violations except related
"Implicit conversion: actual to formal param".

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-23 10:31:57 +08:00
Xiaoguang Wu 640d896508 DM USB: change TRB ring processing logic for ISOC transfer
Current ring buffer processing logic assumes every transaction
will be submited to physical device before next transaction
coming. So it use two states 0 (free) and 1 (used) to represent
the state of every data block in the ring buffer. With the help
of the two state, the ring buffer could accept and process data
normally.

But this logic is not proper for ISOC transfer, which generally
submits many transactions even none of them arrive the physical
device. So this patch uses three values to represent the state
of data block in the ring buffer:
USB_XFER_BLK_FREE: this block could be filled with new data;
USB_XFER_BLK_HANDLING: this block is submited to physical device
but response from device is still not received;
USB_XFER_BLK_HANDLED: this block has been processed by physical
device.

The new logic will do different things for each state, which will
make the ISOC transfer work successfully.

Change-Id: I5559cae24c739633289742d64dd51751797b81a7
Tracked-On:
Signed-off-by: Xiaoguang Wu <xiaoguang.wu@intel.com>
Reviewed-by: Liang Yang <liang3.yang@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
2018-07-20 10:42:34 +08:00
Xiaoguang Wu 531712405e DM USB: xHCI: add support for USB 3.0 devices
This patch is used to add support for USB 3.0 devices. Currently
USB 3.0 disk is supported and tested successfully.

Change-Id: I3fbfbe9c28bc4b14af0417104f8fa822f9758908
Tracked-On:
Signed-off-by: Xiaoguang Wu <xiaoguang.wu@intel.com>
Reviewed-by: Liang Yang <liang3.yang@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
2018-07-20 10:42:34 +08:00
Junjie Mao 3571afc683 HV: hypercall: revisit types in structure parameters
While fixing the MISRA C violations related to integral types, we have unified
the type of the following data:

    uint8_t:
        phys_pin, virt_pin, vpic_pin, ioapic_pin, vioapic_pin

    uint16_t:
        vm_id, pcpu_id, vcpu_id, vpid

    uint32_t:
        vector, irq

This patch revisits the types of the fields in vhm_request as well as the
structures used as parameters in the hypercalls, and make them aligned with the
types the hypervisor uses for such data. Reserved fields are added to keep the
size and layout of the structures. Implicit paddings are also made explicit as
reserved fields.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-19 14:38:15 +08:00
Huihuang Shi f2774e496b HV:common:fix "integer type violations"
fix integer type violations,keep some violations which
related to hypcall and msix_entry_index.

V1->V2:1.modified API_MAJOR_VERSION from Makefile
       2.sync acrn_common.h changed to device model

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-18 12:31:14 +08:00
Yin Fengwei 9878543356 DM: add system reset (with RAM content kept)
This function add high level reset_vdev function. Which is
implemented to call deinit/init pairing to emulate the virtual
device reset operation.

This patch also add the system reset which keep the UOS RAM
content functionality to DM.

Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-07-17 14:11:12 +08:00
Yin Fengwei b33012aee8 DM: add vm reset API
vm reset API will be used by guest system reset and S3.

Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-07-17 14:11:12 +08:00
Yin Fengwei 8d12c06270 dm: introduce system/full reset and suspend
Guest has erquirement to support system/full reboot and S3. Which could
trigger different reset path in guest

Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-07-17 14:11:12 +08:00
Yin Fengwei 76662a634f loader: Update the memory address of GUEST_CFG_OFFSET
GUEST_CFG_OFFSET is used to pass the memory top info from DM
to HV. The address should be in E820 reserved range to prevent
guest use it for other purpose.

Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-07-17 14:11:12 +08:00
Liang Yang d3e8c29d0e DM USB: xHCI: Update the native DRD interfaces.
There has one new DRD driver followed usb role framework which is just
upstreamed to Linux community. This patch updates the xHCI DM to be
compatible with it. DM DRD code follows DRD spec to implement and make
it more reasonable.

Signed-off-by: Liang Yang <liang3.yang@intel.com>
Reviewed-by: Xiaoguang Wu <xiaoguang.wu@intel.com>
Reviewed-by: Yu Wang <yu1.wang@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-07-10 13:42:17 +08:00
Liang Yang c638010b66 DM USB: xHCI: Set correct PCI VID/PID for APL DRD cap.
For dedicated xHCI extended capability, it need set corresponding PCI VID/PID.
This patch sets the Intel Apollo Lake platform PCI VID/PID for DRD
capability which will be checked for enabling DRD fucntion in new DRD
driver. Besides, this patch refines the PCI VID/PID related code.

Signed-off-by: Liang Yang <liang3.yang@intel.com>
Reviewed-by: Xiaoguang Wu <xiaoguang.wu@intel.com>
Reviewed-by: Yu Wang <yu1.wang@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-07-10 13:42:17 +08:00
Xiangyang Wu 49d1dc1534 HV:treewide: Clean up -1U or -1UL
According to C99 standard, -1 integer constant with 'U/UL'
suffix has no type.

To explicit the integer constant:
Update -1U or -1UL as ~0U or ~0UL, or invalid number according
to usage case.

V1-->V2:
	Update parameter name and type of send_startup_ipi since
	the second parameter is used as pcpu_id;
	Update related comments for code clearity.
V2-->V3:
	Update comments of struct acrn_irqline;
	rename  cpu_startup_dest as dest_pcpu_id in the second
	parameter of send_startup_ipi.

Tracked-on: ccm0001001-247033
Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-10 10:27:33 +08:00
Junjie Mao d457874cf5 treewide: instr_emul: rename vm_reg to cpu_reg
The current register names in instr_emul are misleading since the register names
are not VM-specific. Rename VM_REG(_GUEST) to CPU_REG in both the hypervisor and
device model.

v1 -> v2:

    * Introduced.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2018-07-05 13:14:07 +08:00
Huihuang Shi b3fa2efe56 public:fix "signed/unsigned conversion without cast"
Misra C required signed/unsigned conversion with cast.

V1->V2:
  a.split patch to patch series

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-04 12:18:38 +08:00
Yonghua Huang 61cd6946d0 DM: Remove 'strictio' from UOS bootargs' options
- UOS will boot fail if 'strictio' is enabled ('-e' option), in this
   case (with '-e'), device model will block all PIO accesses whose
   handlers were not registered, after that, device model program will
   exit, hence UOS boot fail.

   actually, such kind of accesses exist, e.g. UOS would program
   PIT registers (port address: 0x43) if hpet is disabled.

 - For debug, we can trap unexpected PIO access in 'default_inout()'

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-07-02 12:33:52 +08:00
Li, Fei1 6f097b1633 dm: remove set vm memory by cma
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-06-29 13:11:48 +08:00
Li, Fei1 652e37e908 dm: use hugetlb by default
use hugetlb to set vm memory by default.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-06-29 13:11:48 +08:00
Edwin Zhai b4aa981bc0 DM: make removing vGSI capability option as local
Current option of removing vGSI capability is global, which exposes
vIOAPIC link for all ptdev even only one need this. This patch makes
it as ptdev local option to lower the system level impact. To keep
vGSI for MSI capable ptdev, just explicitly append ",keep_gsi" in
option list, like "-s 14,passthru,0/e/0,keep_gsi"

Signed-off-by: Edwin Zhai <edwin.zhai@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-06-29 09:50:15 +08:00
Shiqing Gao 789899d05f dm: deal with physical GSI sharing
- hardcode the devices' GSI info based on the platform
- reject the passthrough if the following requirement is not met
  all the PCI devices that are sharing the same GSI should be assigned
  to same VM to avoid physical GSI sharing between multiple VMs.

v4 -> v5
 * Move the gsi_dev_mapping_tables definition in a separate file
 * Add the GSI info that might be used by GPIO
 * Update the HW name

v3 - > v4
 * Refine the format of raw data to improve the readability
 * Remove the redundant code when adding the new dev into the gsi
    sharing group

v2 -> v3
 * Add the MSI/MSI-x capability check
   Do not add the device which supports MSI/MSI-x to the GSI sharing
   group.

v1 -> v2
 * Update the GSI raw data based on SBL
 * Free the resources when gsi sharing violation occurs
 * Move the MACRO PCI_BDF(b, d, f) to pci_core.h since passthrough.c
    and gsi_sharing.c are both using it

Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Reviewed-by: Edwin Zhai <edwin.zhai@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-29 00:50:01 +08:00
Xiangyang Wu 6192773a86 DM: Update the vcpu id type as uint16_t for vm_create_vcpu
Update the vcpu id type as uint16_t for vm_create_vcpu, this
keeps alignment with the updates for the structure acrn_create_vcpu
used by hcall_create_vcpu in the hypervisor.

In the device model, the caller is responsible for vcpu id type
conversion; vcpu id type is uint16_t for external interface in the
current implement.

Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-29 00:50:01 +08:00
Anitha Chrisanthus 359e5cf794 dm: Disable stolen memory for passthru graphics
When enabling GPU passthru for guest, stolen memory needs to be
disabled. This change disables stolen memory in passthru mode.

Signed-off-by: Anitha Chrisanthus <anitha.chrisanthus@intel.com>
Reviewed-by: Gong Zhipeng <zhipeng.gong@intel.com>
2018-06-29 00:50:01 +08:00
Xiangyang Wu 3027bfab10 HV: treewide: enforce unsignedness of pcpu_id
In the hypervisor, physical cpu id is defined as "int" or "uint32_t"
type in the hypervisor. So there are some sign conversion issues
about  physical cpu id (pcpu_id) reported by static analysis tool.
Sign conversion violates the rules of MISRA C:2012.

In this patch, define physical cpu id as "uint16_t" type for all
modules in the hypervisor and change related codes. The valid
range of pcpu_id is 0~65534, INVALID_PCPU_ID is defined to the
invalid pcpu_id for error detection, BROADCAST_PCPU_ID is
broadcast pcpu_id used to notify all valid pcpu.

The type of pcpu_id in the struct vcpu and vcpu_id is "int" type,
this will be fixed in another patch.

V1-->V2:
    *  Change the type of pcpu_id from uint32_t to uint16_t;
    *  Define INVALID_PCPU_ID for error detection;
    *  Define BROADCAST_PCPU_ID to notify all valid pcpu.

V2-->V3:
    *  Update comments for INVALID_PCPU_ID and BROADCAST_PCPU_ID;
    *  Update addtional pcpu_id;
    *  Convert hexadecimals to unsigned to meet the type of pcpu_id;
    *  Clean up for MIN_PCPU_ID and MAX_PCPU_ID, they will be
       defined by configuration.
Note: fix bug in the init_lapic(), the pcpu_id shall be less than 8,
this is constraint by implement in the init_lapic().
Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-21 16:59:21 +08:00
Yuan Liu 48067b1cab IOC mediator: Implement VM monitor operations
This patch implements VM monitor operations including stop/suspend/resume.
For other VM monitor operations(pause/unpause/query), IOC mediator would not
register callbacks for them since there is no requirements from VM Manager.

Signed-off-by: Yuan Liu <yuan1.liu@intel.com>
Reviewed-by: Yu Wang <yu1.wang@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
2018-06-21 11:27:15 +08:00
Zhi Jin 02f0ecddc1 DM: implement emulated npk pci device
The Intel Trace Hub (aka. North Peak, NPK) is a trace aggregator for
Software, Firmware, and Hardware. On the virtualization platform, it
can be used to output the traces from SOS/UOS/Hypervisor/FW together
with unified timestamps.

There are 2 software visible MMIO space in the npk pci device. One is
the CSR which maps the configuration registers, and the other is the
STMR which is organized as many Masters, and used to send the traces.
Each Master has a fixed number of Channels, which is 128 on GP. Each
channel occupies 64B, so the offset of each Master is 8K (64B*128).
Here is the detailed layout of STMR:
                         M=NPK_SW_MSTR_STP (1024 on GP)
                       +-------------------+
                       |    m[M],c[C-1]    |
          Base(M,C-1)  +-------------------+
                       |        ...        |
                       +-------------------+
                       |     m[M],c[0]     |
            Base(M,0)  +-------------------+
                       |        ...        |
                       +-------------------+
                       |    m[i+1],c[1]    |
          Base(i+1,1)  +-------------------+
                       |    m[i+1],c[0]    |
          Base(i+1,0)  +-------------------+
                       |        ...        |
                       +-------------------+
                       |     m[i],c[1]     |
Base(i,1)=SW_BAR+0x40  +-------------------+
                       |     m[i],c[0]     |  64B
     Base(i,0)=SW_BAR  +-------------------+
                        i=NPK_SW_MSTR_STRT (256 on GP)

CSR and STMR are treated differently in npk virtualization because:
1. CSR configuration should come from just one OS, instead of each OS.
In our case, it should come from SOS.
2. For performance and timing concern, the traces from each OS should
be written to STMR directly.

Based on these, the npk virtualization is implemented in this way:
1. The physical CSR is owned by SOS, and dm/npk emulates a software
one for the UOS, to keep the npk driver on UOS unchanged. Some CSR
initial values are configured to make the UOS npk driver think it
is working on a real npk. The CSR configuration from UOS is ignored
by dm, and it will not bring any side-effect. Because traces are the
only things needed from UOS, the location to send traces to and the
trace format are not affected by the CSR configuration.
2. Part of the physical STMR will be reserved for the SOS, and the
others will be passed through to the UOS, so that the UOS can write
the traces to the MMIO space directly.

A parameter is needed to indicate the offset and size of the Masters
to pass through to the UOS. For example, "-s 0:2,npk,512/256", there
are 256 Masters from #768 (256+512, #256 is the starting Master for
software tracing) passed through to the UOS.

            CSR                       STMR
SOS:  +--------------+  +----------------------------------+
      | physical CSR |  | Reserved for SOS |               |
      +--------------+  +----------------------------------+
UOS:  +--------------+                     +---------------+
      | sw CSR by dm |                     | mapped to UOS |
      +--------------+                     +---------------+

Here is an overall flow about how it works.
1. System boots up, and the npk driver on SOS is loaded.
2. The dm is launched with parameters to enable npk virtualization.
3. The dm/npk sets up a bar for CSR, and some values are initialized
based on the parameters, for example, the total number of Masters for
the UOS.
4. The dm/npk sets up a bar for STMR, and maps part of the physical
STMR to it with an offset, according to the parameters.
5. The UOS boots up, and the native npk driver on the UOS is loaded.
6. Enable the traces from UOS, and the traces are written directly to
STMR, but not output by npk for now.
7. Enable the npk output on SOS, and now the traces are output by npk
to the selected target.
8. If the memory is the selected target, the traces can be retrieved
from memory on SOS, after stopping the traces.

Signed-off-by: Zhi Jin <zhi.jin@intel.com>
Reviewed-by: Zhang Di <di.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-07 16:11:49 +08:00
David B. Kinder 3c09933aa1 license: more spdx license tag updates
Additional files updated with an spdx license header

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2018-06-04 14:29:45 +08:00
David B. Kinder 04323a0663 doc: fix doxygen comments in virtio.h
Fixes a recent PR #311 that added a new API but the doxygen comments for
one of the parameters didn't match the parameter name.

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2018-06-01 13:16:58 +08:00
David B. Kinder f4122d99c5 license: Replace license text with SPDX tag
Replace the BSD-3-Clause boiler plate license text with an SPDX tag.

Fixes: #189

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2018-06-01 10:43:06 +08:00
YanLiang 0679a81972 DM USB: xHCI: Support APL extended capability for DRD.
This patch implements Intel ApolloLake xHCI extended capabilities. It
includes two dual role switch registers for switching shared
USB2&USB3 phys between xHCI and xDCI.

Change-Id: I2533537d8a4224da3cf9b2e7475aab9f65347a4a
Signed-off-by: Liang Yang <liang3.yang@intel.com>
Reviewed-by: Xiaoguang Wu <xiaoguang.wu@intel.com>
Reviewed-by: Yu Wang <yu1.wang@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
2018-05-31 11:26:38 +08:00
YanLiang c91590ccfd DM USB: xHCI: refine xHCI extended capability related functions.
Every platform should have their own xHCI specific extended
capabilities, but the current xHCI DM is not scalable for them. This
patch refines related logic to make it scalable.

Current code only support 4 registers(4*32) as basic extended
capabilites. Base on this new implementation, the mmio range from
excapoff to regsend will cover real excap size according to the cap
parameter.

Change-Id: Ic55a4494e090ec255939cdb8f32950e3c8a66082
Signed-off-by: Liang Yang <liang3.yang@intel.com>
Reviewed-by: Xiaoguang Wu <xiaoguang.wu@intel.com>
Reviewed-by: Yu Wang <yu1.wang@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
2018-05-31 11:26:38 +08:00
yuhong.tao@intel.com 9af35baf5a DM:monitor: add monitor_register_vm_ops()
monitor_vm_ops and its helpers is added to allow DM to register operations
, so thant vm manager could trigger the power state changes of VM.

Reviewed-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
Reviewed-by: Yan, Like <like.yan@intel.com>
Reviewed-by: Wang, Yu <yu1.wang@intel.com>
signed-off-by: Yan Like <like.yan@intel.com>
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
2018-05-31 11:25:47 +08:00
yuhong.tao@intel.com eada59c934 DM: adapt dm-monitor and acrnctl to use the helpers
Adapt dm-monitor and acrnctl to use the helper functions and new message
definitions in acrn_mngr.h.
These jobs must be done in one commit to avoid build problems:
1. message transmission and callback registration code are moved
 to libacrn-mngr.a, so old functions in dm-monitor could be removed to
 make code clean;
2. remove unnecessary monior_msg.h;
3. minor changes to acrnctl accordingly.

Reviewed-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
Reviewed-by: Wang, Yu <yu1.wang@intel.com>
signed-off-by: Yan Like <like.yan@intel.com>
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
2018-05-31 11:25:47 +08:00
Jian Jun Chen c001911e19 dm: virtio: support virtio 1.0 PCI configuration access capability
The VIRTIO_PCI_CAP_PCI_CFG capability creates an alternative access
method to the common configuration, notification, ISR and device-
specific configuration regions.

To access a device region, the driver writes into the capability
structure (ie. within the PCI configuration space) as follows:

- The driver sets the BAR to access by writing to cap.bar
- The driver sets the size of the access by writing 1, 2 or 4 to
  cap.length
- The driver sets the offset within the BAR by writing to cap.offset

At that point, pci_cfg_data will provide a window of size cap.length
into the given cap.bar at offset cap.offset.

Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com>
Reviewed-by: Hao Li <hao.l.li@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Acked-by: Kevin Tian <kevin.tian@intel.com>
2018-05-31 11:25:15 +08:00
Jian Jun Chen f0729cd91d dm: add pci_emul_find_capability
pci_emul_find_capability can be used to get the offset of a PCI
capability in PCI configuration space.

Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com>
Reviewed-by: Hao Li <hao.l.li@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Acked-by: Kevin Tian <kevin.tian@intel.com>
2018-05-31 11:25:15 +08:00
Junjie Mao ef3cb5ba1c treewide: remove unnecessary unnamed structs/unions
According to the syntax defined in C99, each struct/union field must have an
identifier. This patch removes unnamed struct/union fields that can be easily
expressed in a C99-compatible way.

Here is a summary of structs/unions removed.

struct vhm_request:

    union {
        uint32_t type;                  uint32_t type;
        int32_t reserved0[16];    =>    int32_t reserved0[15];
    };

struct vhm_request_buffer:

    struct vhm_request_buffer {
        union {                         union vhm_request_buffer {
            struct vhm_request ...; =>        struct vhm_request ...;
            int8_t reserved[4096];            int8_t reserved[4096];
        }                               }
    }

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
2018-05-29 14:12:15 +08:00
Edwin Zhai 4b4e1e1c59 DM: Add option of no check against ptdev reset
With '--ptdev_no_reset', DM doen not abort but warn when assign PCIe
dev without reset capability.

Signed-off-by: Edwin Zhai <edwin.zhai@intel.com>
Acked-by: Kevin Tian <kevin.tian@intel.com>
2018-05-29 13:44:13 +08:00
Wu, Xiaoguang 9f56364cad DM USB: xHCI: add log level switch
Support log level options, which could change the related log level
without code change.

The new usage:
  -s <n>,xhci,[bus1-port1,bus2-port2]:[tablet]:[log=x]
  eg: -s 8,xhci,1-2,2-2:log=D
  eg: -s 7,xhci,tablet
  eg: -s 7,xhci,1-2,2-2:tablet

Note: please follow the board hardware design, assign the ports
according to the receptacle connection

Change-Id: I44639c7b076d21a40eb8f7b99cea8decc5c13c0c
Signed-off-by: Wu, Xiaoguang <xiaoguang.wu@intel.com>
Reviewed-by: Shuo Liu <shuo.a.liu@intel.com>
Reviewed-by: Yu Wang <yu1.wang@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-29 10:35:05 +08:00
Wu, Xiaoguang 6449950ccc DM USB: xHCI: add xHCI de-initialization support
add support for xHCI de-initialization when the guest
dose shutdown or reboot.

Change-Id: I3dfc1ed1a905b455ef455dff2065e872aa5c1ef8
Signed-off-by: Wu, Xiaoguang <xiaoguang.wu@intel.com>
Reviewed-by: Shuo Liu <shuo.a.liu@intel.com>
Reviewed-by: Yu Wang <yu1.wang@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-29 10:35:05 +08:00
Wu, Xiaoguang 048b2c76a3 DM USB: xHCI: add port sharing feature
add support for xHCI port sharing feature, which enable the ability
to assign different native ports to different multi-UOSes. For
example:
1-2,1-2 assigned to UOS-1.
1-1,2-1 assigned to UOS-2.

Change-Id: I899070f7a8a6eb23179e41e7b1f1da24c52482b2
Signed-off-by: Wu, Xiaoguang <xiaoguang.wu@intel.com>
Reviewed-by: Shuo Liu <shuo.a.liu@intel.com>
Reviewed-by: Yu Wang <yu1.wang@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-29 10:35:05 +08:00
Wu, Xiaoguang 8aef2cb34b DM USB: Add some APIs for check native related configurations.
New USB APIs:
usb_native_is_bus_existed/usb_native_is_port_existed: Check if specific
usb bus or port are valid or not.
usb_native_is_ss_port: Check if the specific port is supper speed usb port.

Change-Id: I9ab54f6e81742321128d6abd5845ef966f0e9f37
Signed-off-by: Wu, Xiaoguang <xiaoguang.wu@intel.com>
Reviewed-by: Shuo Liu <shuo.a.liu@intel.com>
Reviewed-by: Yu Wang <yu1.wang@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-29 10:35:05 +08:00
Wu, Xiaoguang 7687a3d0d7 DM USB: xHCI: support bulk and interrupt transfer for port mapper
Support USB mouse, USB keyboard and USB flash drive by enabling the
USB bulk and interrupt transfer for port mapper.

Change-Id: Ia202729e0cfb26fb44a6b278cf4306f2b0b6fa36
Signed-off-by: Wu, Xiaoguang <xiaoguang.wu@intel.com>
Reviewed-by: Shuo Liu <shuo.a.liu@intel.com>
Reviewed-by: Yu Wang <yu1.wang@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-29 10:35:05 +08:00
Wu, Xiaoguang caf4916e99 DM USB: xHCI: Support control transfer for USB port mapper.
This patch implements the control transfer for port mapper. With this
patch, USB2.0 device can be enumerated successfully in user OS.

Change-Id: I567bd00ca310d68375acd94a5cc5bcd287665df1
Signed-off-by: Wu, Xiaoguang <xiaoguang.wu@intel.com>
Reviewed-by: Shuo Liu <shuo.a.liu@intel.com>
Reviewed-by: Yu Wang <yu1.wang@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-29 10:35:05 +08:00
Wu, Xiaoguang 2d1fb7e480 DM USB: move the UREQ macro into common header
move the UREQ macro from usb_mouse.c to usb.h

Change-Id: I977cf73291610b0448eb031a500788a397b55f88
Signed-off-by: Wu, Xiaoguang <xiaoguang.wu@intel.com>
Reviewed-by: Shuo Liu <shuo.a.liu@intel.com>
Reviewed-by: Yu Wang <yu1.wang@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-29 10:35:05 +08:00
Wu, Xiaoguang aa0480f44e DM USB: extend the API for struct usb_devemu
For the purpose of USB port mapper, change struct usb_devemu to
common interface between HCD layer and USB device layer.

Besides, implements ue_init/ue_deinit/ue_info for port mapper.

Change-Id: Id4b7345c7b321b9bdab58139c61169d9229cb6f8
Signed-off-by: Wu, Xiaoguang <xiaoguang.wu@intel.com>
Reviewed-by: Shuo Liu <shuo.a.liu@intel.com>
Reviewed-by: Yu Wang <yu1.wang@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-29 10:35:05 +08:00
Wu, Xiaoguang 1816d3e608 DM USB: introduce data structure and APIs for USB port mapper
Introduce the struct usb_dev which is used to abstract the physical USB
devices. And APIs for external call are also provided.

Change-Id: Ia25d52a6c670040da787f82b3bea34eee9f3d04d
Signed-off-by: Wu, Xiaoguang <xiaoguang.wu@intel.com>
Reviewed-by: Shuo Liu <shuo.a.liu@intel.com>
Reviewed-by: Yu Wang <yu1.wang@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-29 10:35:05 +08:00
Wu, Xiaoguang 8f3f66bae5 DM USB: enable log level feature for USB subsystem
Change the DPRINTF macro to UPRINTF for USB subsystem. The
UPRINTF will print log according to certain log level.

Change-Id: I5db8813357c9f684c25f23650e7c914f9063f842
Signed-off-by: Wu, Xiaoguang <xiaoguang.wu@intel.com>
Reviewed-by: Shuo Liu <shuo.a.liu@intel.com>
Reviewed-by: Yu Wang <yu1.wang@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-29 10:35:05 +08:00
Liu Yuan 0b7af5b6e1 IOC mediator: Implement state transfer operations
This patch implements INIT, ACTIVE, SUSPENDING and SUSPENDED operations of
IOC mediator lifecycle virtualization.

Signed-off-by: Liu Yuan <yuan1.liu@intel.com>
Reviewed-by: Wang Yu <yu1.wang@intel.com>
Reviewed-by: Liu Shuo <shuo.a.liu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-25 15:34:44 +08:00
Liu Yuan 11208dd6d5 IOC mediator: Implement state transfer framework
Implements state transfer framework to support IOC lifecycle virtualization.
Four states will be involved in this framework includes INIT, ACTIVE,SUSPENDING and
SUSPENDED.

Signed-off-by: Liu Yuan <yuan1.liu@intel.com>
Reviewed-by: Wang Yu <yu1.wang@intel.com>
Reviewed-by: Liu Shuo <shuo.a.liu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-25 15:34:44 +08:00
Liu Yuan 92da8f4954 IOC mediator: Separate wakeup reason and heartbeat
Separate wakeup reason and hearbeat functions from lifecycle processing since
lifecycle virtualization only contains wakeup reason and heartbeat, the other
functions of lifecycle like boot selector, are not handled by IOC mediator.

Signed-off-by: Liu Yuan <yuan1.liu@intel.com>
Reviewed-by: Wang Yu <yu1.wang@intel.com>
Reviewed-by: Liu Shuo <shuo.a.liu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-25 15:34:44 +08:00
Huang, Yang 8db85ecb25 DM: RPMB virtualization
Full logic to supprot vRPMB:
1. Automatic switch between physical or simulated RPMB.
   But hardcode to use simulated one.
2. Parse RPMB cmd to basic APIs to:
   2.1 check request frame HMAC with uos vkey
   2.2 replace RPMB frame with real values.
3. RPMB partitioning for multiple UOS.
   It's hardcoded for coming config file support.

Signed-off-by: Huang Yang <yang.huang@intel.com>
Signed-off-by: Du Min <minx.du@intel.com>
Acked-by: Zhu Bing <bing.zhu@intel.com>
2018-05-25 10:45:24 +08:00
Huang, Yang e6d57f439f DM: Add simulated RPMB support
Create file as simulated RPMB storage for pre-production usage.
Add RPMB APIs to emulate behavior of physical RPMB controllor.

Signed-off-by: Huang Yang <yang.huang@intel.com>
Signed-off-by: Du Min <minx.du@intel.com>
Acked-by: Zhu Bing <bing.zhu@intel.com>
2018-05-25 10:45:24 +08:00