dm: virtio: support virtio 1.0 PCI configuration access capability
The VIRTIO_PCI_CAP_PCI_CFG capability creates an alternative access method to the common configuration, notification, ISR and device- specific configuration regions. To access a device region, the driver writes into the capability structure (ie. within the PCI configuration space) as follows: - The driver sets the BAR to access by writing to cap.bar - The driver sets the size of the access by writing 1, 2 or 4 to cap.length - The driver sets the offset within the BAR by writing to cap.offset At that point, pci_cfg_data will provide a window of size cap.length into the given cap.bar at offset cap.offset. Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com> Reviewed-by: Hao Li <hao.l.li@intel.com> Reviewed-by: Zhao Yakui <yakui.zhao@intel.com> Acked-by: Kevin Tian <kevin.tian@intel.com>
This commit is contained in:
Jian Jun Chen
lijinxia
parent
b25a30f271
commit
c001911e19
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@ -29,6 +29,7 @@
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#include <sys/uio.h>
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#include <stdio.h>
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#include <stdint.h>
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#include <stddef.h>
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#include <pthread.h>
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#include "dm.h"
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@ -877,6 +878,25 @@ done:
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pthread_mutex_unlock(base->mtx);
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}
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static int
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virtio_find_capability(struct virtio_base *base, uint8_t cfg_type)
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{
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struct pci_vdev *dev = base->dev;
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uint8_t type;
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int rc, coff = 0;
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rc = pci_emul_find_capability(dev, PCIY_VENDOR, &coff);
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while (!rc) {
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type = pci_get_cfgdata8(dev,
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coff + offsetof(struct virtio_pci_cap, cfg_type));
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if (type == cfg_type)
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return coff;
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rc = pci_emul_find_capability(dev, PCIY_VENDOR, &coff);
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}
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return -1;
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}
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/*
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* Set virtio modern MMIO BAR (usually 4) to map the 4 capabilities.
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*/
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@ -952,6 +972,14 @@ virtio_set_modern_mmio_bar(struct virtio_base *base, int barnum)
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VIRTIO_MODERN_MEM_BAR_SIZE);
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assert(rc == 0);
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base->cfg_coff = virtio_find_capability(base, VIRTIO_PCI_CAP_PCI_CFG);
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if (base->cfg_coff < 0) {
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fprintf(stderr,
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"%s: VIRTIO_PCI_CAP_PCI_CFG not found\r\n",
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vops->name);
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return -1;
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}
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base->modern_mmio_bar_idx = barnum;
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return 0;
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}
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@ -1650,3 +1678,96 @@ virtio_pci_write(struct vmctx *ctx, int vcpu, struct pci_vdev *dev,
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fprintf(stderr, "%s: write unexpected baridx %d\r\n",
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base->vops->name, baridx);
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}
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int
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virtio_pci_modern_cfgread(struct vmctx *ctx, int vcpu, struct pci_vdev *dev,
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int coff, int bytes, uint32_t *rv)
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{
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struct virtio_base *base = dev->arg;
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struct virtio_pci_cfg_cap *cfg;
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uint32_t value;
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int cfg_coff = base->cfg_coff;
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size_t cfg_data_offset;
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cfg_data_offset = offsetof(struct virtio_pci_cfg_cap, pci_cfg_data);
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/* we only need to handle the read to
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* virtio_pci_cfg_cap.pci_cfg_data[]
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* fallback for anything else by return -1
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*/
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if ((cfg_coff > 0) && (coff >= cfg_coff + cfg_data_offset) &&
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(coff + bytes <= cfg_coff + sizeof(*cfg))) {
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cfg = (struct virtio_pci_cfg_cap *)&dev->cfgdata[cfg_coff];
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if (cfg->cap.bar == base->modern_pio_bar_idx)
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value = virtio_pci_modern_pio_read(ctx, vcpu, dev,
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cfg->cap.bar, cfg->cap.offset, cfg->cap.length);
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else if (cfg->cap.bar == base->modern_mmio_bar_idx)
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value = virtio_pci_modern_mmio_read(ctx, vcpu, dev,
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cfg->cap.bar, cfg->cap.offset, cfg->cap.length);
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else {
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fprintf(stderr, "%s: cfgread unexpected baridx %d\r\n",
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base->vops->name, cfg->cap.bar);
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value = 0;
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}
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/* update pci_cfg_data */
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if (cfg->cap.length == 1)
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pci_set_cfgdata8(dev, cfg_coff + cfg_data_offset,
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value);
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else if (cfg->cap.length == 2)
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pci_set_cfgdata16(dev, cfg_coff + cfg_data_offset,
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value);
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else
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pci_set_cfgdata32(dev, cfg_coff + cfg_data_offset,
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value);
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*rv = value;
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return 0;
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}
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return -1;
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}
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int
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virtio_pci_modern_cfgwrite(struct vmctx *ctx, int vcpu, struct pci_vdev *dev,
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int coff, int bytes, uint32_t val)
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{
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struct virtio_base *base = dev->arg;
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struct virtio_pci_cfg_cap *cfg;
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int cfg_coff = base->cfg_coff;
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size_t cfg_data_offset;
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cfg_data_offset = offsetof(struct virtio_pci_cfg_cap, pci_cfg_data);
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/* we only need to handle the write to
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* virtio_pci_cfg_cap.pci_cfg_data[]
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* fallback for anything else by return -1
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*/
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if ((cfg_coff > 0) && (coff >= cfg_coff + cfg_data_offset) &&
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(coff + bytes <= cfg_coff + sizeof(*cfg))) {
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/* default cfg write */
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if (bytes == 1)
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pci_set_cfgdata8(dev, coff, val);
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else if (bytes == 2)
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pci_set_cfgdata16(dev, coff, val);
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else
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pci_set_cfgdata32(dev, coff, val);
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cfg = (struct virtio_pci_cfg_cap *)&dev->cfgdata[cfg_coff];
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if (cfg->cap.bar == base->modern_pio_bar_idx)
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virtio_pci_modern_pio_write(ctx, vcpu, dev,
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cfg->cap.bar, cfg->cap.offset,
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cfg->cap.length, val);
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else if (cfg->cap.bar == base->modern_mmio_bar_idx)
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virtio_pci_modern_mmio_write(ctx, vcpu, dev,
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cfg->cap.bar, cfg->cap.offset,
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cfg->cap.length, val);
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else
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fprintf(stderr, "%s: cfgwrite unexpected baridx %d\r\n",
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base->vops->name, cfg->cap.bar);
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return 0;
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}
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return -1;
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}
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@ -518,6 +518,7 @@ struct virtio_base {
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uint8_t config_generation; /**< configuration generation */
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uint32_t device_feature_select; /**< current selected device feature */
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uint32_t driver_feature_select; /**< current selected guest feature */
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int cfg_coff; /**< PCI cfg access capability offset */
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};
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#define VIRTIO_BASE_LOCK(vb) \
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@ -873,6 +874,44 @@ void virtio_dev_error(struct virtio_base *base);
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*/
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int virtio_set_modern_bar(struct virtio_base *base, bool use_notify_pio);
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/**
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* @brief Handle PCI configuration space reads.
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*
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* Handle virtio PCI configuration space reads. Only the specific registers
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* that need speical operation are handled in this callback. For others just
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* fallback to pci core. This interface is only valid for virtio modern.
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*
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* @param ctx Pointer to struct vmctx representing VM context.
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* @param vcpu VCPU ID.
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* @param dev Pointer to struct pci_vdev which emulates a PCI device.
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* @param coff Register offset in bytes within PCI configuration space.
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* @param bytes Access range in bytes.
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* @param rv The value returned as read.
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*
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* @return 0 on handled and non-zero on non-handled.
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*/
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int virtio_pci_modern_cfgread(struct vmctx *ctx, int vcpu, struct pci_vdev *dev,
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int coff, int bytes, uint32_t *rv);
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/**
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* @brief Handle PCI configuration space writes.
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*
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* Handle virtio PCI configuration space writes. Only the specific registers
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* that need speical operation are handled in this callback. For others just
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* fallback to pci core. This interface is only valid for virtio modern.
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*
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* @param ctx Pointer to struct vmctx representing VM context.
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* @param vcpu VCPU ID.
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* @param dev Pointer to struct pci_vdev which emulates a PCI device.
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* @param coff Register offset in bytes within PCI configuration space.
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* @param bytes Access range in bytes.
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* @param value The value to write.
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*
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* @return 0 on handled and non-zero on non-handled.
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*/
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int virtio_pci_modern_cfgwrite(struct vmctx *ctx, int vcpu,
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struct pci_vdev *dev, int coff, int bytes,
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uint32_t val);
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/**
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* @}
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*/
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