Commit Graph

6013 Commits

Author SHA1 Message Date
Li Fei1 7c6a52037a refine ept_flush_leaf_page
Refine the logic how to skip the pSRAM region when flushing cache.

Tracked-On: #5330
Signed-off-by: Li Fei1 <fei1.li@intel.com>
2021-03-03 14:44:25 +08:00
Li Fei1 1db32f4d03 hv: ept: build 4KB page mapping in EPT for code pages of rtvm
RTVM is enforced to use 4KB pages to mitigate CVE-2018-12207 and performance jitter,
which may be introduced by splitting large page into 4KB pages on demand. It works
fine in previous hardware platform where the size of address space for the RTVM is
relatively small. However, this is a problem when the platforms support 64 bits
high MMIO space, which could be super large and therefore consumes large # of
EPT page table pages.

This patch optimize it by using large page for purely data pages, such as MMIO spaces,
even for the RTVM.

Signed-off-by: Li Fei1 <fei1.li@intel.com>
Tracked-On: #5788
2021-03-03 13:46:49 +08:00
Li Fei1 01b54241c6 hv: ept: only treak execution right for large pages
To mitigate the page size change MCE vulnerability (CVE-2018-12207), ACRN would
clear the execution permission in the EPT paging-structure entries for large pages
and then intercept an EPT execution-permission violation caused by an attempt to
execution an instruction in the guest.

However, the current code would clear the execution permission in the EPT paging-
structure entries for small pages too when we clearing the the execution permission
for large pages. This would trigger extra EPT violation VM exits.

This patch fix this issue.

Signed-off-by: Li Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Tracked-On: #5788
2021-03-03 13:46:49 +08:00
Junjie Mao 848d48786a Makefile: expose config-related targets to the top-level Makefile
This patch allows the invocation of configuration-related hypervisor
targets from the top-level Makefile. The configuration summary is now
reported by the hypervisor rather than inspecting the variables directly.

Tracked-On: #5772
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2021-03-03 09:13:44 +08:00
Junjie Mao 22064f71c1 Makefile: do not define default BOARD/SCENARIO in top-level Makefile
The top-level Makefile should not define any default value as the
hypervisor may have its own configurations set by previous builds.

This patch also changes the hypervisor default RELEASE to `n`.

Tracked-On: #5772
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2021-03-03 09:13:44 +08:00
Junjie Mao d5c11d5e79 Makefile: fixes to bugs that break diffconfig and applydiffconfig
This patch resolves the following bugs that break the targets `diffconfig`
and `applydiffconfig`:

 - Comments after variable definitions cause the varaible to contain
   unintended trailing whitespaces.

 - HV_CONFIG_XML is no longer defined; it is now HV_SCENARIO_XML.

 - '*.asl' files are also generated and should be involved when comparing
   the generated configuration files.

 - Strings between diacritic marks (`) are intepreted as shell commands
   even they are part of informative messages.

 - HV_DIFFCONFIG_LIST should not contain duplicated lines.

Tracked-On: #5772
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2021-03-03 09:13:44 +08:00
Junjie Mao 0edaaa880f Makefile: prefer RELEASE=y|n over RELEASE=0|1
For clarity, we now prefer y|n over 0|1 as the values of boolean options on
make command lines. This patch applies this preference to the Makefile of
the device model and tools, while RELEASE=0|1 is still supported for
backward compatibility.

Tracked-On: #5772
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2021-03-03 09:13:44 +08:00
Junjie Mao 646e572d69 Makefile: remove unnecessary exports
We already passes BOARD, SCENARIO and RELEASE to recursive `make`, which
makes it unnecessary to export those variables. This patch explicitly
passes TOOLS_OUT as well and removes the explicit export for clarity.

Tracked-On: #5772
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2021-03-03 09:13:44 +08:00
Geoffroy Van Cutsem 4bd150ae0f DM: update the 'acrn-dm' usage information
Update the 'acrn-dm' usage information. It is displayed when using
'-h' or when an argument parsing error occured but was not up-to-date
with the actual implementation.

Tracked-On: #5781
Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
2021-03-02 16:49:16 +08:00
Geoffroy Van Cutsem 6020759f5b doc: update ACRN Device Model arguments
Update the list of arguments and parameters that the ACRN
Device Model ('acrn-dm') can take.

Tracked-On: #5781
Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
2021-03-02 16:49:16 +08:00
Peter Fang d17fdb020a misc: life_mngr: allow only one active socket connection in SOS mode
Monitor the listening socket in SOS mode and close any additional
connections after a socket connection is established. This ensures no
more than one post-launched VM can establish a pm_vuart channel.

Tracked-On: #5736
Signed-off-by: Peter Fang <peter.fang@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2021-03-01 14:21:43 +08:00
Peter Fang e4d2f9a159 dm: graceful failure in pm_vuart
- Exit main() if pm_by_vuart_init() fails
- Use SIGHUP to gracefully power off a VM if pm_monitor_loop()
  encounters a failure
- Identify a closed socket as a failure in pm_monitor_loop()

Tracked-On: #5736
Signed-off-by: Peter Fang <peter.fang@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2021-03-01 14:21:43 +08:00
Li Fei1 97a9c5151b kv: kconfig: remove some unused ram size kconfig
SOS_RAM_SIZE/UOS_RAM_SIZE Kconfig are only used to calculate how many pages we
should reserve for the VM EPT mapping.

Now we reserve pages for each VM EPT pagetable mapping by the PLATFORM_RAM_SIZE
not the VM RAM SIZE. This could simplify the reserve logic for us: not need to
take care variable corner cases. We could make assume we reserve enough pages
base on the VM could not use the resources beyond the platform hardware resources.

So remove these two unused VM ram size kconfig.

Signed-off-by: Li Fei1 <fei1.li@intel.com>
Tracked-On: #5788
2021-03-01 13:10:04 +08:00
Li Fei1 0579e2ee24 hv: page: add free_page
Add free_page to free page when unmap pagetable.

Signed-off-by: Li Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Tracked-On: #5788
2021-03-01 13:10:04 +08:00
Li Fei1 8d9f12f3b7 hv: page: use dynamic page allocation for pagetable mapping
For FuSa's case, we remove all dynamic memory allocation use in ACRN HV. Instead,
we use static memory allocation or embedded data structure. For pagetable page,
we prefer to use an index (hva for MMU, gpa for EPT) to get a page from a special
page pool. The special page pool should be big enougn for each possible index.
This is not a big problem when we don't support 64 bits MMIO. Without 64 bits MMIO
support, we could use the index to search addrss not larger than DRAM_SIZE + 4G.

However, if ACRN plan to support 64 bits MMIO in SOS, we could not use the static
memory alocation any more. This is because there's a very huge hole between the
top DRAM address and the bottom 64 bits MMIO address. We could not reserve such
many pages for pagetable mapping as the CPU physical address bits may very large.

This patch will use dynamic page allocation for pagetable mapping. We also need
reserve a big enough page pool at first. For HV MMU, we don't use 4K granularity
page table mapping, we need reserve PML4, PDPT and PD pages according the maximum
physical address space (PPT va and pa are identical mapping); For each VM EPT,
we reserve PML4, PDPT and PD pages according to the maximum physical address space
too, (the EPT address sapce can't beyond the physical address space), and we reserve
PT pages by real use cases of DRAM, low MMIO and high MMIO.

Signed-off-by: Li Fei1 <fei1.li@intel.com>
Tracked-On: #5788
2021-03-01 13:10:04 +08:00
Li Fei1 5621fabbcb hv: memory: remove get_sworld_memory_base API
memory_ops structure will be changed to store page table related fields.
However, secure world memory base address is not one of them, it's VM
related. So save sworld_memory_base_hva in vm_arch structure directly.

Signed-off-by: Li Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Tracked-On: #5788
2021-03-01 13:10:04 +08:00
Yang,Yu-chu d4bf922bda config-tools: remove "vuart" poweroff channel from default xml
Remove the the vuart1(tty) and vuart1(pty) poweroff channel from default
non-windows uos launch script xmls.

Tracked-On: #5736
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
2021-02-26 16:54:23 +08:00
Shuang Zheng 87013b70df config_tools: add sanity check for PSRAM and RDT
RDT_ENABLED and PSRAM_ENABLED should not by y simultaneously.

Tracked-On: #5649

Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
2021-02-26 16:48:18 +08:00
Victor Sun 26abc82f3c HV: panic on 0 address when do e820_alloc_memory
Current memory allocation algorithm is to find the available address from
the highest possible address below max_address. If the function returns 0,
means all memory is used up and we have to put the resource at address 0,
this is dangerous for a running hypervisor.

Also returns 0 would make code logic very complicated, since memcpy_s()
doesn't support address 0 copy.

Tracked-On: #5626

Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2021-02-26 16:38:32 +08:00
Victor Sun 2e72bb97e7 HV: refine acpi rsdp initialize interface
In previous code, the rsdp initialization is done in get_rsdp() api implicitly.
The function is called multiple times in following acpi table parsing functions
and the condition (rsdp == NULL) need to be added in each parsing function.
This is not needed since the panic would occur if rsdp is NULL when do acpi
initialization.

Tracked-On: #5626

Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2021-02-26 16:38:32 +08:00
Victor Sun 0588ef3ae3 HV: merge multiboot standard data structures in one header
In this way, all multiboot standard data structure could be found in
multiboot_std.h. The multiboot_priv.h stores all private definitions
and multiboot.h is the only public API header file.

Tracked-On: #5661

Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2021-02-26 16:38:32 +08:00
Geoffroy Van Cutsem 7c3acd21da doc: fix rendering of rightwards arrows
The "Enable GVT-d in ACRN" tutorial includes a number of rightwards
arrows. The source text used the "&rarr;" symbol for this but this
is not valid in ReST files. We add a substitution for this and use it
in the tutorial instead.

Tracked-On: #5769
Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
2021-02-25 14:55:51 -08:00
Yang,Yu-chu 50f135343a config-tools: ivshmem support to be shared by multiple vms
Loosen the restriction of IVSHMEM_REGION of xsd validation. An ivshmem
region can be shared by more than two vms.

Tracked-On: #5672
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
2021-02-25 13:22:46 +08:00
Geoffroy Van Cutsem 03466c22f3 acrn-config: remove obsolete kernel parameters from APL configurations
Remove obsolete kernel (i915) parameters from the Apollo Lake (APL)
board configurations.

Tracked-On: #5236
Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
2021-02-25 13:22:25 +08:00
Yonghua Huang fdfd28b140 hv: unmap software region of pre-RTVM from Service VM EPT
Accessing to software SRAM region is not allowed when
 software SRAM is pass-thru to prelaunch RTVM.

 This patch removes software SRAM region from service VM
 EPT if it is enabled for prelaunch RTVM.

Tracked-On: #5649
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2021-02-25 09:35:31 +08:00
Yonghua Huang a747e04dab config-tool: refine software SRAM config of pre-RTVM
- Define 'PRE_RTVM_SW_SRAM_ENABLED' only if both
     prelaunch RTVM and Software SRAM are configured in
     current scenario.

   - Define 'PRE_RTVM_SW_SRAM_BASE_GPA' and
     'PRE_RTVM_SW_SRAM_END_GPA' only if
     'PRE_RTVM_SW_SRAM_ENABLED' is defined.

Tracked-On: #5649
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2021-02-25 09:35:31 +08:00
Sainath Grandhi 80a91987f4 hv: Fix incorrect struct definition for ir_bits
Fixing an incorrect struct definition for ir_bits in ioapic_rte. Since bits after
the delivery status in the lower 32 bits are not touched by code,
this has never showed up as an issue. And the higher 32 bits in the RTE
are aligned by the compiler.

Tracked-On: #5773
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
2021-02-25 09:34:49 +08:00
Geoffroy Van Cutsem 359f4ee6ea doc: update another few mis-handled titles
After grand update of all titles to use title-case, we found some more
that needed a manual tweak.

Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
2021-02-24 15:14:53 -08:00
Shuang Zheng e14387bebf config_tools: update fusa_partition scenario
update fusa_partition scenario following requirements.

Tracked-On: #5665

Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
2021-02-24 14:28:23 +08:00
li shuang 7dd3c4eb3e config_tools: add PTCT configs
add PTCT table template on ehl-crb-b, update PTCT table template
on tgl-rvp, add SofwareSRAM in ehl-crb-b.xml

Tracked-On: #5649

Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
2021-02-24 09:27:42 +08:00
Geoffroy Van Cutsem 31a9d053f8 doc: update our FAQ section
Update our FAQ section by deleting outdated and obsolete information.

Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
2021-02-23 11:51:42 -08:00
David B. Kinder 722bf55c57 doc: update doc build instructions
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2021-02-18 11:52:59 -08:00
David B. Kinder 33866a1335 doc: update a few mis-handled titles
After grand update of all titles to use title-case, we found a few that
needed a manual tweak.

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2021-02-17 16:42:56 -08:00
David B. Kinder ea9c713f28 doc: fix misspellings in config option doc
Some terms in the config option docs (Integer, Boolean) are being
flagged by one of our spell checking tools.  Let's make it happy.

Tracked-On: #5692

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2021-02-15 12:14:32 -08:00
David B. Kinder 4050b772ca doc: fix layout of release notes after title case fix
Horizontal lines were incorrectly removed during the processing for
using title case on all headings.  Put them back.

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2021-02-13 13:28:54 -08:00
David B. Kinder 0bd384d41b doc: fix all headings to use title case
While we hoped to make the headings consistent over time while doing
other edits, we should instead just make the squirrels happy and do them
all at once or they'll likely never be made consistent.

A python script was used to find the headings, and then a call to
https://pypi.org/project/titlecase to transform the title.  A visual
inspection was used to tweak a few unexpected resulting titles.

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2021-02-13 12:37:49 -08:00
Geoffroy Van Cutsem 6e655d098b doc: update OpenStack and libvirt tutorial
Update the tutorial on how to use OpenStack and libvirt:
* Use Ubuntu 20.04 as the host and the 'lxd' snap
* Use the Ubuntu Cloud image (instead of Clear Cloud image)
* Delete a screenshot that wasn't in use

Tracked-On: #5564
Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
2021-02-12 09:29:51 -08:00
David B. Kinder 85f4d79883 doc: test for simple xsd edit
CI test for simple xsd edit

Tracked-On: #5692

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2021-02-09 08:07:10 -08:00
Peter Fang e2f3edcb50 OVMF release v2.4
- Ensure successful USB enumeration
- Enable UsbMassStorageDxe

Tracked-On: #5732
Signed-off-by: Peter Fang <peter.fang@intel.com>
2021-02-09 14:47:00 +08:00
Shuang Zheng 50463d1b3f config_tools: change generic folder to generic_board folder in config
app

change generic folder to generic_board folder in config app according
to the reorg data folders and update the method to save xmls.

Tracked-On: #5723

Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
2021-02-09 13:26:51 +08:00
Shuang Zheng 300be9df8c config_tools: update zephyr entry point address on ehl-crb-b
update entry point address for pre-launched zephyr on ehl-crb-b;
update serial console to /dev/ttyS3 on ehl-crb-b.

Tracked-On: #5689

Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
2021-02-09 09:00:46 +08:00
Shuang Zheng e1f7824004 config_tools: update condition for bootargs error check
add bootargs error check only when kernel type is KERNEL_BZIMAGE.

Tracked-On: #5689

Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
2021-02-09 09:00:46 +08:00
Victor Sun 6bb7a45672 HV: init VM bootargs only for LaaG
Currently the VM bootargs load address is hard-coded at 8KB right before
kernel load address, this should work for Linux kernel only since Linux
kernel is guaranteed to be loadered high than GPA 8K so its load address
would never be overflowed, other OS like Zephyr has no such assumption.

Tracked-On: #5689

Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2021-02-09 09:00:46 +08:00
Victor Sun 3310412148 dm: remove _ADR object for PCI Device
Per ACPI 6.x chapter 6.1, "A device object must contain either an _HID object
or an _ADR object, but should not contain both."

Remove this object otherwise iasl would complain
"Warning  3073 -   Multiple types ^  (Device object requires either a _HID
or _ADR, but not both)"
when launch post-launched VM in devicemodel.

Tracked-On: #5719

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2021-02-09 08:59:49 +08:00
Victor Sun 6b3f1d2315 dm: declare Processors using the Device operator
Per ACPI 6.x chapter 19.6.109, the Processor Operator is deprecated.
Replace it with Device Operator, otherwise the iasl would complain
"Warning  3168 -
	 Legacy Processor() keyword detected. Use Device() keyword instead."
when launch post-launched VM in devicemodel.

Tracked-On: #5719

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2021-02-09 08:59:49 +08:00
Jian Jun Chen aae7a89480 hv: ivshmem: BAR0 size should be 256 Bytes
ivshmem spec says that the size of BAR0 is 256 bytes. Windows
ivshmem driver will check the size of BAR0. It will refuse to
load the ivshmem driver if BAR0 size is not 256.
For post-launched VM hv land ivshmem BARs are allocated by
device model. For pre-launched VM hv land ivshmem BARs are
allocated by acrn-config tool. Both device model and acrn-config
tool should make sure that the BAR base addr are aligned to 4K
at least.

Tracked-On: #5717
Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2021-02-09 08:57:50 +08:00
Jian Jun Chen fad6a94030 dm: align bar base addr to PAGE_SIZE at least
PCI spec said that BAR base should be naturally aligned. But on
ACRN if the bar size < PAGE_SIZE, BAR base should be aligned with
PAGE_SIZE. This is because the minimal size that EPT can map/unmap
is PAGE_SIZE.

Tracked-On: #5717
Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
2021-02-09 08:57:50 +08:00
David B. Kinder b7e360e5e5 doc: update title and headings for doc build
Use title case for title and headings, make heading consistent using
command form

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2021-02-08 14:01:44 -08:00
David B. Kinder 6337bafb55 doc: fix layout of dm-params
Use of :kbd: isn't appropriate as used and isn't rendered right. change
to inline codeblock notation instead.

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2021-02-08 13:26:14 -08:00
David B. Kinder 2f796a7961 doc: update debian ISO image version number
Documentation mentions a specific Debian 10 ISO image version that no
longer exists.  Update to indiate we validated with debian_10.1.0 but
newer versions should also work.

Tracked-On: #5408

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2021-02-08 11:37:16 -08:00