Commit Graph

849 Commits

Author SHA1 Message Date
Zide Chen 3a5b5b084f hv: fix MISRA-C violations in vpic.c and vioapic.c
120D: Pointer param should be declared pointer to const.
  add 'const' qualifier to function signatures when it's possible.
  - vioapic_set_irqline_nolock()
  - vioapic_set_irqline_lock()
  - master_pic()
  - vpic_ocw2()
  - vpic_ocw3()
  - vpic_set_irqline()
  - vpic_get_irqline_trigger_mode()
  - vm_pic()
  - vm_ioapic

93S: Value is not of appropriate type.
  change '0' to '0U' in function vpic_icw1().

Tracked-On: #861
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-11 23:04:54 +08:00
Shiqing Gao 4b7fe2e215 hv: init: minor fix related to header file
Header file shall not be included multiple times.
The following prototype shall be used.

        #ifndef INIT_H
        #define INIT_H

        /* body */

        #endif /* INIT_H*/

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
2019-01-11 21:53:09 +08:00
Huihuang Shi 11f0f72627 hv:fix violations
fix
1."Value is not of appropriate type."
2."Function prototype/defn param type mismatch"

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-11 16:52:28 +08:00
Zide Chen 12211fb67b hv: fix MISRA-C violations in dm/vpci
120D: Pointer param should be declared pointer to const.
  Add 'const' qualifier to function parameters whenever it's possible:
    alloc_pci_vdev()
    enumerate_pci_dev()
    pci_scan_bus()
    pci_enumeration_cb()
    partition_mode_vpci_init()
    partition_mode_vpci_deinit()
    sharing_mode_vpci_init()
    sharing_mode_vpci_deinit()
    vpci_cleanup()

45D: Pointer not checked for null before use.
  Check pointer vm in vpci_reset_ptdev_intr_info() before using it.

Tracked-On: #861
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2019-01-11 14:28:45 +08:00
Victor Sun 8ad48ff488 HV: refine vmptable for partition mode
Merge separated mptable.c of BOARDs to unified vmptable.c;

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-11 10:55:14 +08:00
Min Lim f574d5926b profiling: code cleanup
This is the profiling code cleanup to avoid type conversion
and align tab/space in data structure definition

Tracked-On: #2257
Signed-off-by: Min Lim <min.yeol.lim@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-11 10:54:38 +08:00
Shiqing Gao e2971ebc98 hv: vlapic: code clean-up
* rename `vlapic_set_intr_ready` to `vlapic_accept_intr`
 * replace calling of `vlapic_intr_edge` with `vlapic_set_intr`
 * remove `vlapic_intr_level` and `vlapic_intr_edge`

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-11 09:44:10 +08:00
Mingqiang Chi 1fc10d514c hv:Unify the MACRO name for invalid interrupt pin
There are the following definitions in hypervisor,
  define IOAPIC_INVALID_PIN      0xffU
  define VPIC_INVALID_PIN        0xffU
  define PTDEV_INVALID_PIN       0xffU
this patch unify them to:
  define INVALID_INTERRUPT_PIN   0xffffffffU

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2019-01-10 23:52:25 +08:00
Mingqiang Chi 7725fe3b50 hv: shell & vuart: Change interrupt pin to uint32_t
Change the type from uint8_t to uint32_t for shell and vuart

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-10 23:52:25 +08:00
Mingqiang Chi 49166fc3ac hv: passthrough: Change interrupt pin to uint32_t
-- Change the type from uint8_t to uint32_t
-- Remove some typecast
-- Change union source_id

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-10 23:52:25 +08:00
Mingqiang Chi 87afe65f86 hv: vioapici: Change interrupt pin to uint32_t
-- Change the type from uint8_t to uint32_t
-- Remove some typecast

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-10 23:52:25 +08:00
Mingqiang Chi 50deda8819 hv: vpic: Change interrupt pin to uint32_t
-- Change the type from uint8_t to uint32_t
-- Remove some typecast

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-10 23:52:25 +08:00
Mingqiang Chi 196912fb6d hv: ioapic: Change interrupt pin to uint32_t
Change the type from uint8_t to uint32_t for interrupt pin

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-10 23:52:25 +08:00
Zide Chen 10db11b00a hv: emulate IA32_FEATURE_CONTROL MSR
All features controlled by IA32_FEATURE_CONTROL are disabled from guests,
so set the Lock bit to prevent it from writing by guests.

Also hide the MSR_IA32_FEATURE_CONTROL_VMX_NO_SMX bit from guest.

Tracked-On: #1867
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-10 12:23:44 +08:00
Zide Chen 86526cddc5 hv: disable more features from guest CPUID
Silicon Debug Feature: CPUID.01H.ECX[11]
- We can't allow guests to have direct access to silicon wide resources.

Machine Check Exception: CPUID.01H.EDX[5]
- Need HV support before exposing it to the guests.

Perfmon and Debug: CPUID.01H.ECX[15]
Debug Store: CPUID.01H.EDX[21], CPUID.01H.ECX[2], CPUID.01H.ECX[4]
- HV emulation is needed to separate host and guest monitoring data.
- guest CPUID.0AH is forced to all-zero in ACRN so it makes sense to clear
  these bits as well.

Tracked-On: #1867
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2019-01-09 23:04:41 +08:00
Li, Fei1 087fbfe136 hv: coding style: remove basic type declaration use
Typedefs that indicate size and signedness should be used in place of
the basic numerical types

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-01-08 15:41:39 +08:00
Mingqiang Chi 7907fef59e hv:Rename several APIs for vpic and vioapic
vpic:
   vpic_set_irq         --> vpic_set_irqline
   vpic_get_irq_trigger --> vpic_get_irqline_trigger_mode
vioapic:
   vioapic_set_irq_nolock --> vioapic_set_irqline_nolock
   vioapic_set_irq        --> vioapic_set_irqline_lock
   vioapic_send_intr      --> vioapic_generate_intr

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2019-01-08 14:32:20 +08:00
Shiqing Gao 272439d37f hv: rename register_io_emulation_handler
This patch renames `register_io_emulation_handler` to
`register_pio_emulation_handler`.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-08 11:28:13 +08:00
Minggui Cao c5e072432a HV: modularization to refine boot/bsp related code.
1. add static for local functions and variables.
2. move vm_sw_loader from vcpu to vm
3. refine uefi.c to follow the code rules.
4. separate uefi.c for vm0 boot and bsp two parts. bsp layer just
access native HW related, can't access vm/vcpu, vm0 boot part can
access vm / vcpu data structure.

Tracked-On: #1842
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2019-01-08 08:46:15 +08:00
Mingqiang Chi 09ff94fc49 hv:Change structure boot_cpu_data to static
-- Change boot_cpu_data to static, only used in cpu_caps.c,
-- Add get_cpu_info() api, it will call this api instead of
   boot_cpu_data except cpu_caps.c

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2019-01-07 11:23:22 +08:00
Mingqiang Chi 7c4dd0d277 hv:Move pm state structure to pm.h
-- move structure 'cpu_state_info' from cpu_caps.h to host_pm.h
-- add get_cpu_pm_state_info() api

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2019-01-07 11:23:22 +08:00
Zide Chen a4b166d5e8 hv: add missing MSRs to unsupported_msrs[]
SMRR (System-Management Range Register) is disabled from vMTRR,
so treat IA32_SMRR_PHYSBASE and IA32_SMRR_PHYSMASK as unsupported.

IA32_SMBASE is available only when IA32_VMX_MISC[15] is set.

IA32_FIXED_CTR0/1/2 are available only when CPUID.0AH:EDX[4:0] is non-zero.

Intel Processor Trace feature has been disabled and the associated MSRs
need to be in unsupported_msr[] as well.

Tracked-On: #1867
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-04 16:05:50 +08:00
Chaohong guo 971eb84c20 HV: add const qualifier for functions' argments in vlapic.c
If a argment is not changed in function, MISRA recommends to add const
qualifier for that argement.

Tracked-On: #861
Signed-off-by: Chaohong guo <chaohong.guo@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-02 16:22:11 +08:00
Minggui Cao 7ebc4877c8 HV: refine cmdline code, move parts into dbg_cmd
move the debug related command handle into debug/dbg_cmd.c;
so release build will not include that.

Tracked-On: #2170
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-02 12:15:53 +08:00
Minggui Cao a5ca305cf6 HV: add API to change vuart base & irq config
1. add an API to support vuart COM base and irq configured;
2. add the HV cmd to be parsed for vuart COM base & irq.

Tracked-On: #2170
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-02 12:15:53 +08:00
Minggui Cao 537adaeb46 HV: cleanup CONFIG_COM_IRQ related code
move CONFIG_COM_IRQ code into vuart, because it is just
used for vuart.

Tracked-On: #2170
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-02 12:15:53 +08:00
Minggui Cao fde0bcc1ce HV: disable vuart when dbg uart is disabled
vuart it used for SOS to output log to HV console,
so if dbg uart is disabled, it need be disabled too:
just unregister its PIO.

Tracked-On: 2170
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-02 12:15:53 +08:00
Li, Fei1 860c444c55 hv: coding style: add `const` qualifier for some function
Add `const` qualifier for lookup_address and find_vcpuid_entry.

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-01-02 09:35:00 +08:00
Li, Fei1 6f0edfc38d hv: coding style: use the defined data type __packed
1) Use __attribute__((packed)) instead of #pragma pack(1)
2) Use the defined data type __packed instead of __attribute__((packed))

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-01-02 09:35:00 +08:00
Yan, Like 1dfd05cdac hv: fix mis-usage of "PAGE_SHIFT"
Replace PAGE_SHIFT with MSI_ADDR_DEST_SHIFT in ptirq_build_physical_msi(), since it's not correct in semantics.

Tracked-On: #2209
Signed-off-by: Yan, Like <like.yan@intel.com>
2018-12-28 23:46:49 +08:00
Mingqiang Chi 5c6fe01c87 hv:Change pcpu_active_bitmap to static
-- Change pcpu_active_bitmap to static, only used in
   cpu.c
-- add get_pcpu_active_bitmap()

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-28 23:26:31 +08:00
Mingqiang Chi 682824de6d hv:Change phys_cpu_num to static
-- change phys_cpu_num to static
-- add get_pcpu_nums() and is_pcpu_active() APIs
-- replace phys_cpu_num with get_pcpu_nums() except cpu.c

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-28 23:26:31 +08:00
Min Lim 9c27ed1090 profiling: fix the profiling tool crash by page faults
Profiling tools are broken, which cause page faults during collection.
The issue happens by enabling SMAP recently. Therefore,
we use stac() and clac() to allow access to buffers allocated by guest.

Tacked-On: #2157
Signed-off-by: Min Lim <min.yeol.lim@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-27 16:24:38 +08:00
Shuo A Liu 952943c3ea hv: decouple IO completion polling from idle thread
IO completion polling will access vcpu and vm structs. If doing it in
idle thread, there might be some race issues between vm destroying and
idle thread. They are running on different cores.
Got suggestion from Fengwei, decouple the polling action from idle
thread and just do it in vcpu thread, then we can guarantee idle thread
in really idle status.

Tracked-On: #1821
Signed-off-by: Shuo A Liu <shuo.a.liu@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
2018-12-27 12:35:40 +08:00
Shuo A Liu a0154223f6 hv: clear NEED_RESCHEDULE flag in schedule
Now, need_reschedule will test_and_clear the bit NEED_RESCHEDULE in
schedule context, then call schedule. It is not a exact match with the
name.
This patch move the flag clearing into scheudle, and need_reschedule
just check and return.

Tracked-On: #1821
Signed-off-by: Shuo A Liu <shuo.a.liu@intel.com>
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-27 12:35:40 +08:00
Shuo A Liu e8ac97671f hv: use asm_pause() to replace inline ASM to satisfy MISRAC
pause_cpu() --> asm_pause()
hlt_cpu() --> asm_hlt()
inline ASM pause --> asm_pause()

Tracked-On: #1821
Signed-off-by: Shuo A Liu <shuo.a.liu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-27 12:35:40 +08:00
Binbin Wu 21aa1907fd hv: vcpuid: cpuid leaf 07h has subleaf
Two changes:

1. cpuid leaf 07h has subleaf:
According to SDM 3-194 Vol.2A, Table 3-8, cpuid leaf 07h has sub-leaves.
cpuid.07.eax reports the maximum input for sub-leaves.
Since there is no definition for subleaf > 0 in SDM, hv only supports subleaf 0.

2. In currently hv code, cpuid leaf function 14h is disabled,
CPUID.07H:EBX.INTEL_PROCESSOR_TRACE should be disabled as well.

Tracked-On: #2198
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Li, Fei1 <fei1.li@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2018-12-27 09:05:12 +08:00
Yonghua Huang c1fc7f5fce hv: remove the usage of 'atoi()'
this function is not from libc but has the same name,
  atoi() in libc is unbounded and not safe.

  replace this function with 'strtol_deci()' in this case.

Tracked-On: #2187
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-26 13:50:26 +08:00
Shiqing Gao b3c199d043 hv: mmio_read: add `const` qualifier
This patch fixes the MISRA-C violations related to mmio_read**
 * add `const` qualifier in implementation of mmio_read**
   `const` qualifier shall be added

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Reviewed-by: Li, Fei1 <fei1.li@intel.com>
2018-12-26 10:57:41 +08:00
Yonghua Huang 3998c97756 HV: [v2] bugfix in 'hv_access_memory_region_update()'
- bugfix:the actual 'size' of memory region that
    to be updated is incorrect.

  - replace CONFIG_UEFI_STUB with DMAR_PARSE_ENABLED
    when update memory pages for ACPI_RECLAIM region,
    as DMAR_PARSE_ENABLED may be enabled on non-EFI
    platform.

V2 update:
    wrap roundup to 2M and rounddown to 2M inline
    functions.

Tracked-On: #2056
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-12-25 22:06:02 +08:00
Yonghua Huang ea672c5b07 hv: update coding style for tampoline.c
- add API get trampoline_start16_paddr() instead
    of exporting this global variable.
  - other minor update.

Tracked-On: #2095
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-25 13:25:14 +08:00
Sainath Grandhi ef03385f42 hv: Write Buffer Flush - VT-d
This patch does the following changes
According to VT-d spec Section 6.8 "Write Buffer Flushing" DRAM write buffers
are flushed implicitly upon Remapping Hardware Caches Invalidation even on
platforms that set RWBF to 1 in capability register. So removed write buffer
flushing as current ACRN issues cache invalidation commands in all cases.

Tracked-On: #1855
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
2018-12-24 22:18:30 +08:00
David B. Kinder c358d29c89 doc: fix vhm_request doxygen comment
Table contents weren't rendered correctly in
developer-guides/hld/hv-io-emulation.html, so
fix the doxygen comments.

Tracked-on: #1684

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2018-12-21 08:50:53 -08:00
Li, Fei1 cf47f6cff8 hv: coding style: refine the remaining functions to one exit point
Refine the remaining functions in the head file to one exit point

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-12-21 19:39:56 +08:00
Li, Fei1 36dcb0f605 hv: lib: refine inline assembly use in bitmap operation
Try to minimize the C code in inline assembly function. Now only
construct data structure and return a value is permitted.

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-12-21 19:39:56 +08:00
Li, Fei1 738f2536fe hv: coding style: refine cpu related function to one exit
2) Fix procedure has more than one exit point.

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-12-21 13:34:01 +08:00
Jason Chen CJ ff0703dd40 scheduler: make scheduling based on struct sched_object
use struct sched_object as the main interface of scheduling, then
make scheduler as an independent module to vcpu:
- add struct sched_object as one field in struct vcpu
- define sched_object.thread for switch_to thread
- define sched_object.prepare_switch_out/in for prepare_switch before
  switch_to
- move context_switch_out/context_switch_in into vcpu.c as
  vcpu.sched_obj.prepare_switch_out/in
- make default_idle as global idle.thread for idle_thread
- make vcpu_thread as vcpu.sched_obj.thread for each vcpu thread
- simplify switch_to based on sched_object

Tracked-On: #1842
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <edide.dong@intel.com>
2018-12-21 10:34:15 +08:00
Jason Chen CJ 8aae0dff87 scheduler: refine make_reschedule_request
just use pcpu_id for make_reschedule_request is enough

Tracked-On: #1842
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <edide.dong@intel.com>
2018-12-21 10:34:15 +08:00
Jason Chen CJ 6d67364881 scheduler: refine runqueue related functions
add struct sched_object, and use it as input param instead of vcpu for
below functions:
- add_to_cpu_runqueue renamed from add_vcpu_to_runqueue
- remove_from_cpu_runqueue renamed from remove_vcpu_from_runqueue
- get_next_sched_obj added to get next sched object

Tracked-On: #1842
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <edide.dong@intel.com>
2018-12-21 10:34:15 +08:00
Tw 80b392a854 hv:vtd: fix MISRA-C violations on pointer param should be declared pointer to const
This patch fix MISRA-C violations in arch/x86/vtd.c
on pointer param should be declared pointer to const.

Tracked-On: #861
Signed-off-by: Tw <wei.tan@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-21 10:32:53 +08:00