Commit Graph

8202 Commits

Author SHA1 Message Date
andi6 46a860bf04 hv: fix using cpuid does not clear the upper 32-bit registers.
In HV, cpuid uses the lower 32 bits of rax\rbx\rcx\rdx registers to pass parameters,
But the software does not clear the upper 32-bit registers,  if the guest
uses 64-bit variables to pass parameters to cpuid,guest will use rax\rbx\rcx\rdx,
not eax\ebx\ecx\edx, the previous value of the high 32 registers will affect the guest.

Tracked-On: #8605
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Signed-off-by: andi6 <andi6@xiaomi.com>
2024-06-19 15:35:26 +08:00
nacui 30aeeedcb6 dm: enable lpss device passthrough
Passthrough of lpss devices, such as sdio, spi, uart, is not supported for user
vm due to irq and acpi info missing.

Here provides new pci device passthrough options to pass irq and acpi dsdt info
by users. Considering spi dsdt info varies from HW, to add the flexibility of
configuration, it is designed to pass dsdt file of spi device by users rather
than hard code. Besides, remove the limit of the lpss device passthrough for rtvm.

Tracked-On: #8615

Signed-off-by: nacui <na.cui@intel.com>
Reviewed-by: Jian Jun Chen <jian.jun.chen@intel.com>
2024-06-19 14:48:34 +08:00
dongpingx 23b1a44d40 misc: fix Vue3 version & update braces's version
Although my former patch can pass through build procedure but when
I launch configurator and try to load board.xml, the loading
procedure wont finish. So we cannot step forward anymore.

I cannot find a solution right now, so I have to fix the version
to v3.2.33 for several weeks.

This patch is applied to fix vulnerability scanned by Trivy also.
Vulnerability ID is CVE-2024-4068 & fixed version of dependency is 3.0.3.
I added one configuration item named override for package.json.

I tested and confirmed the fix is ok.

Signed-off-by: dongpingx <dongpingx.wu@intel.com>
Tracked-On: #8626
2024-06-18 10:26:32 +08:00
dongpingx 7739f0ef2a misc: add checking while append new vm
This patch will add checking cpu affinity while user click to add new vm.
When I was following client's findings up I found that if I click to add
a new post-launched vm for step 3.Configure settings for scenario and launch
scripts, it failed to show error messages. The current version will check cpu
affinity and serial port for post-launched and hv when creating a new vm, it
wont verify when adding new post-launched & pre-launched vms, it will fail to
save scenario configuration file without any explanation. I've rebuilt and run
configurator, confirmed the checking procedure works.

Signed-off-by: dongpingx <dongpingx.wu@intel.com>
Tracked-On: #8601
Reviewed-by: Junjie Mao junjie.mao@intel.com
2024-06-17 11:40:24 +08:00
Qiang Zhang 5c9e1c0186 board_inspector: fix typo in PCIe PTM Capability name
PCIe extended capability with ID 0x1F is Precise Time Measurement. So
fix typo "TPM" which may confuse users.

Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Tracked-On: #5915
Signed-off-by: Qiang Zhang <qiang4.zhang@intel.com>
2024-06-17 10:27:36 +08:00
Shiqing Gao 80b1edabf5 dm: block_if: support bypassing BST_BLOCK logic
With current implementation, in blockif_dequeue/blockif_complete,
if the current request is consecutive to any request in penq or busyq,
current request's status is set to BST_BLOCK. Then, this request is blocked
until the prior request, which blocks it, is completed.
It indicates that consecutive requests are executed sequentially.

This patch adds a flag `no_bst_block` to bypass such logic because:
1. the benefit of this logic is not noticeable;
2. there is a chance that a request is enqueued in block_if_queue but
   not dequeued when this logic is triggered along with the io_uring mechanism;

Example to use this flag:
`add_virtual_device                     5 virtio-blk /dev/nvme1n1,no_bst_block`

Note:
When io_uring is enabled, the BST_BLOCK logic would be bypassed.

Tracked-On: #8612

Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2024-06-05 15:23:33 +08:00
Shiqing Gao 11c8907464 dm: virtio-blk: fix virtio_blk_ops bug
When multiple virtio-blk instances are created for one VM,
using the same `static struct virtio_ops virtio_blk_ops` for all instances
is buggy. It only works when all instances are created with the same number
of the virtqueues.

This patch fixes this issue by introducing a member in `struct virtio_blk`
to store the ops info for each virtio-blk instance.

Tracked-On: #8612

Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2024-06-05 15:23:33 +08:00
Shiqing Gao f92b0f43e6 dm: block_if: io_uring: flush the modified in-core data on demand
When `io_uring` is used, `blockif_flush_cache` is missing when an WRITE
operation is completed. `blockif_flush_cache` would flush the modified
in-core data to the disk device according to the setting of the cache mode.

Tracked-On: #8612

Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2024-06-05 15:23:33 +08:00
Shiqing Gao 5306d9e7db dm: update the `iothread` option to specify the CPU affinity
This patch updates the `iothread` option to specify the CPU affinity
of the iothread. Setting the iothread's CPU affinity could benefit the
Service VM's CPU utilization when Service VM owns limited dedicated CPUs.

It could be helpful to ensure the I/O mediator Quality of Service (QoS).
Once the performance tuning is done, the specific CPU affinity config could
pass to acrn-dm directly, letting the deployment more easily.

The format looks like below:
iothread=<num_iothread>@<cpu_affinity>
"@" is used to separate the following two settings:
 - the number of iothread instances
 - the CPU affinity settings for each iothread instance.

The format of `cpu_affinity` looks like below:
<cpu_affinity_0>/<cpu_affinity_1>/<cpu_affinity_2>/...
1. "/" is used to separate the CPU affinity setting for each iothread instance
   (sequentially).
2. char '*' can be used to skip the setting for the specific iothread instance.
3. the number of cpu_affinity_x vs. the number of iothread instances
   - If # of cpu_affinity_x is less than # of iothread instances,
     no CPU affinity settings for the last few iothread instances.
   - If # of cpu_affinity_x is more than # of iothread instances,
     the extra cpu_affinity_x are discarded.
4. ":" is used to separate different CPU cores for each CPU affinity setting.

Examples to specify the CPU affinity of the iothread:
1. iothread=3@0:1:2/0:1
   `add_virtual_device    9 virtio-blk iothread=3@0:1:2/0:1,mq=3,/dev/nvme1n1`
   a) 3 iothread instances are created.
   b) CPU affinity of iothread instances for this virtio-blk device:
      - 1st iothread instance <-> pins to Service VM CPU 0,1,2
      - 2nd iothread instance <-> pins to Service VM CPU 0,1
      - 3rd iothread instance <-> No CPU affinity settings

2. iothread=3@0/*/1
   `add_virtual_device    9 virtio-blk iothread=3@0/*/1,mq=3,/dev/nvme1n1`
   a) 3 iothread instances are created.
   b) CPU affinity of iothread instances for this virtio-blk device:
      - 1st iothread instance <-> pins to Service VM CPU 0
      - 2nd iothread instance <-> No CPU affinity settings
      - 3rd iothread instance <-> pins to Service VM CPU 1

v1 -> v2:
 * encapsulate one API in iothread.c to parse the iothread options, so that
   other BE can also use it.

v2 -> v3:
 * introduce one API iothread_free_options to free the elements that
   are allocated dynamically in iothread_parse_options().

Tracked-On: #8612

Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2024-06-05 15:23:33 +08:00
Shiqing Gao a90aa4fd26 dm: iothread: rename the thread for better readability
This patch renames the iothread for better readability. For instance,
the new name of the iothread for virtio-blk device looks like `iothr-0-blk9:0`.

It could be helpful when tuning the performance and the CPU utilization.

v1 -> v2:
 * add `const` qualifier for the input parameter of `iothread_create`

Tracked-On: #8612

Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2024-06-05 15:23:33 +08:00
Shiqing Gao 14c20fa31c dm: block_if: support misaligned request when O_DIRECT is used
Use of O_DIRECT flag could be a performance option.
But this flag may impose alignment restrictions on the length
and address of user-space buffers and the file offset of I/Os.

To support the use of O_DIRECT flag in block_if, this patch adds the support
to handle the misaligned request.
 - When O_DIRECT flag is used (`nocache` is specified in acrn-dm parameters),
    * if the original I/O request is aligned,
      the original I/O request is submitted directly.
    * if the original I/O request is not aligned (either due to the buffer
        address/length misalignment, or the offset misalignment),
      the misaligned request is converted to an aligned request before
      submission.

 - When O_DIRECT flag is not used,
   the original I/O request is submitted directly.

v1 -> v2:
 * cleanup the free() logic in `blockif_init_bounced_write`

Tracked-On: #8612

Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2024-06-05 15:23:33 +08:00
Shiqing Gao e2da306755 dm: block_if: support bypassing the Service VM's page cache
This patch adds an acrn-dm option `nocache` to bypass the Service VM's
page cache.
 - By default, the Service VM's page cache is utilized.
 - If `nocache` is specified in acrn-dm parameters, the Service VM's page cache
   would be bypassed (opening the file/block with O_DIRECT flag).

Example to bypass the Service VM's page cache:
`add_virtual_device    5 virtio-blk iothread,mq=2,/dev/nvme2n1,writeback,nocache`

Tracked-On: #8612

Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2024-06-05 15:23:33 +08:00
Jian Jun Chen 63d41a75fa dm: set iothread nice value to PRIO_MIN
To improve the performance of the virtual device who utilizes iothread
(such as virtio-blk), this patch sets iothread nice value to PRIO_MIN,
so that it could get higher priority on scheduling.

This patch does:
 - introduce `set_thread_priority` to set the priority of the current running
   thread.
   The priority could be any value in the range PRIO_MIN to PRIO_MAX.
   Lower numerical value causes more favorable scheduling.

 - set iothread nice value to PRIO_MIN.

Tracked-On: #8612

Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com>
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2024-06-05 15:23:33 +08:00
Shiqing Gao 7e6a239646 dm: improve the flexibility of the iothread support
Prior to this patch, one single iothread instance is created and initialized
in the `main` function. This single iothread monitors all the registered fds
and handles all the corresponding requests. It leads to the limited flexibility
of the iothread support.

To improve the flexibility of the iothread support, this patch does:
- add the support of multiple iothread instances.
  `iothread_create` is introduced to create a certain number of iothread
  instances. It shall be called at first by each virtual device owner (such as
  virtio-blk BE) on initialization phase. Then, `iothread_add` can be called
  to add the to be monitored fd to the specified iothread.

- update virtio-blk BE to let the acrn-dm option `iothread` accept a number
  as the number of iothread instances to be created.
  If `iothread` is contained in the parameters, but the number is not specified,
  one iothread instance would be created by default.
  Examples to specify the number of iothread instances:
  1. Create 2 iothread instances
  `add_virtual_device    9 virtio-blk iothread=2,mq=2,/dev/nvme1n1,writeback,aio=io_uring`
  2. Create 1 iothread instances (by default)
  `add_virtual_device    9 virtio-blk iothread,mq=2,/dev/nvme1n1,writeback,aio=io_uring`

- update virtio-blk BE to separate the request handling of different virtqueues
  to different iothreads.
  The request from one or more virtqueues can be handled in one iothread.
  The mapping between virtqueues and iothreads is based on round robin.

v1 -> v2:
 * add a mutex to protect the free ioctx slot allocation

Tracked-On: #8612

Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2024-06-05 15:23:33 +08:00
Shiqing Gao fed8ce513c dm: block_if: add the io_uring support
io_uring is a high-performance asynchronous I/O framework, primarily designed
to improve the efficiency of input and output (I/O) operations in user-space
applications.
This patch enables io_uring in block_if module. It utilizes the interfaces
provided by the user-space library `liburing` to interact with io_uring
in kernel-space.

To build the acrn-dm with io_uring support, `liburing-dev` package needs to be
installed. For example, it can be installed like below in Ubuntu 22.04.
        sudo apt install liburing-dev

In order to support both the thread pool mechanism and the io_uring mechanism,
an acrn-dm option `aio` is introduced. By default, thread pool mechanism is
selected.
- Example to use io_uring:
  `add_virtual_device    9 virtio-blk iothread,mq=2,/dev/nvme1n1,writeback,aio=io_uring`
- Example to use thread pool:
  `add_virtual_device    9 virtio-blk iothread,mq=2,/dev/nvme1n1,writeback,aio=threads`
- Example to use thread pool (by default):
  `add_virtual_device    9 virtio-blk iothread,mq=2,/dev/nvme1n1,writeback`

v2 -> v3:
 * Update iothread_handler
    - Use the unified eventfd interfaces to read the counter value of the
      ioeventfd.
    - Remove the while loop to read the ioeventfd. It is not necessary
      because one read would reset the counter value to 0.
 * Update iou_submit_sqe to return an error code
   The caller of iou_submit_sqe shall check the return value.
   If there is NO available submission queue entry in the submission queue,
   need to break the while loop. Request can only be submitted when SQE is
   available.

v1 -> v2:
 * move the logic of reading out ioeventfd from iothread.c to virtio.c, because
   it is specific to the virtqueue handling.

Tracked-On: #8612

Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2024-06-05 15:23:33 +08:00
Jian Jun Chen edb392e7ed dm: block_if: add multiple queues support
block_if is the backend of ahci and virtio-blk. Only one queue is
supported by block_if now. Several worker threads are created as
the thread pool for the queue. One BIG mutex is used for the queue
and thread operation. With this patch block_if can support multiple
queues and each queue is backed by several worker threads. blockif_req
can be submited/enqueued into one specified queue. By spliting into
several queues contention from the BIG mutex can be relieved/eliminated.
This is used to support virtio-blk multiple queues feature.

Tracked-On: #8612

Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2024-06-05 15:23:33 +08:00
Jian Jun Chen 562c22fb4e dm: virtio-blk: add multiple queues (mq) support
Virtio-blk can support multiple virtqueues (mq) which is negotiated
between FE and BE by the feature bit VIRTIO_BLK_F_MQ. The virtqueue
number of virtio-blk can be specified by "mq=x" in the parameter.
For example: "virtio-blk,iothread,mq=2,..."

Tracked-On: #8612

Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2024-06-05 15:23:33 +08:00
Jian Jun Chen 74bc2f7cfb hv: asyncio: support data match of the same addr
Virtio legacy device (ver < 1.0) uses a single PIO for all virtqueues.
Notifications from different virtqueues are implemented by writing
virtqueue index to the PIO. Writing different values to the same addr
needs to be mapped to different eventfds by asyncio. This is called
data match feature of asyncio.

v3 -> v4:
 * Update the definition of `struct asyncio_desc`
   Use `struct acrn_asyncio_info` inside it, instaed of defining the duplicated
   fileds.
 * Update `add_asyncio` to use `memcpy_s` rather than assigning all the fields
   using 5 assignment statements.
 * Update `asyncio_is_conflict` for coding style
   120-character line is sufficient to write all conditions.
 * Update the checks related to `wildcard`
   Because we require every conditional clause to have a Boolean type
   in the coding guideline.

v2 -> v3:
No change

v1 -> v2:
No change

Tracked-On: #8612

Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com>
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2024-06-05 15:23:33 +08:00
Jian Jun Chen 2737281010 dm: virtio: add per queue mutex
ACRN virtio devices are using a per device mutex to protect the
concurrent operations on the device's PIO/MMIO. This introduces
big contention in fast IO hence downgrades the IO performance,
for example virtio-blk with asyncio enabled. This patch introduces
per queue mutex to relieve such issues. Currently the per queue
mutex is only used in the asycio path when iothread is enabled.

Tracked-On: #8612

Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2024-06-05 15:23:33 +08:00
Jian Jun Chen 26aece0492 dm: virtio: fix a asyncio/ioeventfd bug
ACRN_IOEVENTFD_FLAG_ASYNCIO is not set when unregister ioeventfd
in the current implementation which will cause the old asyncio_desc
will be remained in hypervisor link list when switching from OVMF to
kernel.

Tracked-On: #8612

Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2024-06-05 15:23:33 +08:00
Jiaqing Zhao 91e0612e88 hv: dm: refine create/destroy functions
The create function of hv-emulated device must check the return value
of vpci_init_vdev() as it returns NULL pointer on failure, and that
function should be called atomically.

Also, the destory function should deinit the vpci devices created to
prevent resource leak.

Tracked-On: #8590
Signed-off-by: Jiaqing Zhao <jiaqing.zhao@linux.intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2024-06-04 09:38:34 +08:00
Jiaqing Zhao 626e2f1d17 hv: vpci: clear vdev structure on device deassign
In devicemodel, a passthrough device is deassigned and then assigned to
guest on guest reboot. Each time hypervisor allocates a new pci_vdev
structure to keep its info. As it was stored in a statically-allocated
array, it will eventually use up all slots, resulting both resource
leak and out-of-bounds access.

Fix it by clearing the corresponding vdev structure on device deassign,
thus a bitmap is introduced to track the usage, replacing the existing
array count.

Tracked-On: #8590
Signed-off-by: Jiaqing Zhao <jiaqing.zhao@linux.intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2024-06-04 09:38:34 +08:00
shuaizhx db782cff1e misc: fix tauri's vulnerability
The vulnerability was scanned by Trivy on May 28,2024.
Vulnerability ID is GHSA-xphf-cx8h-7q9g and severity is medium,
with title iFrames Bypass Origin Checks for Tauri API Access Control.
I fixed the crash and checked by build-install-launch procedure, I confirm it was solved.

Signed-off-by: dongpingx <dongpingx.wu@intel.com>
Tracked-On: #8613
2024-05-30 22:23:51 +08:00
Haiwei Li b885d02396 hv: cpuid: add several leaf to per-cpu list in hybrid architecture
P-cores and E-cores accessing leaf 0x2U/0x14U/0x16U/0x18U/0x1A/0x1C/0x80000006U
will have different information in hybrid architecture.

So add them to per-cpu list in hybrid architecture and directly return
the physical value.

Note: 0x14U is hided and return 0.

Tracked-On: #8608
Signed-off-by: Haiwei Li <haiwei.li@intel.com>
2024-05-28 11:02:56 +08:00
Haiwei Li d6fe8b0892 hv: cpuid: make leaf 0x6 per-cpu in hybrid architecture
Leaf 0x6 returns thermal and power management information. In
hybrid architecture, P-cores and E-cores have different information.

Add leaf 0x6 to per-cpu list in hybrid architecture and handle specific
cpuid access.

Tracked-On: #8608
Signed-off-by: Haiwei Li <haiwei.li@intel.com>
2024-05-28 11:02:56 +08:00
Haiwei Li 59a8cc4c28 hv: cpuid: make leaf 0x4 per-cpu in hybrid architecture
Leaf 0x4 returns deterministic cache parameters for each level. In
hybrid architecture, P-cores and E-cores have different cache
information.

Add leaf 0x4 to per-cpu list in hybrid architecture and handle specific
cpuid access.

Tracked-On: #8608
Signed-off-by: Haiwei Li <haiwei.li@intel.com>
2024-05-28 11:02:56 +08:00
Haiwei Li f7506424e4 hv: cpuid: refactor per-cpu leaves definition
CPUID returns processor identification and feature information.
Different pcpus may return different infos. That is, the info is
per-cpu.

In hybrid architecture, per-cpu leaf is different from the previous. So
introduce a struct percpu_cpuids to indicate the per-cpu leaf. struct
percpu_cpuids will consist of two parts: generic percpu leaves and
hybrid related percpu leaves.

This patch is just to add generic percpu leaves.

Tracked-On: #8608
Signed-off-by: Haiwei Li <haiwei.li@intel.com>
2024-05-28 11:02:56 +08:00
Xin Zhang 7edf800f16 Expose CPUID leaf 0x1f to guest with patched x2APIC ID
CPUID leaf 1f is preferred superset of leaf 0b, currently ACRN exposes
leaf 0b but leaf 1f is empty so the 2 leaves mismatch, and so
application will follow the SDM to check 1f first.

Tracked-On: #8608
Signed-off-by: Xin Zhang <xin.x.zhang@intel.com>
2024-05-28 11:02:56 +08:00
shuaizhx 9810bda461 misc: fix v-model used on props for vue3 make strictly checking
I make this change during recent building configurator but got a failure.
The change is to fix the problem caused by vue3's strictly syntax chacking.
It is reported for newly releases only and before v3.2.25 it is a warning.
I follow the error message and suggestion to change the code.
Error message said "v-model cannot be used on a prop,
because local prop bindings are not writable".
Suggestion said "Use v-bind binding combined with v-on listener to emit update"
I ran the build & install procedure to verify the problem was solved.

Signed-off-by: dongpingx <dongpingx.wu@intel.com>
Tracked-On: #8596
2024-05-16 20:39:54 +08:00
Zhangwei6 ddfcb8c3fc hv: enable thermal lvt interrupt
This patch can fetch the thermal lvt irq and propagate
it to VM.

At this stage we support the case that there is only one VM
governing thermal. And we pass the hardware thermal irq to this VM.

First, we register the handler for thermal lvt interrupt, its irq
vector is THERMAL_VECTOR and the handler is thermal_irq_handler().

Then, when a thermal irq occurs, it flags the SOFTIRQ_THERMAL bit
of softirq_pending, This bit triggers the thermal_softirq() function.
And this function will inject the virtual thermal irq to VM.

Tracked-On: #8595

Signed-off-by: Zhangwei6 <wei6.zhang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2024-05-16 09:40:32 +08:00
Zhangwei6 78243c3f49 hv: expose thermal MSRs to VM.
In this phase, we only use one VM to control thermal.
So we make thermal MSRs readable and writable by this VM.

This VM is flagged with GUEST_FLAG_VTM, and can
read/write thermal MSRs.
For the VMs not flagged with GUEST_FLAG_VTM,
can only read these thermal MSRs to get current status.

Tracked-On: #8595
Signed-off-by: Zhangwei6 <wei6.zhang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2024-05-16 09:40:32 +08:00
Zhangwei6 5d7e217f55 config_tools: support the GUEST_FLAG_VTM flag
In hv, we implement the feature of thermal virtualization,
We want to use this GUEST_FLAG_VTM flag to enable and
disable this feature. So we mark this flag in config
tools.

Tracked-On: #8595

Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
Signed-off-by: Zhangwei6 <wei6.zhang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2024-05-10 16:39:49 +08:00
Jiaqing Zhao 40d6172247 debian: fix broken grub config with grub 2.12
`version_find_latest` is removed in grub 2.12, replace it with
`sort -V -r` for maximum compatibility.

Tracked-On: #8576
Signed-off-by: Jiaqing Zhao <jiaqing.zhao@linux.intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2024-05-09 21:33:12 +08:00
Jiaqing Zhao 98e546e93d misc: fix invalid escape sequence in python 3.12
Python 3.12 adds escape sequence check in strings, if it is invalid,
a SyntaxWarning will be given. Fix it by using raw string notation
in regular expressions, and changing comments in unused string literal
to normal comments.

Tracked-On: #8588
Signed-off-by: Jiaqing Zhao <jiaqing.zhao@linux.intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2024-05-09 20:58:21 +08:00
shuaizhx 69e4b936a8 misc: fix dependencies issue for h2, mio and postcss
Reported by dependabot and scanned by Trivy, there are two dependancies
for Rust crates and one for JavaScript 3rd-party library.
Select the correct versions to fix the issue and verify already.

Tracked-On: #8592
2024-05-09 19:30:16 +08:00
Zhang Chen 946a927dcb hv: sched: Fix scheduler priority issue
Fix build issue.

Tracked-On: #8586

Signed-off-by: Zhang Chen <chen.zhang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2024-05-08 14:52:23 +08:00
Qiang Zhang 629808c767 debug: vuart: fix interrupt ID for data receiving
When RX FIFO is not empty and Receive Data Available interrupt is
enabled, vUART should report a Receive Data Available (IIR_RXRDY) in IIR
instead of a Timeout Interrupt Pending (IIR_RXTOUT).

Tracked-On: #8583
Signed-off-by: Qiang Zhang <qiang4.zhang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2024-04-25 15:00:09 +08:00
Qiang Zhang c623e11125 debug: vuart: add guest break key support
The break key (key value 0x0) was used as switch key from guest serial
to hv console and guest serial could not receive break key. This blocked
some guest debugging features like KGDB/KDB, sysrq, etc.

This patch leverages escape sequence "<escape> + <break>" to send break to
guest and "<escape> + e" to switch from guest serial to hv console.

Tracked-On: #8583
Signed-off-by: Qiang Zhang <qiang4.zhang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2024-04-25 15:00:09 +08:00
Qiang Zhang 01beb65527 dm: fix LPC UART no output issue after reboot
The meaning of lpc_uart_vdev::enabled was changed from runtime enablement
status of UARTs to user configuration in commit 852f10cc3. So it's
incorrect to clear it in lpc_deinit() which will cause UARTs disabled
after reboot.

Tracked-On: #8537
Fixes: 852f10cc3 ("dm: lpc: only emulate COM ports specified in command line")
Signed-off-by: Qiang Zhang <qiang4.zhang@intel.com>
2024-04-25 12:01:36 +08:00
Yi Sun e0d03b27d0 hv: return error code for default case in hcall_vm_intr_monitor
In hcall_vm_intr_monitor(), the default case for intr_hdr->cmd is a
wrong case. So, it should return error code back. But it returns success
code 0 in current codes.

Tracked-On: #8580
Reviewed-by: Fei Li <fei1.li@intel.com>
Signed-off-by: Yi Sun <yi.y.sun@linux.intel.com>
2024-04-23 15:58:36 +08:00
Yonghua Huang 7bcd9d783e hv: refine set_fs_base() function
Leave canary of stack protector untouched on pCPU
 if it has been initialized, instead of generating a new one.

Tracked-On: #8577
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
2024-04-23 11:00:43 +08:00
Yonghua Huang d5d21fdc1b hv: fix potential NULL pointer dereferrence in ivshmem.c
secure coding fix.

Tracked-On: #8566
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2024-04-10 12:20:54 +08:00
Yonghua Huang 93256648f5 dm: fill region ID to dm-land ivshmem PCI config space
1) region ID shall be configured by user via config tool.
  2) region ID is programmed to "Subsystem ID" of PCI config space.
  2) "Subsystem Vendor ID" is harded coded as 0x8086

  Parameters to configure dm-land IVSHMEM device example generated
  by config tool as below:
  `add_virtual_device   8 ivshmem hv:/shm_region_0,256,2`

Tracked-On: #8566
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Reviewed-by: Jian Jun Chen <jian.jun.chen@intel.com>
2024-03-28 14:34:38 +08:00
Yonghua Huang ddfe218747 hv: fill region ID to hv-land ivshmem PCI config space
1) region ID shall be configured by user via config tool.
   2) region ID is programmed to "Subsystem ID" of PCI config space.
   2) "Subsystem Vendor ID" is harded coded as 0x8086

Tracked-On: #8566
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2024-03-28 14:34:38 +08:00
Yonghua Huang a7a6732580 config_tools: support IVSHMEM devices region ID configuration
This patch adds ivshmem region ID configuration support when user
   configure ACRN IVSHMEM devices via ACRN config tool, this ID provides
   VMs with a stable identification of multiple shared memory regions.

   Also add logic to generate launch script with region ID configured
   as below:
   `add_virtual_device  8 ivshmem hv:/shm_region_0,256,1`

Tracked-On: #8566
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2024-03-28 14:34:38 +08:00
Jiaqing Zhao f6bb15c85c hv: mmu: intiialize ppt_page_pool.bitmap in allocate_ppt_pages()
ppt_page_pool.bitmap should be zero-initialized. Also fixes the wrong
indention in allocate_ppt_pages().

Tracked-On: #8559
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Signed-off-by: Jiaqing Zhao <jiaqing.zhao@linux.intel.com>
2024-03-25 09:57:08 +08:00
Jiaqing Zhao 997bdc4843 hv: configure hv console default output in scenario file
Add a new option CONSOLE_VM in scenario to set the default vm to be
outputted in hv console, when it is not set, acrn console will be
used (current behavior). This is intended for debugging vm boot issues.

Tracked-On: #8518
Signed-off-by: Jiaqing Zhao <jiaqing.zhao@linux.intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2024-03-25 09:52:30 +08:00
Wu Zhou a052cda8e4 hv: console reads all input chars in one poll
For uart console, some control keys are defined as byte sequences,
such as:
 * up arrow - 0x1b/0x5b/0x41
 * F8 - 0x1b/0x5b/0x31/0x39/0x7e

Currently hv console only read one char per poll.
When guest vuart console is active, those byte sequences may not be sent
to guest vuart in good timing due to the poll interval. Thus control keys
such as up/down can not be used in shell or vim.

The solution is to read all input chars in one poll, so that control keys
can be received by guest OS properly.

Tracked-On: #8564
Signed-off-by: Wu Zhou <wu.zhou@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2024-03-12 15:26:58 +08:00
dependabot[bot] edeb5fe9ca build(deps): bump openssl
Bumps [openssl](https://github.com/sfackler/rust-openssl) from 0.10.55 to 0.10.60.
- [Release notes](https://github.com/sfackler/rust-openssl/releases)
- [Commits](https://github.com/sfackler/rust-openssl/compare/openssl-v0.10.55...openssl-v0.10.60)

---
updated-dependencies:
- dependency-name: openssl
  dependency-type: indirect
...

Signed-off-by: dependabot[bot] <support@github.com>
2024-03-05 16:03:38 +08:00
Wu Zhou 925e3d95b4 hv: add max_len for sbuf_put param
sbuf_put copies sbuf->ele_size of data, and puts into ring. Currently
this function assumes that data size from caller is no less than
sbuf->ele_size.

But as sbuf->ele_size is usually setup by some sources outside of the HV
(e.g., the service VM), it is not meant to be trusted. So caller should
provide the max length of the data for safety reason. sbuf_put() will
return UINT32_MAX if max_len of data is less than element size.

Additionally, a helper function sbuf_put_many() is added for putting
multiple entries.

Tracked-On: #8547
Signed-off-by: Wu Zhou <wu.zhou@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2024-02-20 11:52:02 +08:00