HV_RAM_SIZE will be eliminated as a configuration option so we'll need
to remove references to it in the documentation.
See PR #6664 and PR #6681
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
'error' might be used uninitialized in cfginitbar. So initialize it to zero
at the beginning.
Tracked-On: #6284
Signed-off-by: Fei Li <fei1.li@intel.com>
PR #6283 updated code and docs to the new kernel HSM driver. Fix
some references to VHM missed in the doxygen comments. Also fixed some
misspellings while in these files.
Tracked-On: #6282
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
For the IGD device the opregion addr is returned by reading the 0xFC config of
0:02.0 bdf. And the opregion addr is required by GPU driver.
The opregion_addr should be the GPA addr.
When the IGD is assigned to pre-launched VM, the value in 0xFC of igd_vdev is
programmed into with new GPA addr. In such case the prelaunched VM reads
the value from 0xFC of 0:02.0 vdev.
But for the Service VM, the IGD is initialized by using the same policy as other PCI
devices. We only initialize the vdev_head_conf(0x0-0x3F) by checking the
corresponding pbdf. The remaining pci_config_space will be read by
leveraging the corresponding pdev. But as the above code doesn't handle the
scenario for Service VM, it causes that the Service VM fails to
read the 0xFC config_space for IGD vdev.
Then the i915 GPU driver in SOS has some issues because of incorrect 0xFC
pci_conf_space.
This patch initializes offset 0xfc of CFG space of IGD for Service VM,
it is simple and can cover post-launched VM too.
Tracked-On: #6387
Signed-off-by: Liu,Junming <junming.liu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
In the current hypervisor, only support at most two legacy vuarts
(COM1 and COM2) for a VM, COM1 is usually configured as VM console,
COM2 is configured as communication channel of S5 feature.
Hypervisor can support MAX_VUART_NUM_PER_VM(8) legacy vuart, but only
register handlers for two legacy vuart since the assumption (legacy
vuart is less than 2) is made.
In the current hypervisor configurtion, io port (2F8H) is always
allocated for virtual COM2, it will be not friendly if user wants to
assign this port to physical COM2.
Legacy vuart is common communication channel between service VM and
user VM, it can work in polling mode and its driver exits in each
guest OS. The channel can be used to send shutdown command to user VM
in S5 featuare, so need to config serval vuarts for service VM and one
vuart for each user VM.
The following changes will be made to support at most
MAX_VUART_NUM_PER_VM legacy vuarts:
- Refine legacy vuarts initialization to register PIO handler for
related vuart.
- Update assumption of legacy vuart number.
BTW, config tools updates about legacy vuarts will be made in other
patch.
v1-->v2:
Update commit message to make this patch's purpose clearer;
If vuart index is valid, register handler for it.
Tracked-On: #6652
Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@Intel.com>
Update logical partition to simply partitioned.
Remaining references to logical partition are because the documentation
is validated for releases prior to the scenario renaming. When those
are updated to be tested with a newer release, we'll update the
documentation accordingly.
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
It's difficult to configure CONFIG_HV_RAM_SIZE properly at once. This patch
not only remove CONFIG_HV_RAM_SIZE, but also we use ld linker script to
dynamically get the size of HV RAM size.
Tracked-On: #6663
Signed-off-by: Fei Li <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This patch implements a separate path for L2 VMEntry in run_vcpu(),
which has several benefits:
- keep run_vcpu() clean, to reduce the number of is_vcpu_in_l2_guest()
statements:
- current code has three is_vcpu_in_l2_guest() already.
- supposed to have another 2 statement so that nested VMEntry won't
hit the "Starting vCPU" and "vCPU launched" pr_info() and a few
other statements in the VM launch path.
- save few other things in run_vcpu() that are not needed for nested.
Tracked-On: #6289
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@Intel.com>
- Change "configuration tool" to "ACRN configurator tool" to match the tool's UI
- Change "configuration toolset" to "ACRN configurator tool" in cases that clearly refer to the configurator and not the entire toolset, update cross-ref
Signed-off-by: Amy Reyes <amy.reyes@intel.com>
Address a collection of small issues in the GSG:
- remove mention of the (optional) serial port use
- update recommended development computer memory size
- mention why there are six user VM launch scripts (and that we're only going to
use one of them)
- clarify how OS installed for running board inspector is modified with
the Linux kernel built using board and configuration information
- add commands used to confirm files are in the expected directories
- remove specific BIOS example (keep just settings info)
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
If a legacy vuart base is configured as "CONFIG_COM_BASE", allocate a
base with unused io-port address with length 0x10.
The post-launched VM's unused io-port address range is [0xD00, 0xFFFF].
The pre-launched VM's unused io-port address range is [0xD00, 0xFFFF]
but the passthrough devices' io-port address are reserved.
The SOS VM's unused io-port address range is [0xD00, 0xFFFF] but any
native devices' io-port address are reserved. However, the io-port
address which is passed through to any pre-launched is reusable.
Tracked-On: #6652
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Expand the capacity of legacy vuarts per VM. This change is applied to
manual scenario xml editing only.
A SOS VM can choose io port 0x3F8, 0x2F8, 0x3E8, 0x2E8 by selecting
SOS_COM1_BASE, SOS_COM2_BASE, SOS_COM3_BASE, SOS_COM4_BASE respectively.
Non SOS VM can choose io port 0x3F8, 0x2F8, 0x3E8, 0x2E8 by selecting
COM1_BASE, COM2_BASE, COM3_BASE, COM4_BASE respectively.
For any type of VM, selecting "CONFIG_COM_BASE" allows configuration tool
to pick an available io port from hardcoded list:
['0xA000', '0xA010', '0xA020', '0xA030', '0xA040', '0xA050', '0xA060', '0xA070']
A SOS VM can choose irq 4 by selecting SOS_COM1_IRQ and SOS_COM3_IRQ, and choose irq 3 by selecting SOS_COM2_IRQ and SOS_COM4_IRQ.
Non SOS VM can choose irq 4 by selecting COM1_IRQ and COM3_IRQ, and choose irq 3 by selecting COM2_IRQ and COM4_IRQ.
For SOS VM, selecting "CONFIG_COM_IRQ" allows configuration tool
to pick an available irq based on AVAILABLE_IRQ_INFO. For non SOS VM, it
will allocate an available irq from [1, 15].
Tracked-On: #6652
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
In run time, one vCPU won't read or write a register on other vCPUs,
thus we don't need the LOCK prefixed instructions on reg_cached and
reg_updated.
Tracked-On: #6289
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
move the bitmap test call out of vcpu_inject_exception(), then we call
the expensive bitmap_test_and_clear_lock() only pending_req_bits is
non-zero and call vcpu_inject_exception() only if needed.
Tracked-On: #6289
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@Intel.com>
In very large number of VM extis, the VM-exit instruction length could be
zero, and it's no need to update VMX_GUEST_RIP.
Some examples:
- all external interrupt VM exits in non LAPIC passthru setup.
- for all the nested VM-exits that are reflecting to L1 hypervisor.
Tracked-On: #6289
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
- wrap a new function exec_vmentry() to reduce code duplication.
- remove exec_vmread(VMX_GUEST_RSP) since ACRN doesn't need to know
guest RSP in run time.
Tracked-On: #6289
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Change "uint64_t vmcs_hva" to "void *vmcs_hva" in the input argument,
list, so that no type casting is needed when calling them from pointers.
Tracked-On: #6289
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Update the docs and images referencing ``industry`` and ``logical_partition`` scenarios to
``shared`` and ``partioned``.
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
As recommended, add a ``-y`` to the ``apt install`` commands so they
don't prompt the user to confirm the installation, seen as unnecessary
in this context.
Also, wrap lines that are longer then 80 chars to improve git reviews
and follow our doc conventions.
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Update the "Enable S5 in ACRN" tutorial to:
* Make the language clearer at places
* Consistent use of "Lifecycle Manager" and "life_mngr"
* Change "ACK" to "ACKED"
* Use a ReST reference to point at the architectural diagram
* Update build instructions
* Replace 'literalinclude' by static code-blocks to avoid the
content going out of date
Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
Change references to VHM to HSM (Hypervisor Service Module) in images.
While in these files, update SOS (to Service VM) and UOS (to User VM) as
well.
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
update board name from nuc7i7dnb to nuc11tnbi5 in makefile because
we have removed the nuc7i7dnb board folder, and also update the
scenario name from industry to shared to fix "make all" build issue.
Tracked-On: #6315
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
1. move tgl-rvp and ehl-crb-b folders under data directory to 1source.
2. delete nuc7i7dnb and whl-ipc-i7 folders under data directory.
Tracked-On: #6315
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
Add a couple of redirect pages for 404 errors noted in analytics data,
and add replace the deleted roscube GSG with a doc linking to the last
updated version in v2.5.
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
- Create ACRN config tool doc based on info in existing "Intro to ACRN Configuration" doc, add clarifications
- Create board inspector tool doc based on info in existing "Intro to ACRN Configuration" doc, add clarifications
- Create launch config options doc based on info in existing "Intro to ACRN Configuration" doc, similar to existing scenario config options doc
- Update refs that no longer exist
- Create hypervisor makefile options doc, combining makefile info from "Intro to ACRN Configuration" doc and "Build ACRN from Source" doc
- Clarify why you need config files, difference between scenario vs. launch VM settings
- Updates are intended to reflect v2.6 code
Signed-off-by: Amy Reyes <amy.reyes@intel.com>
There are many graphics-related terms in the glossary that are not
referenced in the documentation. Remove those terms, and clarify new
terms in our updated GSG and introductory docs.
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
In current design, when pass-thru dev,
for the PIO bar, need to ensure the guest PIO start address
equals to host PIO start address.
But malicious guest may reprogram the PIO bar,
then hv will pass-thru the reprogramed PIO address to guest.
This isn't safe behavior.
When guest tries to reprogram pass-thru dev PIO bar,
inject #GP to guest directly.
Tracked-On: #6508
Signed-off-by: Liu,Junming <junming.liu@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
In current design, when pass-thru dev,
for the PIO bar, need to ensure the guest PIO start address
equals to host PIO start address.
Then set the VMCS io bitmap to pass-thru the corresponding
port io to guest for performance.
ACRN-DM and acrn-config should ensure the identical mapping of PIO bar.
If ACRN-DM or acrn-config failed to achieve this,
we should deny the launch of VM
Tracked-On: #6508
Signed-off-by: Liu,Junming <junming.liu@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
Update security vulnerability fix in 2.6 release.
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
1.Modified Intel Whiskey Lake to Intel NUC Kit NUC11TNBi5
2.Change the logical partition and mixed test motherboard name
Signed-off-by: zhongzhenx.liu <zhongzhenx.liu@intel.com>
David B. Kinder