Commit Graph

176 Commits

Author SHA1 Message Date
Victor Sun e4a58363e3 HV: fix MISRA violation of _ld_ram_xxx
Variable should not have a prefix of '_' per MISRA C standard. The patch
removes the prefix for _ld_ram_start and _ld_ram_end.

Tracked-On: #6885

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2021-11-26 16:45:17 +08:00
Victor Sun e718f48a55 HV: correct hv_ram_size when hv is relocated
In previous commit df7ffab441
the CONFIG_HV_RAM_SIZE was removed and the hv_ram_size was calculated in
link script by following formula:
	ld_ram_size = _ld_ram_end - _ld_ram_start ;
but _ld_ram_start is a relative address in boot section whereas _ld_ram_end
is a absolute address in global, the mix operation cause hv_ram_size is
incorrect when HV binary is relocated.

The patch fix this issue by getting _ld_ram_start and _ld_ram_end respectively
and calculated at runtime.

Tracked-On: #6885

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2021-11-26 16:45:17 +08:00
Yuanyuan Zhao 4f6aa38ea5 hv: remove CONFIG_LOW_RAM_SIZE
The CONFIG_LOW_RAM_SIZE is used to describe the size of trampoline code
that is never changed. And it totally confused user to configure it.

This patch hard code it to 1MB and remove the macro for configuration.
In the trampoline related code, use ld_trampoline_end and
ld_trampoline_start symbol to calculate the real size.

Tracked-On: #6805
Signed-off-by: Yuanyuan Zhao <yuanyuan.zhao@linux.intel.com>
Reviewed-by: Wang, Yu1 <yu1.wang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2021-11-12 11:56:03 +08:00
Fei Li df7ffab441 hv: remove CONFIG_HV_RAM_SIZE
It's difficult to configure CONFIG_HV_RAM_SIZE properly at once. This patch
not only remove CONFIG_HV_RAM_SIZE, but also we use ld linker script to
dynamically get the size of HV RAM size.

Tracked-On: #6663
Signed-off-by: Fei Li <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2021-10-14 15:04:36 +08:00
Minggui Cao 691a0e2e56 HV: add a specific stack space used in CPU booting
The original stack used in CPU booting is: ld_bss_end + 4KB;
which could be out of the RAM size limit defined in link_ram file.

So add a specific stack space in link_ram file, and used in
CPU booting.

Tracked-On: #4738
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Reviewed by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2020-04-29 13:56:40 +08:00
Zide Chen 49ffe168af hv: fixup relocation delta for symbols belong to entry section
This is to enable relocation for code32.

- RIP relative addressing is available in x86-64 only so we manually add
  relocation delta to the target symbols to fixup code32.

- both code32 and code64 need to load GDT hence both need to fixup GDT
  pointer. This patch declares separate GDT pointer cpu_primary64_gdt_ptr
  for code64 to avoid double fixup.

- manually fixup cpu_primary64_gdt_ptr in code64, but not rely on relocate()
  to do that. Otherwise it's very confusing that symbols from same file could
  be fixed up externally by relocate() or self-relocated.

- to make it clear, define a new symbol ld_entry_end representing the end of
  the boot code that needs manually fixup, and use this symbol in relocate()
  to filter out all symbols belong to the entry sections.

Tracked-On: #4441
Reviewed-by: Fengwei Yin <fengwei.yin@intel.com>
Signed-off-by: Zide Chen <zide.chen@intel.com>
2020-03-06 08:27:46 +08:00
Shiqing Gao 773889bb65 hv: dmar_parse: remove dynamic memory allocation
This patch removes the dynamic memory allocation in dmar_parse.c.

v1 -> v2:
 - rename 'const_dmar.c' to 'dmar_info.c' and move it to
   'boot' directory
 - add CONFIG_DMAR_PARSE_ENABLED check for function declaration

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
2019-05-10 11:33:37 +08:00
Jason Chen CJ 20f97f7559 restruct boot and bsp dir for firmware stuff
currently, ACRN hypervisor can either boot from sbl/abl or uefi, that's
why we have different firmware method under bsp & boot dirs.
but the fact is that we actually have two different operations based on
different guest boot mode:
1. de-privilege-boot: ACRN hypervisor will boot VM0 in the same context as
native(before entering hypervisor) - it means hypervisor will co-work with
ACRN UEFI bootloader, restore the context env and de-privilege this env
to VM0 guest.
2. direct-boot: ACRN hypervisor will directly boot different pre-launched
VM(including SOS), it will setup guest env by pre-defined configuration,
and prepare guest kernel image, ramdisk which fetch from multiboot modules.

this patch is trying to:
- rename files related with firmware, change them to guest vboot related
- restruct all guest boot stuff in boot & bsp dirs into a new boot/guest dir
- use de-privilege & direct boot to distinguish two different boot operations

this patch is pure file movement, the rename of functions based on old assumption will
be in the following patch.

Changes to be committed:
	modified:   ../efi-stub/Makefile
	modified:   ../efi-stub/boot.c
	modified:   Makefile
	modified:   arch/x86/cpu.c
	modified:   arch/x86/guest/vm.c
	modified:   arch/x86/init.c
	modified:   arch/x86/irq.c
	modified:   arch/x86/trampoline.c
	modified:   boot/acpi.c
	renamed:    bsp/cmdline.c -> boot/cmdline.c
	renamed:    bsp/firmware_uefi.c -> boot/guest/deprivilege_boot.c
	renamed:    boot/uefi/uefi_boot.c -> boot/guest/deprivilege_boot_info.c
	renamed:    bsp/firmware_sbl.c -> boot/guest/direct_boot.c
	renamed:    boot/sbl/multiboot.c -> boot/guest/direct_boot_info.c
	renamed:    bsp/firmware_wrapper.c -> boot/guest/vboot_wrapper.c
	modified:   boot/include/acpi.h
	renamed:    bsp/include/firmware_uefi.h -> boot/include/guest/deprivilege_boot.h
	renamed:    bsp/include/firmware_sbl.h -> boot/include/guest/direct_boot.h
	renamed:    bsp/include/firmware.h -> boot/include/guest/vboot.h
	modified:   include/arch/x86/multiboot.h

Tracked-On: #1842
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-05-09 16:33:44 +08:00
Victor Sun e2d723d4fa HV: enable acpi pm1a register info fixup
Previously ACPI PM1A register info was hardcoded to 0 in HV for generic boards,
but SOS still can know the real PM1A info so the system would hang if user
trigger S3 in SOS. Enabling PM1A register info fixup will let HV be able to
intercept the operation on PM1A and then make basic function of S3 work for
all boards;

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-05-07 11:39:51 +08:00
Mingqiang Chi da9ed0eda9 hv:remove some unnecessary includes
remove some unnecessary includes

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2019-05-07 09:10:13 +08:00
Kaige Fu a85d11ca7a HV: Add prefix 'p' before 'cpu' to physical cpu related functions
This patch adds prefix 'p' before 'cpu' to physical cpu related functions.
And there is no code logic change.

Tracked-On: #2991
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-04-24 10:50:28 +08:00
Xiangyang Wu c4c788ca33 HV:BSP:Update firmware detection and operations selecting logic
In the current design, hypervisor only detects two kinds of
multiboot compiliant firwares (UEFI loader and non-UEFI loader),
It can't detect other multiboot compliant firware (such GRUB
loader) and can't detect UEFI loader explicitly since loader
name is not supported by UEFI loader (efi stub). In the
logical partition scenario on KBL NUC i7, one multiboot
compliant firware is used to boot hypervisor and load guest
OS image, and firware runtime service shall be disable to
avoid interference. So GRUB can be selected as a candidate
to enable logical partition scenario on KBL NUC i7.

Update firware detection and operations selecting logic to detect
more multiboot compiliant firware (such as GRUB and UEFI loader)
explicitly, different operations is selected according to the
boot load name through a static mapping table between boot load name
and firmware operations. GRUB loader can use the SBL operations
to handle multiboot information parsing and vm booting since
these multiboot compiliant firmware (SBL/ABL/GRUB) which boots
hypervisor (binary format), provides multiboot information and
the start address of guest OS image(binary format) in the same way,
and only runs on boot time.
From MISRA C view, viarble array is not allowed, so define the
static array for above mapping table;
From security view, it is better use strncmp insteads of strcmp.

TODO: In future, need to redesign boot moudle to suport different
boot loader, different VM boot, and different guest OS.

V2-->V3:
        Update firmware detection logic to handle GRUB loader
        which is need to provided multiboot information to the
        hypervisor (such as the address of guest OS image);
V3-->V4:
        Update firmware detection and operations selecting logic
	to enable GRUB loader support in hypervisor;
V4-->V5:
	Separte UEFI loader name supporting in a separate patch,
	and update commit comment to make patch clearer.
V5-->V6:
	Update "Tracked-On"

Tracked-On: #2944

Signed-off-by: Xiangyang Wu <xiangyang.wu@linux.intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-04-16 12:07:58 +08:00
Arindam Roy 691468a361 HV: Remove hypervisor.h from bsp folder
Re-organize the code to remove usage of hypervisor.h from
bsp folder, without changing any functionality.

Tracked-On: #2694
Signed-off-by: Arindam Roy <arindam.roy@intel.com>
2019-03-25 11:13:57 +08:00
Arindam Roy 0947fbab94 HV: Fix a compiler warning in firmware.h
Added a struct acrn_vm in firmware.h to remove
a compiler warning.
No change in logic.

Tracked-On: #2830
Signed-off-by: Arindam Roy <arindam.roy@intel.com>
2019-03-21 10:28:44 +08:00
Tw 9b24620e16 hv: merge SBL and UEFI related stuff under boot
This patch mainly unifies init_vm_boot_info's implementation between SBL and
UEFI.

Tracked-On: #2708
Signed-off-by: Tw <wei.tan@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-13 10:26:55 +08:00
Tw 56d8b08b78 hv: merge SBL and UEFI related stuff under bsp
This patch unifies the bsp interface between UEFI and SBL.

Tracked-On: #2708
Signed-off-by: Tw <wei.tan@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-13 10:26:55 +08:00
Victor Sun 649406b049 HV: refine location of platform_acpi_info header
platform_acpi_info.h should be BOARD specific so move the header file
to configs/$(CONFIG_BOARD)/ folder.

So the target acpi info file detect process is:

Compiler search for $(CONFIG_BOARD)_acpi_info.h under
hypervisor/arch/x86/$(CONFIG_BOARD)/ first (the file is supposed to be
generated by offline tool so it is not included in original source), if
found, then the file is the target acpi info file. If not and at the
same time the ENFORCE_VALIDATED_ACPI_INFO Kconfig was set, the compiler
will stop and hint user to add target acpi info file by offline tool.
If ENFORCE_VALIDATED_ACPI_INFO was unset, then compiler will continue to
search for platform_acpi_info.h as target acpi info file under
hypervisor/arch/x86/$(CONFIG_BOARD) folder (with this file we could bypass
ENFORCE_VALIDATED_ACPI_INFO check and benifit for development). If this
file is not exist, then hypervisor/arch/x86/configs/platform_acpi_info.h
will be included as final target acpi info.

The process should work for UEFI path also, with a valid platform acpi
info file, S3/S5 should work on UEFI platform.

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-08 10:34:14 +08:00
Sainath Grandhi b49df10a23 hv: Remove redundant get_dmar_info API calls
get_dmar_info API is called from multiple functions in vtd.c. This patch
calls get_dmar_info once during init and uses the cached info during
runtime.

Tracked-On: #2657
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-02 07:10:25 +08:00
Mingqiang Chi 511d4c158b hv:cleanup console.h
--move several uart API declarations from console.h to uart16550.h
 --move several shell API declarations from console.h to shell.h
 --add dbg_cmd.h, move 'handle_dbg_cmd' declaration from console.h
   to dbg_cmd.h
 --move debug/uart16550.h to include/debug/uart16550.h since some
   uart APIs will be called by external files

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>

	modified:   arch/x86/guest/vm.c
	modified:   arch/x86/init.c
	modified:   bsp/uefi/cmdline.c
	modified:   debug/console.c
	modified:   debug/dbg_cmd.c
	modified:   debug/uart16550.c
	modified:   debug/vuart.c
	modified:   hw/pci.c
	modified:   include/arch/x86/multiboot.h
	modified:   include/debug/console.h
	new file:   include/debug/dbg_cmd.h
	new file:   include/debug/shell.h
	renamed:    debug/uart16550.h -> include/debug/uart16550.h
2019-02-27 11:12:48 +08:00
Arindam Roy de8d85753e HV: Modularize vtd.c to remove acrn_vm usage
This patch is a modified one. It removes the usage
of acrn_vm struct from inside vtd.c.
It also puts struct iommu_domain inside vtd.h,
from vtd.c.
It modifies the signature of init_iommu_domain
in order to remove dependency on acrn_vm from
inside vtd.c.
Incorporated comments from Jason and Eddie.
Changed the name of sos_vm_domain to
fallback_iommu_domain
Removed any reference of sos_vm from vtd.[c|h]
files, including comments.

Tracked-On: #2496
Signed-off-by: Arindam Roy <arindam.roy@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2019-02-06 08:53:46 +08:00
Mingqiang Chi af1e5d5742 hv:remove several redundancy variables related memory
Remove redundancy code since they are not used now.
-- remove 'max_ram_blk_base' & 'max_ram_blk_size' in
   struct e820_mem_params
-- remove 'gpa_lowtop' in struct vm_hw_info
-- remove MACRO 'UOS_DEFAULT_START_ADDR'

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-02 22:59:34 +08:00
Grandhi, Sainath cb46937bf5 hv: Enumerate IOAPIC info from DMAR table
IOAPIC info from DMAR table is needed to match the IOAPIC info from
MADT. This patch adds support to get id and bus, devfn for IOAPIC
from DMAR. IOAPIC info for SBL platform is hardcoded in the header
file.

Tracked-On: #2426
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Reviewed-by: Binbin Wu <binbin.wu@intel.com>
2019-02-01 15:54:55 +08:00
Grandhi, Sainath 4ff9f5dfb2 hv: Enumerate IOAPIC info from MADT
IOAPIC info, specifically ID, is needed to map the IOAPIC to
corresponding DMAR. DMAR table in ACPI has a field that has IOAPIC
ID, that matches the info provided in MADT. Both (IOAPIC info from
MADT and from DMAR) is needed for remapping IOAPIC interrupts.

Tracked-On: #2426
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2019-02-01 15:54:55 +08:00
Minggui Cao 723ff1f4ee HV: modularization improve UEFI macro control code
1. in UEFI bsp code, not need UEFI macro; it is controlled in makefile.
2. in vm/acpi/interrupt code, unify the API name for SBL & UEFI.
3. remove unnecessary header including and unused code.

Tracked-On: #1842
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2019-01-30 16:11:39 +08:00
Chaohong guo 07f14401ec HV: save efi_ctx into HV to use after init_paging()
efi_ctx is passed by EFI stub to hypervisor. The memory was allocated
right after HV binary and marked as Efireserved. But HV is doing a 2MB
alignment in init_paging() and might overwrite the efi_ctx struct or
change the page table attribute. Now, EFI STUB uses Efiloaderdata type
memory and the memory can be re-use by hypervisor/sos after boot time
done. HV should save itself a copy if the content is still needed after
init_paging().

Tracked-On: #2349
Signed-off-by: Chaohong guo <chaohong.guo@intel.com>
Reviewed-by: Zheng, Gen <gen.zheng@intel.com>
2019-01-24 11:59:21 +08:00
Minggui Cao c00d959d43 HV: separate const dmar table definition from sbl
const dmar table is used for sbl board, and it can be
a single/independable file.

Tracked-On: #1842
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-08 08:46:15 +08:00
Minggui Cao c5e072432a HV: modularization to refine boot/bsp related code.
1. add static for local functions and variables.
2. move vm_sw_loader from vcpu to vm
3. refine uefi.c to follow the code rules.
4. separate uefi.c for vm0 boot and bsp two parts. bsp layer just
access native HW related, can't access vm/vcpu, vm0 boot part can
access vm / vcpu data structure.

Tracked-On: #1842
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2019-01-08 08:46:15 +08:00
Minggui Cao 7ebc4877c8 HV: refine cmdline code, move parts into dbg_cmd
move the debug related command handle into debug/dbg_cmd.c;
so release build will not include that.

Tracked-On: #2170
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-02 12:15:53 +08:00
Minggui Cao a5ca305cf6 HV: add API to change vuart base & irq config
1. add an API to support vuart COM base and irq configured;
2. add the HV cmd to be parsed for vuart COM base & irq.

Tracked-On: #2170
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-02 12:15:53 +08:00
Minggui Cao b319e654c1 HV: fix bug adapt uart mmio to bdf for HV cmdline
now PCI uart changed from MMIO configure to BDF configure,
it need change this interface too; this interface is used
to dynamically configure debug uart by HV command line.

Tracked-On: #2031
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-20 10:11:02 +08:00
Mingqiang Chi 74849cd983 modulization:move out efi dir from hypervisor
move acrn-hypervisor/hypervisor/bsp/uefi/efi
to   arcn-hypervisor/efi-stub
move acrn-hypervisor/hypervisor/bsp/uefi/clearlinux
to   acrn-hypervisor/efi-stub/clearlinux

Changes to be committed:
  modified:   Makefile
  modified:   doc/getting-started/apl-nuc.rst
  renamed:    hypervisor/bsp/uefi/efi/Makefile -> efi-stub/Makefile
  renamed:    hypervisor/bsp/uefi/efi/boot.c -> efi-stub/boot.c
  renamed:    hypervisor/bsp/uefi/efi/boot.h -> efi-stub/boot.h
  renamed:    hypervisor/bsp/uefi/clearlinux/acrn.conf ->
	      efi-stub/clearlinux/acrn.conf
  renamed:    hypervisor/bsp/uefi/efi/efilinux.h -> efi-stub/efilinux.h
  renamed:    hypervisor/bsp/uefi/efi/malloc.c -> efi-stub/malloc.c
  renamed:    hypervisor/bsp/uefi/efi/multiboot.h -> efi-stub/multiboot.h
  renamed:    hypervisor/bsp/uefi/efi/pe.c -> efi-stub/pe.c
  renamed:    hypervisor/bsp/uefi/efi/stdlib.h -> efi-stub/stdlib.h
  modified:   hypervisor/Makefile

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-17 15:46:23 +08:00
Xie, nanlin ed5e210d91 Doc: Update GSG for v0.4 version and launch and acrn.conf sample script
Signed-off-by: Xie, nanlin <nanlin.xie@intel.com>
2018-12-15 10:12:44 -08:00
Li, Fei1 e3fc6c3c79 hv: use int32_t replace int
Since it's typedef in "include/lib/types.h"

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-12-12 13:08:10 +08:00
Li, Fei1 e8f3a2d42c hv: use uint64_t replace "unsigned long"
Since it's typedef in "include/lib/types.h"

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-12-12 13:08:10 +08:00
Li, Fei1 473d871397 hv: use uint32_t replace "unsigned int"
Since it's typedef in "include/lib/types.h"

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-12-12 13:08:10 +08:00
Li, Fei1 8bafde9942 hv: use uint8_t replace "unsigned char"
Since it's typedef in "include/lib/types.h"

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-12-12 13:08:10 +08:00
Yonghua Huang 4d13ad9d08 hv: enable NX in hypervisor
- enable NX feature in hypervisor:
  1. Set 'XD' bit for all pages, including pages for guests
     when initialize MMU tables in hypervisor.
  2. remove 'XD' bit for pages that contain hypervisor instructions.
  3. enable MSR EFER.NXE,which will enable page access restriction by
     preventing instruction fetches form pages with XD bit set.

- remove "-Wl -z noexecstack" GCC flag option in hypervisor
  Makefile as it would not affect stack attribute in hyervisor,
  which setup stack itself, instead of by loader.

Tracked-On: #1122
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-12 12:53:18 +08:00
ailin,yang c379914684 hv: remove "i915.enable_initial_modeset"
removed "i915.enable_initial_modeset" sos kernel cmdline option from acrn.conf

Tracked-On: #1982 
Signed-off-by: ailun258 <ailin.yang@intel.com>
2018-12-06 13:26:32 +08:00
Minggui Cao e7d1cdd9e2 HV: remove ignored pci device from acrn.conf
now hypervisor will support to hide ignored PCI device from SOS,
it doesn't need pass the boot args to SOS.

Tracked-On: #1923
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
2018-12-03 13:20:35 +08:00
Jason Chen CJ aa9af27338 modularization: boot component
Boot component prepares the very basic platform boot env. It finally call
into platform initilization entries:

- bsp_boot_init & cpu_secondary_init for start up
- or restore_s3_context for wakeup

this patch is the final one, it did some code clean up and move some definition
from vm0_boot.h to boot_context.h.

after this patch, the boot component include files:
arch/x86/boot/cpu_primary.S
arch/x86/boot/trampoline.S
arch/x86/boot/cpu_save_boot_ctx.S
arch/x86/boot/idt.S
boot/reloc.c
boot/include/reloc.h
include/arch/x86/boot/idt.h
include/arch/x86/boot/boot_context.h

Tracked-On: #1842
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-12-03 09:09:44 +08:00
dongshen 1018a31cbb HV: For NUC, use 0x3F8/IRQ4 as the vuart port base address/IRQ and use ttyS0 accordingly
Tracked-On: #1817
Change-Id: I6f063e3f85b2050d63c75c1e8a46c5e8ab8a2860
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
2018-11-16 10:24:48 +08:00
Shiqing Gao 3731b4c0ac hv: fix '(void) missing for discarded return value'
MISRA-C requires that the function call in which the returned
value is discarded shall be clearly indicated using (void).

This patch fixes the violations related to the following
function calls.
- vlapic_set_intr
- vlapic_intr_edge

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
2018-11-13 19:24:54 +08:00
ailin,yang bc2f30e229 HV: update kernel name
updated kernel name  from kernel-org.clearlinux.pk414-sos.4.14.52-63 to kernel-org.clearlinux.iot-lts2018-sos.4.19.0-16 for v0.3 release

Signed-off-by: Ailun258 <ailin.yang@intel.com>
2018-11-10 11:16:12 -08:00
Xiangyang Wu 99586e32cc HV:treewide:rename vm data structure
For data structure types "struct vm", its name is identical
with variable name in the same scope. This is a MISRA C  violation.

Naming convention rule:If the data structure type is used by multi
modules, its corresponding logic resource is exposed to external
components (such as SOS, UOS), and its name meaning is simplistic
(such as vcpu, vm), its name needs prefix "acrn_".

The following udpates are made:
struct vm *vm-->struct acrn_vm *vm

Tracked-On: #861

Signed-off-by: Xiangyang Wu <xiangyang.wu@linux.intel.com>
2018-11-05 15:35:49 +08:00
Xiangyang Wu fa26a16645 HV:treewide:rename vcpu data structure
For data structure types "struct vcpu", its name is identical
with variable name in the same scope. This is a MISRA C  violation.

Naming convention rule:If the data structure type is used by multi
modules, its corresponding logic resource is exposed to external
components (such as SOS, UOS), and its name meaning is simplistic
(such as vcpu, vm), its name needs prefix "acrn_".

The following udpates are made:
struct vcpu *vcpu-->struct acrn_vcpu *vcpu

Tracked-On: #861

Signed-off-by: Xiangyang Wu <xiangyang.wu@linux.intel.com>
2018-11-05 15:35:49 +08:00
Li, Fei1 dc9d18a868 hv: mmu: add static paging table allocation for hypervisor
Add static paging table allocation API for hypervisor.
Note: must configure PLATFORM_RAM_SIZE and PLATFORM_MMIO_SIZE exactly as the platform.

Rename RAM_START/RAM_SIZE to HV_RAM_START/HV_RAM_SIZE for HV.

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-11-02 13:15:48 +08:00
Minggui Cao 0307b21896 HV: change vuart port (used by SOS) to ttyS2
On MRB, there are some differences for SOS uart setting between
debug version and release version:
  for debug version, ttyS0 is vuart, ttyS1 is 00:18.0, ttyS2 is 00:18.1,
    ttyS3 is 00:18.3.
  for release version, ttyS0 is 00:18.0, ttyS1 is 00:18.1, ttyS2 is
00:18.2, ttyS3 is 00:18.3. There is no vuart.

port: 00:18.0 is for bluetooth usage, ttyS0 can't be used as SOS console
for release build.

after change, debug build: vuart -->ttyS2 (SOS console);
release version: ttyS2; 00:18.2, it can be used as SOS console too.

for UEFI platform, also change acrn.conf console=ttyS0-->ttyS2
to matched with vart change.

Tracked-On: #1690
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-11-02 13:00:54 +08:00
Shiqing Gao 111f9726d0 hv: fix integer violations
The operands to shift operations (<<, >>) shall be unsigned integers.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-02 11:05:32 +08:00
Victor Sun 8b5d357f92 HV: move default ACPI info to default_acpi_info.h
Given the reality that some of ACPI configrations are unlikey changed,
move these MACROs to a default header file.

The platform_acpi_info.h still has chance to override the default
definition by #undef with offline tool.

Tracked-On: #1520
Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-10-19 22:38:25 +08:00
Victor Sun 25719db8f1 HV: move DRHD data to platform acpi info
In current code, the DRHD data is hardcoded in sbl.c. Replace the data
with MACROs which defined in platform_acpi_info.h as it could be parsed
by offline tool.

Tracked-On: #1500
Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Reviewed-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-10-18 09:26:59 +08:00