HV: move default ACPI info to default_acpi_info.h
Given the reality that some of ACPI configrations are unlikey changed, move these MACROs to a default header file. The platform_acpi_info.h still has chance to override the default definition by #undef with offline tool. Tracked-On: #1520 Signed-off-by: Victor Sun <victor.sun@intel.com> Acked-by: Anthony Xu <anthony.xu@intel.com>
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@ -18,6 +18,7 @@
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#ifndef BSP_EXTERN_H
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#define BSP_EXTERN_H
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#include "default_acpi_info.h"
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#include "platform_acpi_info.h"
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#define UOS_DEFAULT_START_ADDR (0x100000000UL)
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@ -0,0 +1,52 @@
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/*
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* Copyright (C) 2018 Intel Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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/* Given the reality that some of ACPI configrations are unlikey changed,
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* define these MACROs in this header file.
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* The platform_acpi_info.h still has chance to override the default
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* definition by #undef with offline tool.
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*/
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#ifndef DEFAULT_ACPI_INFO_H
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#define DEFAULT_ACPI_INFO_H
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/* APIC */
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#define LAPIC_BASE 0xFEE00000UL
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#define NR_IOAPICS 1U
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#define IOAPIC0_BASE 0xFEC00000UL
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#define IOAPIC1_BASE 0UL
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/* pm sstate data */
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#define PM1A_EVT_SPACE_ID SPACE_SYSTEM_IO
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#define PM1A_EVT_BIT_WIDTH 0x20U
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#define PM1A_EVT_BIT_OFFSET 0U
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#define PM1B_EVT_SPACE_ID SPACE_SYSTEM_IO
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#define PM1B_EVT_BIT_WIDTH 0U
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#define PM1B_EVT_BIT_OFFSET 0U
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#define PM1B_EVT_ACCESS_SIZE 0U
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#define PM1B_EVT_ADDRESS 0UL
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#define PM1A_CNT_SPACE_ID SPACE_SYSTEM_IO
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#define PM1A_CNT_BIT_WIDTH 0x10U
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#define PM1A_CNT_BIT_OFFSET 0U
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#define PM1A_CNT_ACCESS_SIZE 2U
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#define PM1B_CNT_SPACE_ID SPACE_SYSTEM_IO
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#define PM1B_CNT_BIT_WIDTH 0U
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#define PM1B_CNT_BIT_OFFSET 0U
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#define PM1B_CNT_ACCESS_SIZE 0U
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#define PM1B_CNT_ADDRESS 0UL
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#define S3_PKG_VAL_PM1A 0x05U
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#define S3_PKG_VAL_PM1B 0U
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#define S3_PKG_RESERVED 0U
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#define S5_PKG_VAL_PM1A 0x07U
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#define S5_PKG_VAL_PM1B 0U
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#define S5_PKG_RESERVED 0U
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#endif /* DEFAULT_ACPI_INFO_H */
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@ -12,46 +12,11 @@
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#define ACPI_INFO_VALIDATED
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/* APIC */
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#define LAPIC_BASE 0xFEE00000UL
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#define NR_IOAPICS 1U
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#define IOAPIC0_BASE 0xFEC00000UL
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#define IOAPIC1_BASE 0UL
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/* pm sstate data */
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#define PM1A_EVT_SPACE_ID SPACE_SYSTEM_IO
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#define PM1A_EVT_BIT_WIDTH 0x20U
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#define PM1A_EVT_BIT_OFFSET 0U
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#define PM1A_EVT_ACCESS_SIZE 3U
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#define PM1A_EVT_ADDRESS 0x400UL
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#define PM1B_EVT_SPACE_ID SPACE_SYSTEM_IO
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#define PM1B_EVT_BIT_WIDTH 0U
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#define PM1B_EVT_BIT_OFFSET 0U
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#define PM1B_EVT_ACCESS_SIZE 0U
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#define PM1B_EVT_ADDRESS 0UL
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#define PM1A_CNT_SPACE_ID SPACE_SYSTEM_IO
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#define PM1A_CNT_BIT_WIDTH 0x10U
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#define PM1A_CNT_BIT_OFFSET 0U
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#define PM1A_CNT_ACCESS_SIZE 2U
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#define PM1A_CNT_ADDRESS 0x404UL
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#define PM1B_CNT_SPACE_ID SPACE_SYSTEM_IO
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#define PM1B_CNT_BIT_WIDTH 0U
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#define PM1B_CNT_BIT_OFFSET 0U
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#define PM1B_CNT_ACCESS_SIZE 0U
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#define PM1B_CNT_ADDRESS 0UL
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#define S3_PKG_VAL_PM1A 0x05U
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#define S3_PKG_VAL_PM1B 0U
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#define S3_PKG_RESERVED 0U
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#define S5_PKG_VAL_PM1A 0x07U
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#define S5_PKG_VAL_PM1B 0U
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#define S5_PKG_RESERVED 0U
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#define WAKE_VECTOR_32 0x7A86BBDCUL
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#define WAKE_VECTOR_64 0x7A86BBE8UL
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@ -10,46 +10,11 @@
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#ifndef PLATFORM_ACPI_INFO_H
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#define PLATFORM_ACPI_INFO_H
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/* APIC */
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#define LAPIC_BASE 0xFEE00000UL
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#define NR_IOAPICS 1U
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#define IOAPIC0_BASE 0xFEC00000UL
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#define IOAPIC1_BASE 0UL
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/* pm sstate data */
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#define PM1A_EVT_SPACE_ID SPACE_SYSTEM_IO
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#define PM1A_EVT_BIT_WIDTH 0U
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#define PM1A_EVT_BIT_OFFSET 0U
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#define PM1A_EVT_ACCESS_SIZE 0U
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#define PM1A_EVT_ADDRESS 0UL
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#define PM1B_EVT_SPACE_ID SPACE_SYSTEM_IO
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#define PM1B_EVT_BIT_WIDTH 0U
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#define PM1B_EVT_BIT_OFFSET 0U
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#define PM1B_EVT_ACCESS_SIZE 0U
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#define PM1B_EVT_ADDRESS 0UL
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#define PM1A_CNT_SPACE_ID SPACE_SYSTEM_IO
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#define PM1A_CNT_BIT_WIDTH 0U
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#define PM1A_CNT_BIT_OFFSET 0U
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#define PM1A_CNT_ACCESS_SIZE 0U
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#define PM1A_CNT_ADDRESS 0UL
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#define PM1B_CNT_SPACE_ID SPACE_SYSTEM_IO
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#define PM1B_CNT_BIT_WIDTH 0U
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#define PM1B_CNT_BIT_OFFSET 0U
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#define PM1B_CNT_ACCESS_SIZE 0U
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#define PM1B_CNT_ADDRESS 0UL
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#define S3_PKG_VAL_PM1A 0U
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#define S3_PKG_VAL_PM1B 0U
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#define S3_PKG_RESERVED 0U
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#define S5_PKG_VAL_PM1A 0U
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#define S5_PKG_VAL_PM1B 0U
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#define S5_PKG_RESERVED 0U
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#define WAKE_VECTOR_32 0UL
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#define WAKE_VECTOR_64 0UL
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