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HV: move DRHD data to platform acpi info 

In current code, the DRHD data is hardcoded in sbl.c. Replace the data
with MACROs which defined in platform_acpi_info.h as it could be parsed
by offline tool.

Tracked-On: #1500
Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Reviewed-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Victor Sun 2018-10-13 23:14:44 +08:00 committed by wenlingz
parent ca65e8c727
commit 25719db8f1
2 changed files with 167 additions and 22 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

59
hypervisor/bsp/include/sbl/platform_acpi_info.h
View File

@ -55,4 +55,63 @@
#define WAKE_VECTOR_32 0x7A86BBDCUL
#define WAKE_VECTOR_64 0x7A86BBE8UL
/* DRHD of DMAR */
#define DRHD_COUNT 2U
#define DRHD0_DEV_CNT 1U
#define DRHD0_SEGMENT 0U
#define DRHD0_FLAGS 0U
#define DRHD0_REG_BASE 0xFED64000UL
#define DRHD0_IGNORE true
#define DRHD0_DEVSCOPE0_BUS 0U
#define DRHD0_DEVSCOPE0_PATH DEVFUN(0x2U, 0U)
#define DRHD0_DEVSCOPE1_BUS 0U
#define DRHD0_DEVSCOPE1_PATH 0U
#define DRHD0_DEVSCOPE2_BUS 0U
#define DRHD0_DEVSCOPE2_PATH 0U
#define DRHD0_DEVSCOPE3_BUS 0U
#define DRHD0_DEVSCOPE3_PATH 0U
#define DRHD1_DEV_CNT 0U
#define DRHD1_SEGMENT 0U
#define DRHD1_FLAGS DRHD_FLAG_INCLUDE_PCI_ALL_MASK
#define DRHD1_REG_BASE 0xFED65000UL
#define DRHD1_IGNORE false
#define DRHD1_DEVSCOPE0_BUS 0U
#define DRHD1_DEVSCOPE0_PATH 0U
#define DRHD1_DEVSCOPE1_BUS 0U
#define DRHD1_DEVSCOPE1_PATH 0U
#define DRHD1_DEVSCOPE2_BUS 0U
#define DRHD1_DEVSCOPE2_PATH 0U
#define DRHD1_DEVSCOPE3_BUS 0U
#define DRHD1_DEVSCOPE3_PATH 0U
#define DRHD2_DEV_CNT 0U
#define DRHD2_SEGMENT 0U
#define DRHD2_FLAGS 0U
#define DRHD2_REG_BASE 0U
#define DRHD2_IGNORE false
#define DRHD2_DEVSCOPE0_BUS 0U
#define DRHD2_DEVSCOPE0_PATH 0U
#define DRHD2_DEVSCOPE1_BUS 0U
#define DRHD2_DEVSCOPE1_PATH 0U
#define DRHD2_DEVSCOPE2_BUS 0U
#define DRHD2_DEVSCOPE2_PATH 0U
#define DRHD2_DEVSCOPE3_BUS 0U
#define DRHD2_DEVSCOPE3_PATH 0U
#define DRHD3_DEV_CNT 0U
#define DRHD3_SEGMENT 0U
#define DRHD3_FLAGS 0U
#define DRHD3_REG_BASE 0U
#define DRHD3_IGNORE false
#define DRHD3_DEVSCOPE0_BUS 0U
#define DRHD3_DEVSCOPE0_PATH 0U
#define DRHD3_DEVSCOPE1_BUS 0U
#define DRHD3_DEVSCOPE1_PATH 0U
#define DRHD3_DEVSCOPE2_BUS 0U
#define DRHD3_DEVSCOPE2_PATH 0U
#define DRHD3_DEVSCOPE3_BUS 0U
#define DRHD3_DEVSCOPE3_PATH 0U
#endif /* PLATFORM_ACPI_INFO_H */

130
hypervisor/bsp/sbl/sbl.c
View File

@ -7,37 +7,123 @@
#include <hypervisor.h>
#ifndef CONFIG_DMAR_PARSE_ENABLED
static struct dmar_dev_scope default_drhd_unit_dev_scope0[] = {
{ .bus = 0U, .devfun = DEVFUN(0x2U, 0U), },
#define MAX_DRHDS 4
#define MAX_DRHD_DEVSCOPES 4
static struct dmar_dev_scope drhd0_dev_scope[MAX_DRHD_DEVSCOPES] = {
{
.bus = DRHD0_DEVSCOPE0_BUS,
.devfun = DRHD0_DEVSCOPE0_PATH
},
{
.bus = DRHD0_DEVSCOPE1_BUS,
.devfun = DRHD0_DEVSCOPE1_PATH
},
{
.bus = DRHD0_DEVSCOPE2_BUS,
.devfun = DRHD0_DEVSCOPE2_PATH
},
{
.bus = DRHD0_DEVSCOPE3_BUS,
.devfun = DRHD0_DEVSCOPE3_PATH
}
};
static struct dmar_drhd drhd_info_array[] = {
static struct dmar_dev_scope drhd1_dev_scope[MAX_DRHD_DEVSCOPES] = {
{
.dev_cnt = 1U,
.segment = 0U,
.flags = 0U,
.reg_base_addr = 0xFED64000UL,
/* Ignore the iommu for intel graphic device since GVT-g needs
* vtd disabled for gpu
*/
.ignore = true,
.devices = default_drhd_unit_dev_scope0,
.bus = DRHD1_DEVSCOPE0_BUS,
.devfun = DRHD1_DEVSCOPE0_PATH
},
{
/* No need to specify devices since
* DRHD_FLAG_INCLUDE_PCI_ALL_MASK set
*/
.dev_cnt = 0U,
.segment = 0U,
.flags = DRHD_FLAG_INCLUDE_PCI_ALL_MASK,
.reg_base_addr = 0xFED65000UL,
.ignore = false,
.devices = NULL,
.bus = DRHD1_DEVSCOPE1_BUS,
.devfun = DRHD1_DEVSCOPE1_PATH
},
{
.bus = DRHD1_DEVSCOPE2_BUS,
.devfun = DRHD1_DEVSCOPE2_PATH
},
{
.bus = DRHD1_DEVSCOPE3_BUS,
.devfun = DRHD1_DEVSCOPE3_PATH
}
};
static struct dmar_dev_scope drhd2_dev_scope[MAX_DRHD_DEVSCOPES] = {
{
.bus = DRHD2_DEVSCOPE0_BUS,
.devfun = DRHD2_DEVSCOPE0_PATH
},
{
.bus = DRHD2_DEVSCOPE1_BUS,
.devfun = DRHD2_DEVSCOPE1_PATH
},
{
.bus = DRHD2_DEVSCOPE2_BUS,
.devfun = DRHD2_DEVSCOPE2_PATH
},
{
.bus = DRHD2_DEVSCOPE3_BUS,
.devfun = DRHD2_DEVSCOPE3_PATH
}
};
static struct dmar_dev_scope drhd3_dev_scope[MAX_DRHD_DEVSCOPES] = {
{
.bus = DRHD3_DEVSCOPE0_BUS,
.devfun = DRHD3_DEVSCOPE0_PATH
},
{
.bus = DRHD3_DEVSCOPE1_BUS,
.devfun = DRHD3_DEVSCOPE1_PATH
},
{
.bus = DRHD3_DEVSCOPE2_BUS,
.devfun = DRHD3_DEVSCOPE2_PATH
},
{
.bus = DRHD3_DEVSCOPE3_BUS,
.devfun = DRHD3_DEVSCOPE3_PATH
}
};
static struct dmar_drhd drhd_info_array[MAX_DRHDS] = {
{
.dev_cnt = DRHD0_DEV_CNT,
.segment = DRHD0_SEGMENT,
.flags = DRHD0_FLAGS,
.reg_base_addr = DRHD0_REG_BASE,
.ignore = DRHD0_IGNORE,
.devices = drhd0_dev_scope
},
{
.dev_cnt = DRHD1_DEV_CNT,
.segment = DRHD1_SEGMENT,
.flags = DRHD1_FLAGS,
.reg_base_addr = DRHD1_REG_BASE,
.ignore = DRHD1_IGNORE,
.devices = drhd1_dev_scope
},
{
.dev_cnt = DRHD2_DEV_CNT,
.segment = DRHD2_SEGMENT,
.flags = DRHD2_FLAGS,
.reg_base_addr = DRHD2_REG_BASE,
.ignore = DRHD2_IGNORE,
.devices = drhd2_dev_scope
},
{
.dev_cnt = DRHD3_DEV_CNT,
.segment = DRHD3_SEGMENT,
.flags = DRHD3_FLAGS,
.reg_base_addr = DRHD3_REG_BASE,
.ignore = DRHD3_IGNORE,
.devices = drhd3_dev_scope
}
};
static struct dmar_info sbl_dmar_info = {
.drhd_count = 2,
.drhd_count = DRHD_COUNT,
.drhd_units = drhd_info_array,
};