Commit Graph

3504 Commits

Author SHA1 Message Date
Haiwei Li 95859dea34 doc: add module design for peripheral ivshmem device
GAI Tooling Notice: These contents may have been developed with support from one
or more generative artificial intelligence solutions.

This patch is to add doxygen style comments for some elements in
vp-dm_vperipheral ivshmem module.

Tracked-On: #8665

Signed-off-by: Haiwei Li <haiwei.li@intel.com>
2024-10-09 09:50:54 +08:00
Gao, Shiqing 9d7f14e783 hv: release: fix the compilation error
This patch fixes the following compilation error when including
`release/uart16550.c` into the module test.

./release/uart16550.c:14:6: error: conflicting types for ‘get_pio_dbg_uart_cfg’; have ‘bool(uint64_t *, uint64_t *)’ {aka ‘_Bool(long unsigned int *, long unsigned int *)’}
   14 | bool get_pio_dbg_uart_cfg(__unused uint64_t *pio_address, __unused uint64_t *nbytes) {
      |      ^~~~~~~~~~~~~~~~~~~~

./include/debug/uart16550.h:142:6: note: previous declaration of ‘get_pio_dbg_uart_cfg’ with type ‘bool(uint16_t *, uint32_t *)’ {aka ‘_Bool(short unsigned int *, unsigned int *)’}
  142 | bool get_pio_dbg_uart_cfg(uint16_t *pio_address, uint32_t *nbytes);
      |      ^~~~~~~~~~~~~~~~~~~~

Tracked-On: #861

Signed-off-by: Gao, Shiqing <shiqing.gao@intel.com>
2024-09-18 15:57:33 +08:00
Yuan Lu dbc3ff39aa hv: vm_reset: simulate RESET_CONTROL(0xCF9) register
Add reset_control in acrn_vm. Use this reset_control to simulate
RESET_CONTROL(0xCF9) register in hypervisor.

Tracked-On: #8724
Signed-off-by: Yuan Lu <yuan.y.lu@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
2024-09-12 14:09:17 +08:00
Jiaqing Zhao eae668268e hv: handle reboot from Service VM properly
Service VM may write 0x6 to port 0xcf9 to trigger a warm reset, but
current hypervisor always performs a cold reset by writing 0xE to CF9.
Hypervisor should reboot the system in the same mode as Service VM
specified. Specific OS features (like linux pstore) requires warm
reset to keep data across reboot.

The behavior of hv console's reboot command (cold reset) remains
unchanged.

Tracked-On: #8539
Signed-off-by: Jiaqing Zhao <jiaqing.zhao@linux.intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2024-09-09 14:37:16 +08:00
Haiwei Li 17c4ce75a1 hv: cpuid: expose CPUID.EAX=07H subleaf to VMs
Per SDM, VPDPBUSD/VPDPBUSDS/VPDPWSSD/VPDPWSSDS instructions depend on
CPUID Feature Flag 'AVX-VNNI, AVX512_VNNI, AVX512VL'. 'AVX512_VNNI' and
'AVX512VL' are already exposed to any VM.

'AVX-VNNI' is in CPUID.(EAX=07H,ECX=1):EAX.AVX-VNNI[bit 4]. This patch
is to expose all the CPUID.EAX=07H subleaf features to VMs.

Mask corresponding bits if want to disable some features in the future.

Tracked-On: #8710
Reviewed-by: Fei Li <fei1.li@intel.com>
Signed-off-by: Haiwei Li <haiwei.li@intel.com>
2024-09-09 14:03:51 +08:00
Haiwei Li 1571a6d5f2 doc: add module design for peripheral vhost_bridge device
GAI Tooling Notice: These contents may have been developed with support from one
or more generative artificial intelligence solutions.

This patch is to add doxygen style comments for some elements in
vp-dm_vperipheral vhost_bridge module.

Tracked-On: #8665

Signed-off-by: Haiwei Li <haiwei.li@intel.com>
2024-09-03 09:51:43 +08:00
Haiwei Li 9a4c41cdc4 hv: vhostbridge: add comments to clarify the statement
A vhostbridge can be emulated in hypervisor. Function `init_vhostbridge()` is
used to initialize a virtual host bridge and it configures the PCI configuration
space.

However, some configuration elements are not clearly described, which affects
maintainability and readability. This patch add some comments to address it.

Tracked-On: #8665

Signed-off-by: Haiwei Li <haiwei.li@intel.com>
2024-09-03 09:51:43 +08:00
Haoyu Tang fa1f2ba7df local_gva2gpa_common: optimize code
Remove unreachable code branch in line 163:
if CR0 enabled WP, supervisor-mode writing a read-only page have
been checked in line 109.

Merge redundant checking:
if smap is enabled, supervisor-mode can't access user-mode address
when eflags.ac disabled.

Tracked-On: #8708
Signed-off-by: Haoyu Tang <haoyu.tang@intel.com>
2024-08-30 15:19:51 +08:00
Yi Sun e07a9618f9 hv: ENODEV should be able to be set into RAX as hypercall return value
Some hypercalls return -ENODEV which should be set into RAX as return
value, e.g. HC_ASSIGN_PCIDEV. So, remove the check in
vmcall_vmexit_handler() and change return value to -EACCESS if the
hypercall is not sent from Service VM or allowed VM.

Tracked-On: #8598
Signed-off-by: Yi Sun <yi.y.sun@linux.intel.com>
2024-08-23 10:14:14 +08:00
Haiwei Li aba53e78ef doc: add module design for peripheral vuart device
GAI Tooling Notice: These contents may have been developed with support from one
or more generative artificial intelligence solutions.

This patch is to add doxygen style comments for some elements in
vp-dm_vperipheral vuart module.

Tracked-On: #8665

Signed-off-by: Haiwei Li <haiwei.li@intel.com>
2024-08-20 17:23:42 +08:00
Haiwei Li 436cb9cddf doc: add module design for peripheral vpci_bridge device
GAI Tooling Notice: These contents may have been developed with support from one
or more generative artificial intelligence solutions.

This patch is to add doxygen style comments for some elements in
vp-dm_vperipheral vpci_bridge module.

Tracked-On: #8665

Signed-off-by: Haiwei Li <haiwei.li@intel.com>
2024-08-20 16:51:08 +08:00
Haiwei Li 172c56fe0a doc: add module design for peripheral vrtc device
GAI Tooling Notice: These contents may have been developed with support from one
or more generative artificial intelligence solutions.

This patch is to add doxygen style comments for some elements in vp-dm_vperipheral
vrtc module.

Tracked-On: #8665

Signed-off-by: Haiwei Li <haiwei.li@intel.com>
2024-08-20 13:36:13 +08:00
Chen, Jinshi 48a102e6b0 hv: fix testability issues that impact module test
This patch fixes the following testability issues identified by the dynamic
module test.

Global variables defined in function scope cannot be referenced outside
the function, making it impossible to check the return value of these
functions.

Tracked-On: #861

Signed-off-by: Chen, Jinshi <jinshi.chen@intel.com>
2024-08-19 10:21:28 +08:00
Yuan Lu 95bfc87eec hv: hypercall: change condition for hcall_get_cpu_pm_state
After rebooting guest, CPPC initialization failed because _CST and _CPC
missed in DSDT table. When writing _CST and _CPC in DSDT table, it gets
cx_cnt or px_cnt as condition. Getting cx_cnt or px_cnt triggers
the hypercall hcall_get_cpu_pm_state. The hypercall hcall_get_cpu_pm_state
uses VM_CREATED as VM state's condition. While, after rebooting guest,
the VM state is VM_PAUSED when writing _CST and _CPC in DSDT table.
Therefore, changing VM state's condition from VM_CREATED to VM_CREATED or
VM_PAUSED for hcall_get_cpu_pm_state can solve the CPPC initialization
failed issue after rebooting guest.

Tracked-On: #8695
Signed-off-by: Yuan Lu <yuan.y.lu@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
2024-08-16 09:21:26 +08:00
Gao, Shiqing ce96ba3fae hv: multiboot: fix compilation error for module test
Fix below compilation error when building the module test for multiboot_priv.h.
./boot/multiboot/multiboot_priv.h: In function ‘boot_from_multiboot’:
./boot/multiboot/multiboot_priv.h:33:27: error: ‘MULTIBOOT_INFO_MAGIC’ undeclared (first use in this function)
   33 |         return ((magic == MULTIBOOT_INFO_MAGIC) && (info != 0U));

Tracked-On: #861

Signed-off-by: Gao, Shiqing <shiqing.gao@intel.com>
2024-08-15 15:21:46 +08:00
Yonghua Huang 4e552b0785 hv: allow guest with the highest severity to read RESET_CONTROL
Guest VM, such as Linux, may read RESET_CONTROL(0xCF9) register
before writing to, in this case, ACRN should not always return
dummy value.

Tracked-On: #8688
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2024-08-12 10:06:15 +08:00
Jiaqing Zhao 5c351bee0f hv: vtd: allocate drhd_dev_scope based on board file
Determine the size of drhd_dev_scope based on DRHD_MAX_DEVSCOPE_COUNT
in board file instead of hardcoding. The current default value 16 will
be used if it is not defined in board file to keep compatibility, a
warning will be raised in this case.

Tracked-On: #8494
Signed-off-by: Jiaqing Zhao <jiaqing.zhao@linux.intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2024-08-05 15:51:17 +08:00
Haiwei Li fa2b8fcfbe doc: add module design for some defines in hwmgmt_page
GAI Tooling Notice: These contents may have been developed with support from one
or more generative artificial intelligence solutions.

ACRN hypervisor is decomposed into a series of components and modules. The
module design in hypervisor is to add inline doxygen style comments above
functions, macros, structures, etc.

This patch is to add comments for some elements in hwmgmt_page module.

Tracked-On: #8665

Signed-off-by: Haiwei Li <haiwei.li@intel.com>
2024-08-01 14:50:27 +08:00
Jiaqing Zhao 2dc56a8f23 hv: add GUEST_FLAG_STATELESS flag
GUEST_FLAG_STATELESS indicates guest is running a stateless operating
system and need to be shutdown forcefully without data loss. This flag
is only appalicable to pre-launched VM. For TEE_VM, this flag will be
set implicitly.

Tracked-On: #8671
Signed-off-by: Jiaqing Zhao <jiaqing.zhao@linux.intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2024-07-30 09:26:50 +08:00
Haiwei Li c4ea248bc9 hv: remove Service VM delayed loading
Now multiboot modules memory is already reserved from e820 in function
`alloc_mods_memory()` and Service VM will not corrupt pre-launched VM
modules.

So remove the code of Service VM delayed loading.

Tracked-On: #8652
Signed-off-by: Haiwei Li <haiwei.li@intel.com>
2024-07-18 11:26:49 +08:00
Zhang Chen 63efde6bdd HV: boot/elf: Fix the wrong comments in elf.h
The definition of elf32_prog_entry with wrong comments,
p_filesz should means size of segment in file and p_memsz
should means size of segment in memory.

Tracked-On: #8642

Signed-off-by: Zhang Chen <chen.zhang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2024-07-10 15:26:02 +08:00
Zhang Chen 4a176212eb HV: elf_loader: Fix copy gpa bug in load elf32
The elf images can't be loaded correctly because
the elf_loader copy_to_gpa with wrong size.
The p_filesz and p_memsz both belong to elf32_prog_entry,
this data structure describes segments loaded in ram.
p_filesz means size of segment in file and p_memsz
means size of segment in memory.
ELF loader should copy elf_img to gpa with the
size of p_prg_tbl_head32->p_filesz.

Tracked-On: #8642

Signed-off-by: Zhang Chen <chen.zhang@intel.com>
Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2024-07-10 15:26:02 +08:00
Zhang Chen 1933ee93cb HV: elf_loader: enable guest multiboot support
This patch enable guest multiboot support. Try to find
the multiboot header in normal elf guest image.
Introduce the multiboot related basic functions to
initialize multiboot structure. Including
prepare_multiboot_mmap, prepare_loader_name and
find_img_multiboot_header.

Tracked-On: #8642

Signed-off-by: Victor Sun <victor.sun@intel.com>
Signed-off-by: Zhang Chen <chen.zhang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2024-07-10 15:26:02 +08:00
Zhang Chen 1d4bdd452c HV: elf_loader: introduce the multiboot_header data structure
Define the multiboot_header data structure and
MULTIBOOT_MEMORY related definitions.

Tracked-On: #8642

Signed-off-by: Zhang Chen <chen.zhang@intel.com>
Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2024-07-10 15:26:02 +08:00
Zhang Chen b808c0ef32 HV: elf_loader: Prepare to extend elf loader for multiboot protocol
For the TEE and android kernelflinger boot requirements,
elf_loader need to support the multiboot protocol.
This patch define a memory block to store ELF format VM load
params in guest address space. At the same time, prepare the elf
cmdline field and memory map for the guest kernel.

Tracked-On: #8642

Signed-off-by: Victor Sun <victor.sun@intel.com>
Signed-off-by: Zhang Chen <chen.zhang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2024-07-10 15:26:02 +08:00
Victor Sun 49a02f599b HV: elf_loader: Make VM bootargs support elf guest
Except Linux guest, elf guest also need support bootargs.
Currently VM bootargs support all type of guest.

Tracked-On: #8642

Signed-off-by: Zhang Chen <chen.zhang@intel.com>
Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2024-07-10 15:26:02 +08:00
Haiwei Li 529ade37a4 config_tools: support vUART Timer pCPU configuration
This patch is to allow user to pin vUART timer to specific pCPU via ACRN
config tool. User can configure by setting "vUART timer pCPU ID" under
Hypervisor->Advanced Parameters.

Tracked-On: #8648
Signed-off-by: Haiwei Li <haiwei.li@intel.com>
2024-07-10 10:26:21 +08:00
Haiwei Li f47b2b6860 config_tools: support vUART Tx/Rx buffer size configuration
Introduce an interface to define Tx/Tx buffer size via ACRN config tool.
User can configure under Hypervisor->Advanced Parameters.

Tracked-On: #8644
Signed-off-by: Haiwei Li <haiwei.li@intel.com>
2024-07-10 10:26:21 +08:00
Gao, Shiqing cc9013541f hv: vrtc: remove the unused function `rtc_halted()`
rtc_halted() is not invoked anywhere in the code.
This patch removes this unused function to fix below error.
  error: unused function 'rtc_halted' [-Werror,-Wunused-function]

Tracked-On: #861

Signed-off-by: Gao, Shiqing <shiqing.gao@intel.com>
2024-07-03 14:55:43 +08:00
Gao, Shiqing 0bcf469758 hv: vtd: fix use of uninitialized variable in dmar_free_irte
This patch fixes the following error:
  error: variable 'sid' is used uninitialized whenever 'if' condition is true
  [-Werror,-Wsometimes-uninitialized]

Tracked-On: #861

Signed-off-by: Gao, Shiqing <shiqing.gao@intel.com>
2024-07-03 14:55:43 +08:00
Gao, Shiqing 2aed0c7aa1 hv: reloc: enclose `elf64_r_type()` with `#ifdef CONFIG_RELOC`
elf64_r_type() is only invoked when CONFIG_RELOC is defined.
This patch encloses its definition with `#ifdef CONFIG_RELOC`,
otherwise, it is dead code.

Tracked-On: #861

Signed-off-by: Gao, Shiqing <shiqing.gao@intel.com>
2024-07-03 14:55:43 +08:00
Gao, Shiqing f398b9c29e release: fix the compilation error in release mode
Commit `512c98fd7 hv: trace: show cpu usage of vms in pcpu sharing case`
causes the compilation error in release mode:
  hypervisor/common/schedule.c:190: undefined reference to `TRACE_16STR'

This patch fixes this issue.

Tracked-On: #861

Signed-off-by: Gao, Shiqing <shiqing.gao@intel.com>
2024-07-03 11:26:01 +08:00
YuanXin-Intel e4b1584577 Change Service VM to supervisor role
1. Enable Service VM to power off or restart the whole platform even when RTVM is running.
2. Allow Service VM stop the RTVM using acrnctl tool with option "stop -f".
3. Add 'Service VM supervisor role enabled' option in ACRN configurator

Tracked-On: #8618

Signed-off-by: YuanXin-Intel <xin.yuan@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Reviewed-by: Jian Jun Chen <jian.jun.chen@intel.com>
2024-06-28 13:35:07 +08:00
nacui 512c98fd79 hv: trace: show cpu usage of vms in pcpu sharing case
To maximize the cpu utilization, core 0 is usually shared by service
vm and guest vm. But there are no statistics to show the cpu occupation
of each vm.

This patch is to provide cpu usage statistic for users. To calculate
it, a new trace event is added and marked in scheduling context switch,
accompanying with a new python script to analyze the data from acrntrace
output.

Tracked-On: #8621
Signed-off-by: nacui <na.cui@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Reviewed-by: Haiwei Li <haiwei.li@intel.com>
2024-06-28 12:55:23 +08:00
Haiwei Li 3d6ca845e2 hv: s3: add timer support
When resume from s3, Service VM OS will hang because timer interrupt on
BSP is not triggered. Hypervisor won't update physical timer because
there are expired timers on pcpu timer list.

Add suspend and resume ops for modules that use timers.

This patch is just for Service VM OS. Support for User VM will be added
in the future.

Tracked-On: #8623
Signed-off-by: Haiwei Li <haiwei.li@intel.com>
2024-06-27 11:26:09 +08:00
Haiwei Li 5283c147ef hv: pci: Add guest cfg header access handling of type 1 device
When guests resume form s3, an error occurs in guest:

```
pcieport 0000:00:1c.0: refused to change power state from D0 to D3hot
```

PCI bridge (type 1 device) will access configuration space header but
now acrn is not supported. So add handling support.

Tracked-On: #8623
Signed-off-by: Haiwei Li <haiwei.li@intel.com>
2024-06-27 11:26:09 +08:00
Haiwei Li 2cd0edaf9c hv: pci: restore bus and memory/IO info after reset
After some kind of reset, such as s3, pci bridge tries to restore the
bus and memory/IO info (from 0x18 to 0x32, except for Secondary Latency
Timer 0x1b) to resume device state.

This patch is to restore these info by hypervisor.

Tracked-On: #8623
Signed-off-by: Haiwei Li <haiwei.li@intel.com>
2024-06-27 11:26:09 +08:00
Haiwei Li 81935737ff hv: s3: reset vm after resume
Now only BSP is reset. After Service VM OS resumes from s3, APs'
apic_base_msr are incorrect with x2apic bit en.

To avoid incorrect states, do `reset_vm` after resume.

Tracked-On: #8623
Signed-off-by: Haiwei Li <haiwei.li@intel.com>
2024-06-27 11:26:09 +08:00
Haiwei Li 9c139681f2 hv: s3: hwp: enable hwp after resume from s3
After Service OS resume from s3, an error occurs:

[3649827us][cpu=1][idle1][sev=2][seq=1749]:= Unhandled exception: 13 (General Protection)

[3658622us][cpu=1][idle1][sev=2][seq=1750]:
Host Registers:

[3664881us][cpu=1][idle1][sev=2][seq=1751]:=  Vector=0x000000000000000D  RIP=0x000000000040F9F0

[3674213us][cpu=1][idle1][sev=2][seq=1752]:=     RAX=0x0000000080003801  RBX=0x0000000001800800  RCX=0x0000000000000774

[3685787us][cpu=1][idle1][sev=2][seq=1753]:=     RDX=0x0000000000000000  RDI=0x0000000000000080  RSI=0x0000000000000000

[3697371us][cpu=1][idle1][sev=2][seq=1754]:=     RSP=0x0000000000616C18  RBP=0x0000000000616C38  RBX=0x0000000001800800

[3708947us][cpu=1][idle1][sev=2][seq=1755]:=      R8=0x0000000000000038   R9=0x0000000000000001  R10=0x00000000000003F8

[3720539us][cpu=1][idle1][sev=2][seq=1756]:=     R11=0x000000000000000D  R12=0x0000000000458245  R13=0x0000000000000000

[3732114us][cpu=1][idle1][sev=2][seq=1757]:=  RFLAGS=0x0000000000010202  R14=0x0000000000000000  R15=0x0000000000000000

[3743699us][cpu=1][idle1][sev=2][seq=1758]:= ERRCODE=0x0000000000000000   CS=0x0000000000000008   SS=0x0000000000000010

[3755305us][cpu=1][idle1][sev=2][seq=1759]:= CR2=0x0000000000000000

The error occurs in `msr_write(MSR_IA32_HWP_REQUEST, reg)`, when HWP is
not available.

This patch is to initialize HWP after resume.

Tracked-On: #8623
Signed-off-by: Haiwei Li <haiwei.li@intel.com>
2024-06-27 11:26:09 +08:00
Haiwei Li cdfd35ed3d hv: s3: enable lapic earlier
After Service VM OS resumes from s3, BSP starts APs asynchronously,
followed by IPIs to APs to resume tsc. This process takes place in
function `host_enter_s3`. While, APs' lapic are not ready to accept IPI
interrupt, so BSP fails to resume tsc.

So enable lapic earlier to make sure that APs are ready.

Tracked-On: #8623
Signed-off-by: Haiwei Li <haiwei.li@intel.com>
2024-06-27 11:26:09 +08:00
Qiang Zhang 29137b9e9c doc: update doc for vUART to hypervisor console switch key
Things changed since following commit
(c623e1112 debug: vuart: add guest break key support).

Tracked-On: #8583
Signed-off-by: Qiang Zhang <qiang4.zhang@intel.com>
2024-06-25 11:07:21 +08:00
Jiaqing Zhao 53825c5cac e820: properly reserve memory for multiboot modules
In current implementation, if there are multiple continous 4k-aligned
modules, 0-sized e820 entries will be created between these regions.
And for non-4k-aligned modules, when two of them are located in one
page, the second memory range will not be reserved as it was not in
one e820 entry after the first is reserved, making it vulnerable.

This patch fixes it by marking the exact memory range of multiboot
modules as unusable first, then shrinking the e820 entries to page
boundary. If the module crosses multiple e820 entries, possibly due
to a buggy bootloader, hypervisor will panic immediately to prevent
modules getting corrupted.

Tracked-On: #8617
Signed-off-by: Jiaqing Zhao <jiaqing.zhao@linux.intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2024-06-20 09:10:27 +08:00
Haiwei Li b31fcd3519 hv: cpuid: fix hybrid related cpuid error
Some cpuids will return invalid values on hybrid platform because of the
error in the pointer arithmetic. Add `(void *)` before
`cpu_cpuids.leaves`.

Leaf 0x14 is used to report Intel Processor Trace Enumeration and varies
between P-cores and E-cores on hybrid platform. So add it to
`hybrid_leaves`.

Tracked-On: #8608
Fixes: 59a8cc4c2 ("hv: cpuid: make leaf 0x4 per-cpu in hybrid architecture")
Signed-off-by: Haiwei Li <haiwei.li@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2024-06-19 17:07:10 +08:00
andi6 46a860bf04 hv: fix using cpuid does not clear the upper 32-bit registers.
In HV, cpuid uses the lower 32 bits of rax\rbx\rcx\rdx registers to pass parameters,
But the software does not clear the upper 32-bit registers,  if the guest
uses 64-bit variables to pass parameters to cpuid,guest will use rax\rbx\rcx\rdx,
not eax\ebx\ecx\edx, the previous value of the high 32 registers will affect the guest.

Tracked-On: #8605
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Signed-off-by: andi6 <andi6@xiaomi.com>
2024-06-19 15:35:26 +08:00
Jian Jun Chen 74bc2f7cfb hv: asyncio: support data match of the same addr
Virtio legacy device (ver < 1.0) uses a single PIO for all virtqueues.
Notifications from different virtqueues are implemented by writing
virtqueue index to the PIO. Writing different values to the same addr
needs to be mapped to different eventfds by asyncio. This is called
data match feature of asyncio.

v3 -> v4:
 * Update the definition of `struct asyncio_desc`
   Use `struct acrn_asyncio_info` inside it, instaed of defining the duplicated
   fileds.
 * Update `add_asyncio` to use `memcpy_s` rather than assigning all the fields
   using 5 assignment statements.
 * Update `asyncio_is_conflict` for coding style
   120-character line is sufficient to write all conditions.
 * Update the checks related to `wildcard`
   Because we require every conditional clause to have a Boolean type
   in the coding guideline.

v2 -> v3:
No change

v1 -> v2:
No change

Tracked-On: #8612

Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com>
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2024-06-05 15:23:33 +08:00
Jiaqing Zhao 91e0612e88 hv: dm: refine create/destroy functions
The create function of hv-emulated device must check the return value
of vpci_init_vdev() as it returns NULL pointer on failure, and that
function should be called atomically.

Also, the destory function should deinit the vpci devices created to
prevent resource leak.

Tracked-On: #8590
Signed-off-by: Jiaqing Zhao <jiaqing.zhao@linux.intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2024-06-04 09:38:34 +08:00
Jiaqing Zhao 626e2f1d17 hv: vpci: clear vdev structure on device deassign
In devicemodel, a passthrough device is deassigned and then assigned to
guest on guest reboot. Each time hypervisor allocates a new pci_vdev
structure to keep its info. As it was stored in a statically-allocated
array, it will eventually use up all slots, resulting both resource
leak and out-of-bounds access.

Fix it by clearing the corresponding vdev structure on device deassign,
thus a bitmap is introduced to track the usage, replacing the existing
array count.

Tracked-On: #8590
Signed-off-by: Jiaqing Zhao <jiaqing.zhao@linux.intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2024-06-04 09:38:34 +08:00
Haiwei Li b885d02396 hv: cpuid: add several leaf to per-cpu list in hybrid architecture
P-cores and E-cores accessing leaf 0x2U/0x14U/0x16U/0x18U/0x1A/0x1C/0x80000006U
will have different information in hybrid architecture.

So add them to per-cpu list in hybrid architecture and directly return
the physical value.

Note: 0x14U is hided and return 0.

Tracked-On: #8608
Signed-off-by: Haiwei Li <haiwei.li@intel.com>
2024-05-28 11:02:56 +08:00
Haiwei Li d6fe8b0892 hv: cpuid: make leaf 0x6 per-cpu in hybrid architecture
Leaf 0x6 returns thermal and power management information. In
hybrid architecture, P-cores and E-cores have different information.

Add leaf 0x6 to per-cpu list in hybrid architecture and handle specific
cpuid access.

Tracked-On: #8608
Signed-off-by: Haiwei Li <haiwei.li@intel.com>
2024-05-28 11:02:56 +08:00
Haiwei Li 59a8cc4c28 hv: cpuid: make leaf 0x4 per-cpu in hybrid architecture
Leaf 0x4 returns deterministic cache parameters for each level. In
hybrid architecture, P-cores and E-cores have different cache
information.

Add leaf 0x4 to per-cpu list in hybrid architecture and handle specific
cpuid access.

Tracked-On: #8608
Signed-off-by: Haiwei Li <haiwei.li@intel.com>
2024-05-28 11:02:56 +08:00