config_tools: support vUART Tx/Rx buffer size configuration
Introduce an interface to define Tx/Tx buffer size via ACRN config tool. User can configure under Hypervisor->Advanced Parameters. Tracked-On: #8644 Signed-off-by: Haiwei Li <haiwei.li@intel.com>
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@ -32,8 +32,8 @@
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#include <asm/lib/spinlock.h>
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#include <asm/vm_config.h>
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#define RX_BUF_SIZE 256U
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#define TX_BUF_SIZE 8192U
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#define RX_BUF_SIZE CONFIG_VUART_RX_BUF_SIZE
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#define TX_BUF_SIZE CONFIG_VUART_TX_BUF_SIZE
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#define INVAILD_VUART_IDX 0xFFU
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#define COM1_BASE 0x3F8U
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@ -124,6 +124,36 @@ If your VM is not a security VM, leave this option unchecked. </xs:documentation
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<xs:documentation>Enable the software workaround for Machine Check Error on Page Size Change (erratum in some processor families). For more information about this workaround and affected processors, see this `MCE Avoidance on Page Size Change White Paper <https://www.intel.com/content/www/us/en/developer/articles/troubleshooting/software-security-guidance/technical-documentation/machine-check-error-avoidance-page-size-change.html>`_.</xs:documentation>
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</xs:annotation>
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</xs:element>
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<xs:element name="VUART_RX_BUF_SIZE" default="256">
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<xs:annotation acrn:title="vuart rx buffer size (bytes)" acrn:views="advanced"
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acrn:errormsg="'required': 'must config the max rx buffer size of vuart in byte'">
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<xs:documentation>Specify the maximum rx buffer size of vuart.</xs:documentation>
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</xs:annotation>
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<xs:simpleType>
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<xs:annotation>
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<xs:documentation>Integer from 256 to 2560.</xs:documentation>
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</xs:annotation>
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<xs:restriction base="xs:integer">
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<xs:minInclusive value="256" />
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<xs:maxInclusive value="2560" />
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</xs:restriction>
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</xs:simpleType>
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</xs:element>
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<xs:element name="VUART_TX_BUF_SIZE" default="8192">
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<xs:annotation acrn:title="vuart tx buffer size" acrn:views="advanced"
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acrn:errormsg="'required': 'must config the max tx buffer size of vuart in byte'">
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<xs:documentation>Specify the maximum tx buffer size of vuart.</xs:documentation>
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</xs:annotation>
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<xs:simpleType>
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<xs:annotation>
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<xs:documentation>Integer from 8192 to 81920.</xs:documentation>
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</xs:annotation>
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<xs:restriction base="xs:integer">
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<xs:minInclusive value="8192" />
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<xs:maxInclusive value="81920" />
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</xs:restriction>
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</xs:simpleType>
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</xs:element>
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<xs:element name="RDT" type="RDTType">
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<xs:annotation acrn:title="Intel Resource Director Tech" acrn:views="">
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<xs:documentation>Intel Resource Director Technology (RDT) provides cache and memory bandwidth allocation features. The features can be used to improve an application's real-time performance.</xs:documentation>
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@ -158,6 +158,14 @@
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<xsl:with-param name="key" select="'IVSHMEM_ENABLED'" />
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<xsl:with-param name="value" select="count(//hv//IVSHMEM/IVSHMEM_REGION[PROVIDED_BY = 'Hypervisor']) > 0" />
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</xsl:call-template>
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<xsl:call-template name="integer-by-key">
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<xsl:with-param name="key" select="'VUART_RX_BUF_SIZE'" />
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</xsl:call-template>
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<xsl:call-template name="integer-by-key">
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<xsl:with-param name="key" select="'VUART_TX_BUF_SIZE'" />
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</xsl:call-template>
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</xsl:template>
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<xsl:template match="MEMORY">
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