zephyr/arch/x86
Ulf Magnusson 3cb9018e23 arch: x86: Kconfig: Fix CACHE_LINE_SIZE default for CPU_ATOM
With Zephyr's prefer-later-defaults behavior, the default value of
CACHE_LINE_SIZE was always 0, because 'default 0' acts like
'default 0 if y'.

Change the code to what was probably the intention (default to 0 unless
CPU_ATOM).

It looks like CACHE_LINE_SIZE is never used in the code when
CACHE_LINE_SIZE_DETECT is on, so maybe things could be simplified
further.

Piggy-back some prompt style consistency cleanups.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2018-07-12 23:08:43 -04:00
..
core clang: fix for x86 iamcu 2018-07-01 22:58:09 +02:00
include arch: x86: Better document that CR0.WP will also be set when CR0.PG is 2018-05-26 19:09:33 -04:00
soc arch: x86: Kconfig: Remove redundant 'default n' properties 2018-06-26 11:07:57 -05:00
CMakeLists.txt cmake: LD: Specify the entry point in the linker scripts 2018-07-03 17:18:14 -04:00
Kconfig arch: x86: Kconfig: Fix CACHE_LINE_SIZE default for CPU_ATOM 2018-07-12 23:08:43 -04:00
defconfig