zephyr/soc/riscv/riscv-privilege/sifive-freedom
Carlo Caione 10061efdc4 riscv: Rework and cleanup Kconfig
This patch is doing several things:

- Core ISA and extension Kconfig symbols have now a formalized name
  (CONFIG_RISCV_ISA_* and CONFIG_RISCV_ISA_EXT_*)

- a new Kconfig.isa file was introduced with the full set of extensions
  currently supported by the v2.2 spec

- a new Kconfig.core file was introduced to host all the RISCV cores
  (currently only E31)

- ISA and extensions settings are moved to SoC configuration files

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2022-06-05 14:28:42 +02:00
..
CMakeLists.txt
Kconfig.defconfig.series soc/riscv/sifive-freedom/fe310: use correct SYS_CLOCK_HW_CYCLES_PER_SEC 2022-05-24 08:58:43 -07:00
Kconfig.series
Kconfig.soc riscv: Rework and cleanup Kconfig 2022-06-05 14:28:42 +02:00
fe310_clock.c soc: migrate includes to <zephyr/...> 2022-05-06 19:57:59 +02:00
fe310_prci.h
fu540_clock.c soc: migrate includes to <zephyr/...> 2022-05-06 19:57:59 +02:00
fu540_prci.h
fu740_clock.c soc: migrate includes to <zephyr/...> 2022-05-06 19:57:59 +02:00
fu740_prci.h
linker.ld linker: update files with <zephyr/...> include prefix 2022-05-09 12:45:29 -04:00
pinctrl_soc.h
soc.h soc: riscv: sifive-freedom: Revert whitespace mistake. 2022-04-05 17:09:40 -04:00