Ruibin Chang 97d2d7317c ITE soc/riscv/ite/it8xxx2/Kconfig: correct hw clock freq ... Correct SYS_CLOCK_HW_CYCLES_PER_SEC and SYS_CLOCK_TICKS_PER_SEC to match our real setting value for precise timing. Signed-off-by: Ruibin Chang <ruibin.chang@ite.com.tw>		2021-07-24 21:26:49 -04:00
..
arc	arc: hsdk: add compiler options without check	2021-05-25 07:04:32 -05:00
arm	espi: npcx: Add missing includes to header	2021-07-23 16:26:44 -04:00
arm64	soc: arm64: arm: fvp_base_r: define a strong pm_cpu_on() function	2021-07-13 09:30:29 -04:00
nios2	…
posix	…
riscv	ITE soc/riscv/ite/it8xxx2/Kconfig: correct hw clock freq	2021-07-24 21:26:49 -04:00
sparc	…
x86	soc/x86: Clean up EHL kconfigs	2021-05-07 16:48:58 -04:00
xtensa	soc: intel_adsp: fix linker script for XCC	2021-07-22 15:41:11 +03:00
Kconfig	kconfig: soc and shield cleanup	2021-06-11 16:13:22 +02:00