zephyr/soc/xtensa
Daniel Leung ee7773fb46 soc: intel_adsp: fix linker script for XCC
XCC's linker cannot properly process our linker script with
regard to cached/uncached memory regions as the linker cannot
correctly calculate addresses using boolean operations.
Fix this by doing address pointer arithmetic manually to
move between cached and uncached memory regions.

The addresses of symbols were compared via nm and they are
the same before and after this change.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-07-22 15:41:11 +03:00
..
esp32 esp32: drivers: interrupt_controller: add interrupt allocation support 2021-07-16 07:19:28 -04:00
intel_adsp soc: intel_adsp: fix linker script for XCC 2021-07-22 15:41:11 +03:00
intel_s1000 soc: xtensa: linker: Update linker scripts for C++ build 2021-05-28 09:32:44 -05:00
sample_controller cmake: c++ exceptions linking support 2021-05-27 07:43:28 -05:00
CMakeLists.txt