zephyr/arch/riscv
Felipe Neves 7b09d031fa arch: riscv: added support for custom initialization of gp register
Plus added implementation for esp32c3 SoC.

Signed-off-by: Felipe Neves <ryukokki.felipe@gmail.com>
Signed-off-by: Felipe Neves <felipe.neves@espressif.com>
2021-07-07 20:58:50 -04:00
..
core arch: riscv: added support for custom initialization of gp register 2021-07-07 20:58:50 -04:00
include arch: riscv: add memory protection support 2020-11-09 15:37:11 -05:00
CMakeLists.txt
Kconfig arch: riscv: added support for custom initialization of gp register 2021-07-07 20:58:50 -04:00